STP3NK50Z

STP3NK50Z N-channel 500 V, 2.8 Ω typ., 2.3 A Zener-protected SuperMESH™ Power MOSFET in a TO-220 package Datasheet - production data Features TAB Order code VDS RDS(on)max. ID PTOT STP3NK50Z 500 V 3.3 Ω 2.3 A 45 W • Extremely high dv/dt capability • ESD improved capability 3 1 2 • 100% avalanche tested • Gate charge minimized TO-220 • Zener-protected Applications Figure 1. Internal schematic diagram D(2, TAB) • Switching applications Description This device is an N-channel Zener-protected Power MOSFET developed using STMicroelectronics' SuperMESH™ technology, achieved through optimization of ST's well established strip-based PowerMESH™ layout. In addition to a significant reduction in onresistance, this device is designed to ensure a high level of dv/dt capability for the most demanding applications. G(1) S(3) AM01476v1 Table 1. Device summary Order code Marking Packages Packaging STP3NK50Z P3NK50Z TO-220 Tube August 2013 This is information on a product in full production. DocID025103 Rev 1 1/14 www.st.com Contents STP3NK50Z Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2/14 .............................................. 9 DocID025103 Rev 1 STP3NK50Z 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Value Unit Drain-source voltage 500 V Drain-gate voltage (RGS=20 kΩ) 500 V Gate-source voltage ± 30 V ID Drain current (continuous) at TC = 25 °C 2.3 A ID Drain current (continuous) at TC = 100 °C 1.45 A Drain current (pulsed) 9.2 A Total dissipation at TC = 25 °C 45 W 0.36 W/°C 2 kV 4.5 V/ns VDS VDGR VGS IDM (1) PTOT Parameter Derating factor ESD dv/dt (2) Tstg Tj Gate-source human body model (C = 100 pF, R = 1.5 kΩ) Peak diode recovery voltage slope Storage temperature °C -55 to 150 Operating junction temperature °C 1. Pulse width limited by safe operating area. 2. ID ≤ 2 A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS Table 3. Thermal data Symbol Parameter Value Unit Rthj-case Thermal resistance junction-case max 2.78 °C/W Rthj-amb Thermal resistance junction-ambient max 62.5 °C/W Value Unit Table 4. Avalanche characteristics Symbol Parameter IAR Max current during repetitive or single pulse avalanche (pulse width limited by Tjmax) 2.3 A EAS Single pulse avalanche energy (starting TJ = 25 °C, ID=IAS, VDD= 50 V) 120 mJ DocID025103 Rev 1 3/14 14 Electrical characteristics 2 STP3NK50Z Electrical characteristics (TCASE = 25 °C unless otherwise specified). Table 5. On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit Drain-source breakdown voltage (VGS= 0) ID = 1 mA IDSS Zero gate voltage drain current (VGS = 0) VDS = 500 V VDS = 500 V, Tc=125 °C 1 50 µA µA IGSS Gate body leakage current (VDS = 0) VGS = ± 20 V ±10 nA VGS(th) Gate threshold voltage VDS = VGS, ID = 50 µA 3.75 4.5 V RDS(on) Static drain-source onresistance VGS = 10 V, ID= 1.15 A 2.8 3.3 Ω Min. Typ. Max. Unit - 1.5 S - 280 pF - 42 pF V(BR)DSS 500 3 V Table 6. Dynamic Symbol Parameter Test conditions g(1) Forward transconductance Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance - 8 pF Equivalent capacitance time VGS = 0, VDS = 0 to 400 V related - 27.5 pF Turn-on delay time - 8 ns - 13 ns - 24 ns - 14 ns - 11 - 2.5 nC - 5.6 nC Coss eq.(2) td(on) tr td(off) tf Rise time Turn-off delay time VDS =15 V, ID=1.15 A VDS =25 V, f=1 MHz, VGS=0 VDD = 250 V, ID = 1.15 A, RG=4.7 Ω, VGS=10 V (see Figure 19 and 15) Fall time Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge VDD = 400 V, ID = 2.3 A VGS =10 V (see Figure 16) 15 nC 1. Pulsed: Pulse duration = 300 ìs, duty cycle 1.5 %. 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS 4/14 DocID025103 Rev 1 STP3NK50Z Electrical characteristics Table 7. Source drain diode Symbol ISD ISDM (1) VSD(2) Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 2.3 A Source-drain current (pulsed) - 9.2 A 1.6 V Forward on voltage ISD= 2.3 A, VGS=0 - trr Reverse recovery time - 250 ns Qrr Reverse recovery charge - 745 nC IRRM Reverse recovery current ISD= 2.3 A, VDD= 40 V di/dt = 100 A/µs, (see Figure 17) - 6 A ISD= 12 A,VDD= 40 V di/dt=100 A/µs, Tj=150 °C (see Figure 17) - 300 ns - 960 nC - 6.2 A Min Typ. Max. Unit 30 - - V trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5% 2. Pulse width limited by safe operating area Table 8. Gate-source Zener diode Symbol Parameter Test conditions V(BR)GSO Gate-source breakdown voltage IGS = ± 1mA, ID=0 The built-in back-to-back Zener diodes have been specifically designed to enhance not only the device’s ESD capability, but also to make them capable of safely absorbing any voltage transients that may occasionally be applied from gate to source. In this respect, the Zener voltage is appropriate to achieve efficient and cost-effective protection of device integrity. The integrated Zener diodes thus eliminate the need for external components. DocID025103 Rev 1 5/14 14 Electrical characteristics 2.1 STP3NK50Z Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance AM15994v1 ID (A) Tj=150°C Tc=25°C Single pulse 10 10µs s ai re n) si a DS(o th R in ax n it o y m b a er ed Op mit i L 1 100µs 1ms 10ms 0.1 0.01 0.1 6/14 1 10 100 VDS(V) Figure 4. Output characteristics Figure 5. Transfer characteristics Figure 6. Transconductance Figure 7. Capacitance variations DocID025103 Rev 1 STP3NK50Z Electrical characteristics Figure 8. Gate charge vs gate-source voltage Figure 9. Normalized gate threshold voltage vs temperature Figure 10. Static drain-source on-resistance Figure 11. Source-drain forward characteristics Figure 12. Maximum avalanche energy vs temperature Figure 13. Normalized BVDSS vs temperature DocID025103 Rev 1 7/14 14 Electrical characteristics STP3NK50Z Figure 14. Normalized on-resistance vs temperature 8/14 DocID025103 Rev 1 STP3NK50Z 3 Test circuits Test circuits Figure 15. Switching times test circuit for resistive load Figure 16. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 Figure 17. Test circuit for inductive load switching and diode recovery times A A AM01469v1 Figure 18. Unclamped inductive load test circuit L A D G D.U.T. FAST DIODE B B VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 19. Unclamped inductive waveform Figure 20. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 0 DocID025103 Rev 1 10% AM01473v1 9/14 14 Package mechanical data 4 STP3NK50Z Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 10/14 DocID025103 Rev 1 STP3NK50Z Package mechanical data Table 9. TO-220 type A mechanical data mm Dim. Min. Typ. Max. A 4.40 4.60 b 0.61 0.88 b1 1.14 1.70 c 0.48 0.70 D 15.25 15.75 D1 1.27 E 10 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13 14 L1 3.50 3.93 L20 16.40 L30 28.90 ∅P 3.75 3.85 Q 2.65 2.95 DocID025103 Rev 1 11/14 14 Package mechanical data STP3NK50Z Figure 21. TO-220 type A drawing BW\SH$B5HYB7 12/14 DocID025103 Rev 1 STP3NK50Z 5 Revision history Revision history Table 10. Document revision history Date Revision 13-Aug-2013 1 Changes First release. DocID025103 Rev 1 13/14 14 STP3NK50Z Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 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