STP40NS15

STP40NS15 N-CHANNEL 150V - 0.042Ω - 40A TO-220 MESH OVERLAY™ MOSFET PRELIMINARY DATA TYPE VDSS RDS(on) ID STP40NS15 150 V ID(on) x RDS(on)max, VGS = 10V Test Conditions VDS > ID(on) x RDS(on)max, ID = 20A VDS = 25V, f = 1 MHz, VGS = 0 ) s t( d o r µA 10 µA ±100 nA Min. Typ. Max. Unit 2 3 4 V 0.044 0.052 Ω 40 Min. A Typ. Max. Unit 20 S 2400 pF Ciss Input Capacitance Coss Output Capacitance 380 pF Crss Reverse Transfer Capacitance 160 pF s b O 2/6 (s) t c u DYNAMIC uc P e let so Test Conditions Unit V VDS = Max Rating, TC = 125 °C Parameter Max. 1 ON (1) Symbol Typ. 150 STP40NS15 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Parameter Test Conditions Turn-on Delay Time Rise Time Min. Typ. Max. Unit VDD = 75V, ID = 20A RG = 4.7Ω, VGS = 10V (see test circuit, Figure 3) 25 ns 45 ns VDD = 120V, ID = 40A, VGS = 10V 100 Qg Total Gate Charge 110 nC Qgs Gate-Source Charge 17 nC Qgd Gate-Drain Charge 47 nC SWITCHING OFF Symbol td(off) Tf Parameter Test Conditions Turn-off Delay Time Fall Time tr(Voff) Off-voltage Rise Time tf Fall Time tc Cross-over Time Min. ISD Vclamp = 120V, ID = 20 A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 5) 47 ) s t( Parameter Test Conditions e t le Source-drain Current VSD (1) Forward On Voltage c u d Min. Typ. ISD = 40A, VGS = 0 trr Reverse Recovery Time Qrr Reverse Recovery Charge IRRM Reverse Recovery Current (s) t c u od r P e o s b O - ns o r P 70 Source-drain Current (pulsed) Unit ns 35 ISDM (2) Max. 85 SOURCE DRAIN DIODE Symbol Typ. VDD = 75V, ID = 20A RG = 4.7Ω, VGS = 10V (see test circuit, Figure 3) ISD = 40A, di/dt = 100A/µs, VDD = 50V, Tj = 150°C (see test circuit, Figure 5) ns ns Max. Unit 40 A 160 A 1.5 V 270 ns 200 nC 1.5 A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. t e l o s b O 3/6 STP40NS15 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit c u d e t le ) s ( ct u d o o s b O - Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times r P e t e l o s b O 4/6 o r P ) s t( STP40NS15 TO-220 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. MAX. A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 D1 0.107 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 ) s t( G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 16.4 c u d 0.645 13.0 14.0 0.511 L5 2.65 2.95 0.104 L6 15.25 15.75 0.600 L7 6.2 6.6 0.244 L9 3.5 3.93 0.137 DIA. 3.75 3.85 0.147 0.551 e t le o s b O - o r P 0.116 0.620 0.260 0.154 0.151 u d o L2 G1 r P e G t e l o H2 D1 ) s ( ct F1 C D A L4 E L2 F Dia. F2 s b O TYP. L5 L9 L7 L6 L4 P011C 5/6 STP40NS15 c u d e t le ) s ( ct ) s t( o r P o s b O - u d o r P e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics © 2000 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 6/6