STP45N10F7

STD45N10F7, STI45N10F7, STP45N10F7 N-channel 100 V, 0.0145 Ω typ., 45 A, STripFET™ F7 Power MOSFETs in DPAK, I2PAK and TO-220 packages Datasheet - production data Features TAB TAB VDS RDS(on) max. ID PTOT 100 V 0.018 Ω 45 A 60 W Order code 3 1 DPAK STD45N10F7 3 12 STI45N10F7 2 I PAK TAB STP45N10F7 • Among the lowest RDS(on) on the market 1 2 • Excellent figure of merit (FoM) 3 • Low Crss/Ciss ratio for EMI immunity TO-220 • High avalanche ruggedness Figure 1. Internal schematic diagram Applications • Switching applications Description '7$% These N-channel Power MOSFETs utilize STripFET™ F7 technology with an enhanced trench gate structure that results in very low onstate resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. * 6 $0Y Table 1. Device summary Order code Marking Package Packing DPAK Tape and reel STD45N10F7 STI45N10F7 45N10F7 STP45N10F7 September 2015 This is information on a product in full production. I2PAK TO-220 DocID024455 Rev 2 Tube 1/20 www.st.com Contents STD45N10F7, STI45N10F7, STP45N10F7 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Test circuits .............................................. 8 4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.1 DPAK (TO-252) package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.2 I²PAK (TO-262) package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.3 TO-220 type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5 Packing mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2/20 DocID024455 Rev 2 STD45N10F7, STI45N10F7, STP45N10F7 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 100 V VGS Gate-source voltage ±20 V ID Drain current (continuous) at TC = 25 °C 45 A ID Drain current (continuous) at TC = 100 °C 32 A IDM(1) Drain current (pulsed) 180 A PTOT Total dissipation at Tc = 25 °C 60 W Single pulse avalanche energy 190 mJ EAS (2) TJ Operating junction temperature Tstg Storage temperature -55 to 175 °C °C 1. Pulse width limited by safe operating area. 2. Starting TJ = 25°C, Id = 10 A, Vdd = 50 V Table 3. Thermal resistance Value Symbol Parameter DPAK Rthj-case Thermal resistance junction-case Rthj-amb Thermal resistance junction-ambient Rthj-pcb (1) Thermal resistance junction-pcb 2.5 31.2 TO-220 I Unit 2PAK 2.5 °C/W 62.5 °C/W °C/W 1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 sec. DocID024455 Rev 2 3/20 20 Electrical characteristics 2 STD45N10F7, STI45N10F7, STP45N10F7 Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 4. On/off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage (VGS= 0) Max. Unit - V VDS = 100 V 10 µA VDS = 100 V; TC =125 °C 100 µA ±100 nA 4.5 V 0.0145 0.018 Ω Min. Typ. Max. Unit - 1640 - pF - 360 - pF - 25 - pF - 25 - nC - 5.1 - nC - 12.2 - nC Min. Typ. Max. Unit - 15 - ns - 17 - ns - 24 - ns - 8 - ns ID = 1 mA IDSS Zero gate voltage drain current (VGS = 0) IGSS Gate body leakage current (VDS = 0) VGS = ±20 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source onresistance VGS = 10 V, ID = 22.5 A Min. Typ. 100 2.5 Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions VDS = 50 V, f =1 MHz, VGS = 0 VDD = 50 V, ID = 45 A VGS = 10 V Figure 14 Table 6. Switching times Symbol td(on) tr td(off) tf 4/20 Parameter Test conditions Turn-on delay time Rise time Turn-off delay time VDD = 50 V, ID = 22.5 A, RG = 4.7 Ω, VGS = 10 V Figure 13 Fall time DocID024455 Rev 2 STD45N10F7, STI45N10F7, STP45N10F7 Electrical characteristics Table 7. Source-drain diode Symbol ISD ISDM (1) VSD(2) Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 45 A Source-drain current (pulsed) - 180 A 1.1 V Forward on voltage ISD = 45 A, VGS = 0 - trr Reverse recovery time - 53 ns Qrr Reverse recovery charge - 67 nC IRRM Reverse recovery current ISD = 45 A, di/dt = 100 A/µs, VDD = 80 V, Tj = 150 °C - 2.5 A 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration=300 µs, duty cycle 1.5%. DocID024455 Rev 2 5/20 20 Electrical characteristics 2.1 STD45N10F7, STI45N10F7, STP45N10F7 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance AM16107v1 ID (A) AM16120v1 K δ=0.5 s ai are n) his DS(o t R n n i ax tio m era d by p O ite Lim 100 0.2 0.1 10 100µs 1 10 -1 0.05 0.02 0.01 1ms 10ms 0.1 Tj=175°C Tc=25°C Single pulse 0.01 0.1 Single pulse 10 1 VDS(V) Figure 4. Output characteristics 10 -2 10 -5 10 -4 10 -3 10 -2 10 -1 tp(s) 10 0 Figure 5. Transfer characteristics AM16109v1 VGS=10V 160 9V 140 120 8V VDS=8V 140 120 100 100 7V 80 80 60 60 6V 40 20 0 AM16110v1 ID (A) ID (A) 5V 4 2 0 6 AM16111v1 VDD=50V ID=45A 12 20 0 0 VDS(V) 8 Figure 6. Gate charge vs gate-source voltage VGS (V) 40 2 4 8 6 10 VGS(V) Figure 7. Static drain-source on-resistance AM16112v1 RDS(on) (mΩ) 16.5 VGS=10V 16 10 15.5 8 15 6 14.5 4 14 2 13.5 13 0 0 6/20 5 10 15 20 25 30 Qg(nC) DocID024455 Rev 2 5 10 15 20 25 30 35 40 ID(A) STD45N10F7, STI45N10F7, STP45N10F7 Electrical characteristics Figure 8. Capacitance variations Figure 9. Normalized gate threshold voltage vs temperature AM16114v1 C (pF) AM16115v1 VGS(th) (norm) ID=250µA 1.2 Ciss 1 1000 0.8 Coss 0.6 100 0.4 Crss 0 0 20 40 60 80 VDS(V) Figure 10. Normalized on-resistance vs temperature Figure 11. Source-drain diode forward characteristics AM16116v1 RDS(on) AM16117v1 VSD(V) (norm) 2 0.2 -75 -50 -50 0 25 50 75 100 125150 TJ(°C) ID=22.5A VGS=10 V TJ=-55°C 1 0.9 TJ=25°C 1.5 0.8 0.7 1 TJ=175°C 0.6 0.5 0.5 0 -75 -50 -25 0 25 50 75 100 125 0.4 TJ(°C) 5 10 15 20 25 30 35 40 ISD(A) Figure 12. Normalized V(BR)DS vs temperature AM16119v1 V(BR)DS (norm) 1.04 ID=1mA 1.03 1.02 1.01 1 0.99 0.98 0.97 0.96 -75 -50 -25 0 25 50 75 100 125 TJ(°C) DocID024455 Rev 2 7/20 20 Test circuits 3 STD45N10F7, STI45N10F7, STP45N10F7 Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 Figure 15. Test circuit for inductive load switching and diode recovery times A A AM01469v1 Figure 16. Unclamped inductive load test circuit L A D G D.U.T. FAST DIODE B B VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 8/20 0 DocID024455 Rev 2 10% AM01473v1 STD45N10F7, STI45N10F7, STP45N10F7 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 DPAK (TO-252) package information Figure 19. DPAK (TO-252) type A package outline B$B DocID024455 Rev 2 9/20 20 Package information STD45N10F7, STI45N10F7, STP45N10F7 Table 8. DPAK (TO-252) type A mechanical data mm Dim. Min. Typ. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 4.95 E 6.40 E1 4.60 4.70 4.80 e 2.16 2.28 2.40 e1 4.40 4.60 H 9.35 10.10 L 1.00 1.50 (L1) 2.60 2.80 3.00 L2 0.65 0.80 0.95 L4 0.60 5.10 V2 5.25 6.60 1.00 R 10/20 Max. 0.20 0° 8° DocID024455 Rev 2 STD45N10F7, STI45N10F7, STP45N10F7 Package information Figure 20. DPAK footprint (a) )3BB5 a. All dimensions are in millimeters DocID024455 Rev 2 11/20 20 Package information 4.2 STD45N10F7, STI45N10F7, STP45N10F7 I²PAK (TO-262) package information Figure 21. I²PAK (TO-262) package outline 0004982_Rev_H 12/20 DocID024455 Rev 2 STD45N10F7, STI45N10F7, STP45N10F7 Package information Table 9. I²PAK (TO-262) mechanical data mm Dim. Min. Typ. Max. A 4.40 4.60 A1 2.40 2.72 b 0.61 0.88 b1 1.14 1.70 c 0.49 0.70 c2 1.23 1.32 D 8.95 9.35 e 2.40 2.70 e1 4.95 5.15 E 10 10.40 L 13 14 L1 3.50 3.93 L2 1.27 1.40 DocID024455 Rev 2 13/20 20 Package information 4.3 STD45N10F7, STI45N10F7, STP45N10F7 TO-220 type A package information Figure 22. TO-220 type A package outline BW\SH$B5HYB7 14/20 DocID024455 Rev 2 STD45N10F7, STI45N10F7, STP45N10F7 Package information Table 10. TO-220 type A mechanical data mm Dim. Min. Typ. Max. A 4.40 4.60 b 0.61 0.88 b1 1.14 1.70 c 0.48 0.70 D 15.25 15.75 D1 1.27 E 10 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13 14 L1 3.50 3.93 L20 16.40 L30 28.90 ∅P 3.75 3.85 Q 2.65 2.95 DocID024455 Rev 2 15/20 20 Packing mechanical data 5 STD45N10F7, STI45N10F7, STP45N10F7 Packing mechanical data Figure 23. Tape 10 pitches cumulative tolerance on tape +/- 0.2 mm T P0 Top cover tape P2 D E F B1 K0 For machine ref. only including draft and radii concentric around B0 W B0 A0 P1 D1 User direction of feed R Bending radius User direction of feed AM08852v1 16/20 DocID024455 Rev 2 STD45N10F7, STI45N10F7, STP45N10F7 Packing mechanical data Figure 24. Reel T REEL DIMENSIONS 40mm min. Access hole At slot location B D C N A Full radius Tape slot in core for tape start 25 mm min. width G measured at hub AM08851v2 DocID024455 Rev 2 17/20 20 Packing mechanical data STD45N10F7, STI45N10F7, STP45N10F7 Table 11. DPAK (TO-252) tape and reel mechanical data Tape Reel mm mm Dim. Dim. Min. Max. A0 6.8 7 A B0 10.4 10.6 B 1.5 12.1 C 12.8 1.6 D 20.2 G 16.4 50 B1 18/20 Min. Max. 330 13.2 D 1.5 D1 1.5 E 1.65 1.85 N F 7.4 7.6 T K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3 DocID024455 Rev 2 18.4 22.4 STD45N10F7, STI45N10F7, STP45N10F7 6 Revision history Revision history Table 12. Document revision history Date Revision 10-Oct-2013 1 First release. 2 Updated title, features and description in cover page Updated Table 2.: Absolute maximum ratings Updated 4.1: DPAK (TO-252) package information Minor text changes. 08-Sep-2015 Changes DocID024455 Rev 2 19/20 20 STD45N10F7, STI45N10F7, STP45N10F7 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved 20/20 DocID024455 Rev 2