®
STP60NS04Z
N - CHANNEL CLAMPED 10mΩ - 60A - TO-220 FULLY PROTECTED MESH OVERLAY™ MOSFET
PRELIMINARY DATA TYPE STP60NS04Z
s s s s
V DSS
R DS(on)
ID 60 A
CLAMPED ID(o n) x R DS(on )ma x V GS = 10 V
DYNAMIC
Symbo l g f s (∗ ) C iss C os s C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Con ditions V DS > ID(o n) x R DS(on )ma x V DS = 25 V f = 1 MHz I D =30 A V GS = 0 Min. 20 Typ. 30 2500 800 150 3400 1100 200 Max. Unit S pF pF pF
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STP60NS04Z
ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symbo l Qg Q gs Q gd Parameter Total G ate Charge Gate-Source Charge Gate-Drain Charge Test Con ditions V DD = 16 V I D = 60 A V GS = 10 V Min. Typ. 70 20 22 Max. 100 Unit nC nC nC
SWITCHING OFF
Symbo l tr (Voff) tf tc Parameter Off-voltage Rise T ime Fall T ime Cross-over Time Test Con ditions V CLAMP = 30 V I D = 60 A R G =4.7 Ω V GS = 10 V (see test circuit, figure 5) Min. Typ. 25 110 150 Max. 35 150 200 Unit ns ns ns
SOURCE DRAIN DIODE
Symbo l ISD I SDM (• ) V SD ( ∗ ) t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 60 A V GS = 0 65 0.15 4.5 I SD = 60 A di/dt = 100 A/ µ s Tj = 150 oC V r = 25 V (see test circuit, figure 5) Test Con ditions Min. Typ. Max. 60 240 1.5 Unit A A V ns µC A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area
Safe Operating Area
Thermal Impedance
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STP60NS04Z
Output Characteristics Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
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STP60NS04Z
Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature
Zero Gate Voltage Drain Current vs Temperature
Source-drain Diode Forward Characteristics
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STP60NS04Z
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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STP60NS04Z
TO-220 MECHANICAL DATA
DIM. MIN. A C D D1 E F F1 F2 G G1 H2 L2 L4 L5 L6 L7 L9 DIA. 13.0 2.65 15.25 6.2 3.5 3.75 0.49 0.61 1.14 1.14 4.95 2.4 10.0 16.4 14.0 2.95 15.75 6.6 3.93 3.85 0.511 0.104 0.600 0.244 0.137 0.147
E
mm TYP. MAX. 4.60 1.32 2.72 1.27 0.70 0.88 1.70 1.70 5.15 2.7 10.40 0.019 0.024 0.044 0.044 0.194 0.094 0.393 MIN. 0.173 0.048 0.094 4.40 1.23 2.40
inch TYP. MAX. 0.181 0.051 0.107 0.050 0.027 0.034 0.067 0.067 0.203 0.106 0.409 0.645 0.551 0.116 0.620 0.260 0.154 0.151
A
C
D1
L2 F1
D
G1
Dia. F2 F
L5 L7 L6
L9
L4
G
H2
P011C
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STP60NS04Z
Information furnished is believed to be accurate and reliable. However, STMicroelect onics assumes no responsibil ity for the consequences r of use of such information nor for any infringement of patents or other rights of third partes which may result from its use. No license is i granted by implication or otherwise under any patent or patent rights of STMicroelectro nics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all informaton previously supplied. STMicroelectronics products i are not authorized for use as critical components in life support devices or systems with express written approval of STMicroelectronics. out The ST logo is a trademark of STMicroelectronics © 1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japa - Malaysia - Malta - Morocco n Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.
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