STP8NM50

N-CHANNEL 500V - 0.7Ω - 8A TO-220/TO-220FP MDmesh™Power MOSFET TYPE STP8NM50 STP8NM50FP n n n n n STP8NM50 STP8NM50FP VDSS 500V 500V RDS(on) < 0.8Ω < 0.8Ω ID 8A 8A TYPICAL RDS(on) = 0.7Ω HIGH dv/dt AND AVALANCHE CAPABILITIES 100% AVALANCHE TESTED LOW INPUT CAPACITANCE AND GATE CHARGE LOW GATE INPUT RESISTANCE 3 1 2 1 3 2 TO-220 TO-220FP DESCRIPTION The MDmesh™ is a new revolutionary MOSFET technology that associates the Multiple Drain process with the Company’s PowerMESH™ horizontal layout. The resulting product has an outstanding low on-resistance, impressively high dv/dt and excellent avalanche characteristics. The adoption of the Company’s proprietary strip technique yields overall dynamic performance that is significantly better than that of similar competition’s products. APPLICATIONS The MDmesh™ family is very suitable for increasing power density of high voltage converters allowing system miniaturization and higher efficiencies. INTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID ID IDM (l) PTOT dv/dt VISO Tstg Tj August 2002 Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Peak Diode Recovery voltage slope Insulation Winthstand Voltage (DC) Storage Temperature Max. Operating Junction Temperature -–65 to 150 (*)Limited only by maximum temperature allowed Value STP8NM50 500 500 ±30 5 3.1 20 120 0.4 15 2500 5 (*) 3.1 (*) 20 (*) 30 STP8NM50FP Unit V V V A A A W W/°C V/ns V °C (•)Pulse width limited by safe operating area 1/9 STP8NM50/STP8NM50FP THERMAL DATA TO-220 / I²PAK Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Max Max 1.04 62.5 300 TO-220FP 4.21 °C/W °C/W °C Maximum Lead Temperature For Soldering Purpose AVALANCHE CHARACTERISTICS Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) Max Value 2.5 200 Unit A mJ ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 µA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 °C VGS = ±30V Min. 500 1 10 ±100 Typ. Max. Unit V µA µA nA ON (1) Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS, ID = 250µA VGS = 10V, ID = 2.5A Min. 3 Typ. 4 0.7 Max. 5 0.8 Unit V Ω DYNAMIC Symbol gfs (1) Ciss Coss Crss Coss eq. (2) RG Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Equivalent Output Capacitance Gate Input Resistance VGS = 0V, VDS = 0V to 400V f=1 MHz Gate DC Bias = 0 Test Signal Level = 20mV Open Drain Test Conditions VDS > ID(on) x RDS(on)max, ID = 2.5A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 2.4 415 88 12 50 3 Max. Unit S pF pF pF pF Ω 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. 2/9 STP8NM50/STP8NM50FP ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 250V, ID = 2.5A RG = 4.7Ω VGS = 10V (see test circuit, Figure 3) VDD = 400V, ID = 5A, VGS = 10V Min. Typ. 16 8 13 4 6 Max. Unit ns ns nC nC nC SWITCHING OFF Symbol tr(Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 400V, ID = 5A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 5) Min. Typ. 14 6 13 Max. Unit ns ns ns SOURCE DRAIN DIODE Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Charge Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Charge ISD = 5A, VGS = 0 ISD = 5A, di/dt = 100A/µs, VDD = 100 V, Tj = 25°C (see test circuit, Figure 5) ISD = 5A, di/dt = 100A/µs, VDD = 100 V, Tj = 150°C (see test circuit, Figure 5) 185 1.1 11.5 270 1.6 12 Test Conditions Min. Typ. Max. 5 20 1.5 Unit A A V ns µC A ns µC A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. Pulse width limited by safe operating area. Safe Operating Area For TO-220 Safe Operating Area For TO-220FP 3/9 STP8NM50/STP8NM50FP Thermal Impedance For TO-220 Thermal Impedance For TO-220FP Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance 4/9 STP8NM50/STP8NM50FP Gate Charge vs Gate-source Voltage Capacitance Variations Normalized Gate Threshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/9 STP8NM50/STP8NM50FP Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STP8NM50/STP8NM50FP TO-220 MECHANICAL DATA DIM. MIN. A C D D1 E F F1 F2 G G1 H2 L2 L4 L5 L6 L7 L9 DIA. 13.0 2.65 15.25 6.2 3.5 3.75 0.49 0.61 1.14 1.14 4.95 2.4 10.0 16.4 14.0 2.95 15.75 6.6 3.93 3.85 0.511 0.104 0.600 0.244 0.137 0.147 4.40 1.23 2.40 1.27 0.70 0.88 1.70 1.70 5.15 2.7 10.40 0.019 0.024 0.044 0.044 0.194 0.094 0.393 0.645 0.551 0.116 0.620 0.260 0.154 0.151 mm TYP. MAX. 4.60 1.32 2.72 MIN. 0.173 0.048 0.094 0.050 0.027 0.034 0.067 0.067 0.203 0.106 0.409 inch TYP. MAX. 0.181 0.051 0.107 A C D1 L2 D F1 G1 E Dia. L5 L7 L6 L4 P011C L9 F2 F G H2 7/9 STP8NM50/STP8NM50FP TO-220FP MECHANICAL DATA DIM. MIN. A B D E F F1 F2 G G1 H L2 L3 L4 L6 L7 Ø 28.6 9.8 15.9 9 3 4.4 2.5 2.5 0.45 0.75 1.15 1.15 4.95 2.4 10 16 30.6 10.6 16.4 9.3 3.2 1.126 0.385 0.626 0.354 0.118 mm TYP. MAX. 4.6 2.7 2.75 0.7 1 1.7 1.7 5.2 2.7 10.4 MIN. 0.173 0.098 0.098 0.017 0.030 0.045 0.045 0.195 0.094 0.393 0.630 1.204 0.417 0.645 0.366 0.126 inch TYP. MAX. 0.181 0.106 0.108 0.027 0.039 0.067 0.067 0.204 0.106 0.409 A B L3 L6 L7 F1 D ¯ F G1 E H F2 123 L2 L4 8/9 G STP8NM50/STP8NM50FP Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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