STP9N80K5, STW9N80K5
N-channel 800 V, 0.73 Ω typ., 7 A MDmesh™ K5
Power MOSFETs in a TO-220 and TO-247 packages
Datasheet - production data
Features
TAB
Order code
STP9N80K5
STW9N80K5
1
TO-220
2
3
3
2
1
TO-247
Figure 1: Internal schematic diagram
VDS
RDS(on) max.
ID
800 V
0.90 Ω
7A
Industry’s lowest RDS(on) x area
Industry’s best FoM (figure of merit)
Ultra-low gate charge
100% avalanche tested
Zener-protected
Applications
Switching applications
Description
These very high voltage N-channel Power
MOSFET are designed using MDmesh™ K5
technology based on an innovative proprietary
vertical structure. The result is a dramatic
reduction in on-resistance and ultra-low gate
charge for applications requiring superior power
density and high efficiency.
Table 1: Device summary
Order code
STP9N80K5
STW9N80K5
July 2016
Marking
9N80K5
DocID028461 Rev 3
This is information on a product in full production.
Package
TO-220
TO-247
Packing
Tube
1/16
www.st.com
Contents
STP9N80K5, STW9N80K5
Contents
1
Electrical ratings ............................................................................. 3
2
Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 6
3
Test circuits ..................................................................................... 9
4
Package information ..................................................................... 10
5
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4.1
TO-220 type A package information................................................ 11
4.2
TO-247 package information ........................................................... 13
Revision history ............................................................................ 15
DocID028461 Rev 3
STP9N80K5, STW9N80K5
1
Electrical ratings
Electrical ratings
Table 2: Absolute maximum ratings
Symbol
Parameter
VGS
Value
Unit
± 30
V
7
A
Gate-source voltage
ID
Drain current (continuous) at TC= 25 °C
ID
Drain current (continuous) at TC = 100 °C
4.4
A
Drain current (pulsed)
28
A
W
ID(1)
PTOT
Total dissipation at TC = 25 °C
110
dv/dt
(2)
Peak diode recovery voltage slope
4.5
dv/dt
(3)
MOSFET dv/dt ruggedness
50
TJ
Operating unction temperature range
Tstg
Storage temperature range
V/ns
- 55 to 150
°C
Notes:
(1)Pulse
(2)I
SD
(3)V
width limited by safe operating area.
≤ 7 A, di/dt≤ 100 A/μs; VDS peak < V(BR)DSS,VDD= 640 V
DS
≤ 640 V
Table 3: Thermal data
Symbol
Parameter
Value
TO-220
Rthj-case
Thermal resistance junction-case
Rthj-amb
Thermal resistance junction-ambient
Unit
TO-247
1.14
62.5
°C/W
50
°C/W
Table 4: Avalanche characteristics
Symbol
Parameter
Value
Unit
IAR
Avalanche current, repetitive or not repetitive (pulse width limited by
Tjmax)
2.4
A
EAS
Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR,
VDD = 50 V)
200
mJ
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Electrical characteristics
2
STP9N80K5, STW9N80K5
Electrical characteristics
TC = 25 °C unless otherwise specified
Table 5: On/off-state
Symbol
V(BR)DSS
Parameter
Drain-source breakdown voltage
Test conditions
Min.
VGS = 0 V, ID = 1 mA
800
Typ.
Max.
Unit
V
VGS = 0 V, VDS = 800 V
1
µA
IDSS
Zero gate voltage drain current
VGS = 0 V, VDS = 800 V
TC = 125 °C(1)
50
µA
IGSS
Gate body leakage current
VDS = 0 V, VGS = ±20 V
±10
µA
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 100 µA
4
5
V
RDS(on)
Static drain-source on-resistance
VGS = 10 V, ID = 3.5 A
0.73
0.90
Ω
Min.
Typ.
Max.
Unit
-
340
-
pF
-
37
-
pF
3
Notes:
(1)Defined
by design, not subject to production test.
Table 6: Dynamic
Symbol
Ciss
Parameter
Test conditions
Input capacitance
VDS = 100 V, f = 1 MHz,
VGS = 0 V
Coss
Output capacitance
Crss
Reverse transfer capacitance
-
0.65
-
pF
Co(tr)(1)
Equivalent capacitance time
related
-
61
-
pF
Co(er)(2)
Equivalent capacitance
energy related
Rg
Intrinsic gate resistance
f = 1 MHz open drain
-
7
-
Ω
Qg
Total gate charge
-
12
-
nC
Qgs
Gate-source charge
Qgd
Gate-drain charge
VDD = 640 V, ID = 7 A
VGS= 10 V
See (Figure 16: "Test circuit
for gate charge behavior")
VGS = 0 V, VDS = 0 to 640 V
22
pF
-
3.8
-
nC
-
6.7
-
nC
Notes:
(1)C
o(tr)
is a constant capacitance value that gives the same charging time as Coss while V DS is rising from 0 to
80% VDSS.
(2)C
o(er)
is a constant capacitance value that gives the same stored energy as Coss while V DS is rising from 0 to
80% VDSS.
Table 7: Switching times
Symbol
td(on)
tr
td(off)
tf
4/16
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
VDD= 400 V, ID =3.5 A, RG = 4.7 Ω
VGS = 10 V
See (Figure 15: "Test circuit for
resistive load switching times" and
Figure 20: "Switching time
waveform")
DocID028461 Rev 3
Min.
Typ.
Max.
Unit
-
11
-
ns
-
5.7
-
ns
-
65.3
-
ns
-
13.6
-
ns
STP9N80K5, STW9N80K5
Electrical characteristics
Table 8: Source-drain diode
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
ISD
Source-drain current
-
7
A
ISDM(1)
Source-drain current
(pulsed)
-
28
A
VSD(2)
Forward on voltage
-
1.5
V
ISD = 7 A, VGS = 0 V
trr
Reverse recovery time
Qrr
Reverse recovery
charge
IRRM
Reverse recovery
current
trr
Reverse recovery time
Qrr
Reverse recovery
charge
IRRM
Reverse recovery
current
ISD = 7 A, di/dt = 100 A/µs,
VDD = 60 V
See Figure 17: "Test circuit for
inductive load switching and
diode recovery times"
ISD = 7 A, di/dt = 100 A/µs
VDD = 60 V, Tj = 150 °C
See Figure 17: "Test circuit for
inductive load switching and
diode recovery times"
-
292
ns
-
2.66
µC
-
18.2
A
-
477
ns
-
3.91
µC
-
16.4
A
Notes:
(1)Pulse
width limited by safe operating area
(2)Pulsed:
pulse duration = 300 µs, duty cycle 1.5%
Table 9: Gate-source Zener diode
Symbol
V(BR)GSO
Parameter
Gate-source breakdown voltage
Test conditions
IGS= ± 1mA,ID= 0 A
Min.
Typ.
Max.
Unit
30
-
-
V
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD
performance of the device. The Zener voltage facilitates efficient and cost-effective device
integrity protection, thus eliminating the need for additional external componentry.
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Electrical characteristics
2.1
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STP9N80K5, STW9N80K5
Electrical characteristics (curves)
Figure 2: Safe operating area
Figure 3: Thermal impedance
Figure 4: Output characteristics
Figure 5: Transfer characteristics
Figure 6: Gate charge vs gate-source voltage
Figure 7: Static drain-source on-resistance
DocID028461 Rev 3
STP9N80K5, STW9N80K5
Electrical characteristics
Figure 8: Capacitance variations
Figure 9: Normalized gate threshold voltage
vs temperature
Figure 10: Normalized on-resistance vs
temperature
Figure 11: Normalized V(BR)DSS vs
temperature
Figure 12: Output capacitance stored energy
Figure 13: Source-drain diode forward
characteristics
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Electrical characteristics
STP9N80K5, STW9N80K5
Figure 14: Maximum avalanche energy vs starting TJ
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DocID028461 Rev 3
STP9N80K5, STW9N80K5
3
Test circuits
Test circuits
Figure 16: Test circuit for gate charge
behavior
Figure 15: Test circuit for resistive load
switching times
Figure 17: Test circuit for inductive load
switching and diode recovery times
Figure 18: Unclamped inductive load test
circuit
Figure 19: Unclamped inductive waveform
DocID028461 Rev 3
Figure 20: Switching time waveform
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Package information
4
STP9N80K5, STW9N80K5
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
10/16
DocID028461 Rev 3
STP9N80K5, STW9N80K5
4.1
Package information
TO-220 type A package information
Figure 21: TO-220 type A package outline
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11/16
Package information
STP9N80K5, STW9N80K5
Table 10: TO-220 type A mechanical data
mm
Dim.
Min.
Max.
A
4.40
4.60
b
0.61
0.88
b1
1.14
1.55
c
0.48
0.70
D
15.25
15.75
D1
12/16
Typ.
1.27
E
10.00
10.40
e
2.40
2.70
e1
4.95
5.15
F
1.23
1.32
H1
6.20
6.60
J1
2.40
2.72
L
13.00
14.00
L1
3.50
3.93
L20
16.40
L30
28.90
øP
3.75
3.85
Q
2.65
2.95
DocID028461 Rev 3
STP9N80K5, STW9N80K5
4.2
Package information
TO-247 package information
Figure 22: TO-247 package outline
DocID028461 Rev 3
13/16
Package information
STP9N80K5, STW9N80K5
Table 11: TO-247 package mechanical data
mm
Dim.
Min.
Max.
A
4.85
5.15
A1
2.20
2.60
b
1.0
1.40
b1
2.0
2.40
b2
3.0
3.40
c
0.40
0.80
D
19.85
20.15
E
15.45
15.75
e
5.30
L
14.20
14.80
L1
3.70
4.30
L2
14/16
Typ.
5.45
5.60
18.50
ØP
3.55
ØR
4.50
S
5.30
DocID028461 Rev 3
3.65
5.50
5.50
5.70
STP9N80K5, STW9N80K5
5
Revision history
Revision history
Table 12: Document revision history
Date
Revision
Changes
13-Oct-2015
1
First release.
20-May-2016
2
Modified: Table 4: "Avalanche characteristics", Table 6: "Dynamic",
Table 7: "Switching times" and Table 8: "Source-drain diode".
Minor text changes
26-Jul-2016
3
Updated features in cover page.
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STP9N80K5, STW9N80K5
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