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STS11NF3LL

STS11NF3LL

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

  • 描述:

    STS11NF3LL - N-CHANNEL 30V - 0.009 ohm - 11A SO-8 LOW GATE CHARGE STripFET POWER MOSFET - STMicroele...

  • 数据手册
  • 价格&库存
STS11NF3LL 数据手册
® STS11NF3LL N-CHANNEL 30V - 0.009 Ω - 11A SO-8 LOW GATE CHARGE STripFET™ POWER MOSFET PRELIMINARY DATA TYPE STS11NF3LL s s s s V DSS 30 V R DS(on) < 0.011 Ω ID 11 A TYPICAL RDS(on) = 0.011 Ω @ 4.5V OPTIMAL RDS(on) x Qg TRADE-OFF @ 4.5V CONDUCTION LOSSES REDUCED SWITCHING LOSSES REDUCED DESCRIPTION This application specific Power Mosfet is the third generation of STMicroelectronics unique ”Single Feature Size™” strip-based process. The resulting transistor shows the best trade-off between on-resistance and gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high efficiency are of paramount importance. APPLICATIONS s SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY CPU CORE DC/DC CONVERTERS FOR MOBILE PCs SO-8 I NTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symb ol V DS V DGR V GS ID Parameter Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 k Ω) G ate-source Voltage Drain Current (continuous) at Tc = 25 C Drain Current (continuous) at Tc = 100 o C Drain Current (pulsed) T otal Dissipation at Tc = 25 C o o Value 30 30 ± 15 11 7 44 2.5 Un it V V V A A A W I DM ( • ) P tot (•) Pulse width limited by safe operating area May 2000 1/6 STS11NF3LL THERMAL DATA R thj -amb Tj T s tg (*)Thermal Resistance Junction-ambient Maximum Operating Junction T emperature Storage Temperature 50 150 -65 to 150 o C/W o C o C (*) Mounted on FR-4 board (t ≤ 1 0sec) ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS I DSS IGSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µ A V GS = 0 Min. 30 1 10 ± 100 Typ. Max. Unit V µA µA nA V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating Gate-body Leakage Current (VDS = 0) V GS = ± 20 V T c = 125 oC ON (∗) Symbo l V GS(th) R DS(on) I D(o n) Parameter Gate Threshold Voltage V DS = V GS Static Drain-source On Resistance On State Drain Current V GS = 10 V V GS = 4.5 V Test Con ditions ID = 250 µ A I D = 5.5 A I D = 5.5 A 11 Min. 1 0.009 0.011 0.011 0.013 Typ. Max. Unit V Ω Ω A V DS > ID(o n) x R DS(on )ma x V GS = 10 V DYNAMIC Symbo l g f s (∗ ) C iss C os s C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Con ditions V DS > ID(o n) x R DS(on )ma x V DS = 25 V f = 1 MHz I D = 5.5 A V GS = 0 V Min. Typ. 20 1700 500 115 Max. Unit S pF pF pF 2/6 STS11NF3LL ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l t d(on) tr Qg Q gs Q gd Parameter Turn-on Delay T ime Rise Time Total G ate Charge Gate-Source Charge Gate-Drain Charge Test Con ditions V DD = 15 V I D = 5.5 A R G = 4.7 Ω V GS = 4.5 V (Resistive Load, see fig.3) V DD = 24 V ID = 11 A V GS = 4.5 V Min. Typ. 47 60 25 10 10 33 Max. Unit ns ns nC nC nC SWITCHING OFF Symbo l t d(of f) tf Parameter Turn-off Delay T ime Fall T ime Test Con ditions V DD = 24 V I D = 5.5 A R G = 4.7 Ω VGS = 4.5 V (Resistive Load, see fig.3) Min. Typ. 34 24 Max. Unit ns ns SOURCE DRAIN DIODE Symbo l ISD I SDM (• ) V SD ( ∗ ) t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 11 A V GS = 0 40 52 2.4 I SD = 11 A di/dt = 100 A/µ s Tj = 150 o C V DD = 15 V (Resistive Load, see fig.5) Test Con ditions Min. Typ. Max. 11 44 1.5 Unit A A V ns nC A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area 3/6 STS11NF3LL Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 4/6 STS11NF3LL SO-8 MECHANICAL DATA DIM. MIN. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 3.8 0.4 4.8 5.8 1.27 3.81 4.0 1.27 0.6 8 (max.) 0.14 0.015 5.0 6.2 0.65 0.35 0.19 0.25 0.1 mm TYP. MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019 0016023 5/6 STS11NF3LL Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics © 2000 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 6/6
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