0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
STS7NF60L

STS7NF60L

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    SOT96-1

  • 描述:

    MOSFET N-CH 60V 7.5A 8-SOIC

  • 数据手册
  • 价格&库存
STS7NF60L 数据手册
N-CHANNEL 60V - 0.017 Ω - 7.5A SO-8 STripFET™ II POWER MOSFET TYPE STS7NF60L s s STS7NF60L VDSS 60 V RDS(on) < 0.0195 Ω ID 7.5 A s TYPICAL RDS(on) = 0.017 Ω STANDARD OUTLINE FOR EASY AUTOMATED SURFACE MOUNT ASSEMBLY LOW THRESHOLD DRIVE DESCRIPTION This Power MOSFET is the latest development of STMicroelectronis unique "Single Feature Size™" strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS s DC MOTOR DRIVE s DC-DC CONVERTERS s BATTERY MANAGEMENT IN NOMADIC EQUIPMENT s POWER MANAGEMENT IN PORTABLE/DESKTOP PCs SO-8 INTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID ID IDM(•) Ptot EAS (1) April 2002 . Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Single Pulse Avalanche Energy Value 60 60 ± 16 7.5 4.7 30 2.5 350 (1) Starting T j = 25 oC, ID = 7.5 A VDD = 30 V Unit V V V A A A W mJ (•) Pulse width limited by safe operating area. 1/8 STS7NF60L THERMAL DATA Rthj-amb(#) Tj Tstg Thermal Resistance Junction-ambient Maximum Operating Junction Temperature Storage Temperature Max 50 150 -55 to 150 °C/W °C °C (#) When Mounted on 1 inch2 FR-4 board, 2 oz of Cu and t [ 10 sec. ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified) OFF Symbol V(BR)DSS IDSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 µA, VGS = 0 VDS = Max Rating VDS = Max Rating TC = 125°C VGS = ± 16 V Min. 60 1 10 ±100 Typ. Max. Unit V µA µA nA IGSS ON (*) Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS VGS = 10 V VGS = 5 V ID = 250 µA ID = 3.5 A ID = 3.5 A Min. 1 0.017 0.019 0.0195 0.0215 Typ. Max. Unit V Ω Ω DYNAMIC Symbol gfs Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS = 15 V ID = 3.5 A Min. Typ. 13 1700 300 100 Max. Unit S pF pF pF VDS = 25V, f = 1 MHz, VGS = 0 2/8 STS7NF60L ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol td(on) tr Qg Qgs Qgd (*) Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge (*) Test Conditions ID = 3.5 A VDD = 30 V RG = 4.7 Ω VGS = 4.5 V (Resistive Load, Figure 1) VDD= 48V ID 7.5A VGS=4.5V (see test circuit, Figure 2) Min. Typ. 15 27 25 4.5 7 Max. Unit ns ns 34 nC nC nC SWITCHING OFF Symbol td(off) tf Parameter Turn-off Delay Time Fall Time Test Conditions ID = 3.5 A VDD = 30 V RG = 4.7Ω, VGS = 4.5 V (Resistive Load, Figure 1) Min. Typ. 47 20 Max. Unit ns ns SOURCE DRAIN DIODE Symbol ISD ISDM (•) VSD trr Qrr IRRM (*) Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Test Conditions Min. Typ. Max. 7.5 30 Unit A A V ns nC A ISD = 7.5 A VGS = 0 55 110 3.9 1.2 di/dt = 100A/µs ISD =7.5 A VDD = 20 V Tj = 150°C (see test circuit, Figure 3) (*) Pulse width [ 300 µs, duty cycle 1.5 %. (•)Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/8 STS7NF60L Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STS7NF60L Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized Breakdown Voltage vs Temperature . . 5/8 STS7NF60L Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STS7NF60L SO-8 MECHANICAL DATA DIM. MIN. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 3.8 0.4 4.8 5.8 1.27 3.81 4.0 1.27 0.6 8 (max.) 0.14 0.015 5.0 6.2 0.65 0.35 0.19 0.25 0.1 mm TYP. MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019 0016023 7/8 STS7NF60L Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics ® 2002 STMicroelectronics - All Rights Reserved All other names are the property of their respective owners. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com 8/8
STS7NF60L 价格&库存

很抱歉,暂时无法提供与“STS7NF60L”相匹配的价格&库存,您可以联系我们找货

免费人工找货