STS9NH3LL

STS9NH3LL N-channel 30 V - 0.018 Ω - 9 A - SO-8 low gate charge STripFET™ III Power MOSFET Features Type STS9NH3LL ■ ■ ■ VDSS 30 V RDS(on) max 0.022 Ω ID 9A Optimal RDS(on) x Qg trade-off @ 4.5 V Conduction losses reduced Switching losses reduced SO-8 Application ■ Switching applications Description This application specific Power MOSFET is the third generation of STMicroelectronics unique “single feature size” strip-based process. The resulting transistor shows the best trade-off between on-resistance and gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high efficiency are of paramount importance. Figure 1. Internal schematic diagram Table 1. Device summary Marking S9NH3LL Package SO-8 Packaging Tape & reel Order code STS9NH3LL December 2007 Rev 3 1/13 www.st.com 13 Contents STS9NH3LL Contents 1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................. 6 3 4 5 Test circuit ................................................ 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2/13 STS9NH3LL Electrical ratings 1 Electrical ratings Table 2. Symbol VDS VGS ID ID IDM (1) Absolute maximum ratings Parameter Drain-source voltage (VGS = 0) Gate-source voltage Drain current (continuous) at TC = 25 °C Drain current (continuous) at TC= 100 °C Drain current (pulsed) Total dissipation at TC = 25 °C Single pulse avalanche energy Operating junction temperature Storage temperature Value 30 ±16 9 6 36 2.5 100 -55 to 150 Unit V V A A A W mJ °C PTOT EAS (2) TJ Tstg 1. Pulse width limited by safe operating area 2. Starting TJ = 25 °C, ID = 6 A. Table 3. Symbol Rthj-amb(1) Thermal data Parameter Thermal resistance junction-ambient max Value 50 Unit °C/W 1. When mounted on 1 inch² FR-4 board, 2oz Cu (t < 10 sec.) 3/13 Electrical characteristics STS9NH3LL 2 Electrical characteristics (TCASE=25°C unless otherwise specified) Table 4. Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) On/off states Parameter Drain-source breakdown voltage Zero gate voltage drain current (VGS = 0) Gate body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance Test conditions ID = 250 µA, VGS= 0 VDS = Max rating VDS = Max rating @ 125 °C VGS = ±16 V VDS= VGS, ID = 250 µA VGS= 10 V, ID= 4.5 A VGS= 4.5 V, ID= 4.5 A 1 0.018 0.020 0.022 0.025 Min. 30 1 10 ±100 Typ. Max. Unit V µA µA nA V Ω Ω Table 5. Symbol gfs (1) Ciss Coss Crss Qg Qgs Qgd Dynamic Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge Test conditions VDS =10 V, ID = 4.5 A Min. Typ. 8.5 857 147 20 7.0 2.5 2.3 10 Max. Unit S pF pF pF nC nC nC VDS = 25 V, f=1 MHz, VGS=0 VDD= 15 V, ID = 9 A VGS = 4.5 V, (see Figure 16) 1. Pulsed: pulse duration=300 µs, duty cycle 1.5% 4/13 STS9NH3LL Electrical characteristics Table 6. Symbol td(on) tr td(off) tf Switching times Parameter Turn-on delay time Rise time Test conditions VDD=15 V, ID= 4.5 A, RG= 4.7 Ω, VGS= 4.5 V (see Figure 15) VDD=15 V, ID= 4.5 A, RG= 4.7 Ω, VGS= 4.5 V (see Figure 15) Min. Typ. 12 14.5 Max. Unit ns ns Turn-off delay time Fall time 23 8 ns ns Table 7. Symbol ISD ISDM(1) VSD(2) trr Qrr IRRM Source drain diode Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD= 4.5 A, VGS=0 ISD= 9 A, di/dt = 100 A/µs, VDD = 15 V, Tj=150 °C (see Figure 17) 15 5.7 0.76 Test conditions Min. Typ. Max. 9 36 1.5 Unit A A V ns nC A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration=300 µs, duty cycle 1.5% 5/13 Electrical characteristics STS9NH3LL 2.1 Figure 2. Electrical characteristics (curves) Safe operating area Figure 3. Thermal impedance Figure 4. Output characteristics Figure 5. Transfer characteristics Figure 6. Transconductance Figure 7. Static drain-source on resistance 6/13 STS9NH3LL Figure 8. Gate charge vs gate-source voltage Figure 9. Electrical characteristics Capacitance variations Figure 10. Normalized gate threshold voltage vs temperature Figure 11. Normalized on resistance vs temperature Figure 12. Source-drain diode forward characteristics Figure 13. Normalized breakdown voltage vs temperature 7/13 Electrical characteristics Figure 14. Normalized on resistance vs temperature (VGS = 4.5V) STS9NH3LL 8/13 STS9NH3LL Test circuit 3 Test circuit Figure 16. Gate charge test circuit Figure 15. Switching times test circuit for resistive load Figure 17. Test circuit for inductive load Figure 18. Unclamped inductive load test switching and diode recovery times circuit Figure 19. Unclamped inductive waveform Figure 20. Switching time waveform 9/13 Package mechanical data STS9NH3LL 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 10/13 STS9NH3LL Package mechanical data SO-8 MECHANICAL DATA DIM. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 3.8 0.4 4.8 5.8 1.27 3.81 4.0 1.27 0.6 8 (max.) 0.14 0.015 5.0 6.2 0.65 0.35 0.19 0.25 0.1 mm. MIN. TYP MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019 11/13 Revision history STS9NH3LL 5 Revision history Table 8. Date 24-Jul-2006 15-May-2007 12-Dec-2007 Document revision history Revision 1 2 3 Initial release. Update on Table 2. – Inserted Figure 14: Normalized on resistance vs temperature (VGS = 4.5V) – Inserted new EAS value on Table 2. Changes 12/13 STS9NH3LL Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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