STSPIN220
Datasheet
Low voltage stepper motor driver
Features
•
•
Operating voltage: from 1.8 to 10 V
Maximum output current: 1.3 Arms
•
RDS(ON) HS + LS = 0.4 Ω typ.
•
•
•
Microstepping up to 1/256th of a step
Current control with programmable off-time
Full protection set
–
Non-dissipative overcurrent protection
–
Short-circuit protection
–
Thermal shutdown
Energy saving and long battery life with standby consumption less than 80 nA
•
Applications
Product status link
Battery-powered stepper motor applications such as:
•
Pop-up camera control for smartphones
•
Point of sale (POS) devices
•
Portable printers
•
PC peripherals and accessories
•
Robotics
•
Toys
•
Reflex cameras
STSPIN220
Product summary
Order code
STSPIN220
Package
VFQFPN 3x3x1.0
16L
Packing
Tape & reel
Description
The STSPIN220 is a stepper motor driver which integrates, in a small VFQFPN 3 x 3
x 1.0 mm package, both control logic and a low RDS (on) power stage.
The integrated controller implements PWM current control with fixed OFF time and a
microstepping resolution up to 1/256th of a step.
The device is designed to operate in battery-powered scenarios and can be forced
into a zero-consumption state, allowing a significant increase in battery life.
The device offers a complete set of protection features including overcurrent,
overtemperature and short-circuit protection.
DS11633 - Rev 5 - December 2020
For further information contact your local STMicroelectronics sales office.
www.st.com
STSPIN220
Block diagram
1
Block diagram
Figure 1. Block diagram
VBAT
VS
VS
STBY\RESET
VS
1
0
OUTA1
OC\SC
REF
EN\FAULT
DAC
Vrelease + +
OUTA2
OC\SC
Control logic
STCK\MODE3
DIR\MODE4
MODE1
SENSEA
+
Stepper
motor
VS
OC\SC
OUTB1
MODE2
+
TOFF
OUTB2
OC\SC
Oscillator
OVT
SENSEB
GND
AM040026
DS11633 - Rev 5
page 2/29
STSPIN220
Electrical data
2
Electrical data
2.1
Absolute maximum ratings
Table 1. Absolute maximum ratings
Symbol
Parameter
Value
Unit
VS
Supply voltage
-0.3 to 11
V
VIN
Logic input voltage
-0.3 to 5.5
V
VOUT - VSENSE
Output-to-sense voltage drop
Up to 12
V
VS - VOUT
Supply-to-output voltage drop
Up to 12
V
-1 to 1
V
-0.3 to 1
V
1.3
Arms
VSENSE
Sense pin voltage
VREF
Reference voltage input
IOUT,RMS
2.2
Test condition
Continuous power stage output current (each bridge)
Tj,OP
Operative junction temperature
-40 to 150
°C
Tj,STG
Storage junction temperature
-55 to 150
°C
Recommended operating conditions
Table 2. Recommended operating conditions
Symbol
Max
Unit
1.8
10
V
0
5
V
Reference voltage input
0.1
0.5
V
Logic inputs positive/negative pulse width
300
VS
Supply voltage
VIN
Logic input voltage
VREF
tINw
2.3
Parameter
Test condition
Min
Typ
ns
Thermal data
Table 3. Thermal data
Symbol
Parameter
Rth (JA)
Junction to ambient thermal
resistance
RthJCtop
RthJCbot
RthJB
Conditions
Value
Unit
Natural convection, according to JESD51-2a (1)
57.1
°C/W
Junction to case thermal resistance
(top side)
Simulation with cold plate on package top
67.3
°C/W
Junction to case thermal resistance
(bottom side)
Simulation with cold plate on exposed pad
9.1
°C/W
23.3
°C/W
Junction to board thermal resistance According to JESD51-8(1)
ψJT
Junction to top characterization
According to JESD51-2a(1)
3.3
°C/W
ψJB
Junction to board characterization
According to JESD51-2a(1)
22.6
°C/W
1. Simulated on a 21.2x21.2 mm board, 2s2p 1 Oz copper and four 300 µm vias below exposed pad.
DS11633 - Rev 5
page 3/29
STSPIN220
ESD protection
2.4
ESD protection
Table 4. ESD protection ratings
Symbol
DS11633 - Rev 5
Parameter
Test condition
Class
Value
Unit
HBM
Human body model
Conforming to ANSI/ESDA/JEDEC
JS-001-2014
H2
2
kV
CDM
Charge device model
Conforming to ANSI/ESDA/JEDEC
JS-002-2014
C2a
500
V
page 4/29
STSPIN220
Electrical characteristics
3
Electrical characteristics
Test conditions: VS = 5 V, Tj = 25 °C unless otherwise specified.
Table 5. Electrical characteristics
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
VS rising from 0 V
1.45
1.65
1.79
V
VS falling from 5 V
1.3
1.45
1.65
V
Supply
VSth (ON) VS turn-on voltage
VSth
(OFF)
VSth
(HYS)
VS turn-off voltage
VS hysteresis voltage
180
mV
No commutations
EN = ‘0’
IS
VS supply current
960
1300
μA
1500
1950
μA
10
80
nA
0.9
V
ROFF = 160 kΩ
No commutations
EN = ‘1’
ROFF = 160 kΩ
IS,STBY
VS standby current
VSTBYL
Standby low logic level input
voltage
VSTBYH
Standby high logic level input
voltage
STBY = 0 V
1.48
V
Power stage
VS = 10 V,
IOUT = 1.3 A
0.4
0.65
0.53
0.87
0.53
0.8
VS = 10 V,
RDS (ON)
HS+LS
Total ON resistance HS + LS
IOUT = 1.3 A,
Tj = 125 °C
VS = 3 V,
IOUT = 0.4 A
IDSS
Leakage current
VDF
Freewheeling diode forward
voltage
trise
Rise time
tfall
Fall time
tDT
Deadtime
Ω
(1)
OUTx = VS
OUTx = GND
ID = 1.3 A
VS = 10 V;
unloaded outputs
VS = 10 V;
unloaded outputs
1
-1
µA
0.9
V
10
ns
10
ns
50
ns
Current control
DS11633 - Rev 5
page 5/29
STSPIN220
Electrical characteristics
Symbol
VSNS,OF
FSET
tOFF
ΔfOSC
Parameter
Sensing offset
Total OFF time
Internal oscillator precision
(fOSC/fOSC,ID)
tOFF,jitter Total OFF time jittering
tOFF,SLO
W
tOFF,FAS
T
Test condition
VREF = 0.5 V;
Internal reference 20% VREF
Min.
Typ.
-15
Max.
Unit
+15
mV
ROFF = 10 kΩ
9
µs
ROFF = 160 kΩ
125
µs
ROFF = 20 kΩ
-20%
+20%
ROFF = 10 kΩ
2%
Slow decay time
5/8 ×
tOFF
µs
Fast decay time
3/8 ×
tOFF
µs
Logic IOs
VIH
High logic level input voltage
VIL
Low logic level input voltage
1.6
V
VRELEAS FAULT open drain release
voltage
E
VOL
EN Low logic level output
voltage
RSTBY
STBY pull-down resistance
IPDEN
EN pull-down current
tENd
EN input propagation delay
IEN = 4 mA
From EN falling edge to OUT high
impedance
0.6
V
0.4
V
0.4
V
36
kΩ
10.5
µA
55
ns
tMODEho MODEx input hold time
From STBY edge, see Figure 5
100
µs
tMODEsu MODEx input setup time
From STBY edge, see Figure 5
1
µs
tDIRh
DIR input hold time
From STCK rising edge, see Figure 4
100
ns
tDIRsu
DIR input setup time
From STCK rising edge, see Figure 4
100
ns
tSTCKH
STCK high time
See Figure 4
100
ns
tSTCKL
STCK low time
See Figure 4
100
ns
fSTCK
STCK inputs frequency
See Figure 4
1
MHz
Protections
TjSD
Thermal shutdown threshold
160
°C
TjSD,Hyst
Thermal shutdown hysteresis
40
°C
IOC
Overcurrent threshold
2
A
See Figure 14. Power stage resistance
versus temperature
1. Based on characterization data on a limited number of samples, not tested during production.
DS11633 - Rev 5
page 6/29
STSPIN220
Pin description
4
Pin description
Figure 2. Pin connection (top view)
MODE1
MODE2
16
15
STBY\
RESET
14
EN\FAULT
13
DIR\MODE4
1
12
TOFF
STCK\MODE3
2
11
REF
EPAD
OUTA1
3
10
OUTB1
SENSEA
4
9
SENSEB
5
6
7
8
OUTA2
VS
GND
OUTB2
Note: The exposed pad must be connected to ground.
Table 6. Pin description
DS11633 - Rev 5
N.
Name
Type
1
DIR\MODE4
Logic input
Direction input, Step mode selection input 4.
2
STCK\MODE3
Logic input
Step clock input, Step mode selection input 3.
3
OUTA1
Power output
Power bridge output side A1.
4
SENSEA
Power output
Sense output of the bridge A.
5
OUTA2
Power output
Power bridge output side A2.
6
VS
Supply
Device supply voltage.
7, EPAD
GND
Ground
Device ground.
8
OUTB2
Power output
Power bridge output side B2.
9
SENSEB
Power output
Sense output of the bridge B.
10
OUTB1
Power output
Power bridge output side B1.
11
REF
Analog input
Reference voltage for the PWM current control circuitry.
12
TOFF
Analog input
Internal oscillator frequency adjustment.
13
EN\FAULT
Logic input\Open drain
output
14
STBY\RESET
Logic input
When forced low, the device is forced into low consumption mode.
15
MODE2
Logic input
Step mode selection input 2.
16
MODE1
Logic input
Step mode selection input 1.
Function
This is the power stage enable (when low, the power stage is turned
off) and is forced low through the integrated open-drain MOSFET
when a failure occurs.
page 7/29
STSPIN220
Typical application
5
Typical application
Table 7. Typical application values
Name
Value
CS
2.2 µF / 16V
CSPOL
22 µF / 16V
RSNSA, RSNSB
330 mΩ / 1W
CEN
10 nF / 6.3V
REN
18 kΩ
CSTBY
1 nF / 6.3V
RSTBY
18 kΩ
COFF
22 nF
RCOFF
1 kΩ
ROFF
47 kΩ (tOFF ≅ 37 µs)
Figure 3. Typical application schematic
VS
VDD
VS
RSTBY
CSTBY
VDD
REN
CEN
CS
CSPOL
STBY
OUTA1
EN\FAULT
OUTA2
SENSEA
STCK\MODE3
RSNSA
DIR\MODE4
MODE1
STSPIN220
Stepper
motor
OUTB1
MODE2
OUTB2
REF
PWM
SENSEB
RSNSB
TOFF
RRCOFF
CRCOFF
DS11633 - Rev 5
ROFF
GND
page 8/29
STSPIN220
Functional description
6
Functional description
The STSPIN220 is a stepper motor driver integrating a microstepping sequencer (up to 1/256th of a step), two
PWM current controllers and a power stage composed of two fully-protected full-bridges.
6.1
Standby and power-up
The device provides a low consumption mode which is set forcing the STBY\RESET input below the VSTBYL
threshold.
When the device is in standby status, the power stage is disabled (outputs are in high impedance) and the supply
to the integrated control circuitry is cut off. When the device exits the standby status, all of the control circuitry is
reset to power-up condition.
At power-up, power-down and when leaving the standby condition, the EN/FAULT pin is forced low until the
internal circuitry stabilize.
6.2
Microstepping sequencer
The value of the MODEx inputs is latched at power-up and when the device exits the STBY condition. After this,
the input value is unimportant and the MODE3 and MODE4 inputs start operating as step-clock and direction
input.
The only exception is the MODE1 = MODE2 = LOW condition; in this case the system is forced into full-step
mode. The previous condition is restored as soon as the MODE1 and MODE2 inputs switch to a different
combination.
An example of mode selection is shown in Figure 4. STCK and DIR timing.
At each STCK rising edge, the sequencer of the device is increased (DIR input high) or decreased (DIR input low)
of a module selected through the MODEx inputs as listed in Table 8. Step mode selection through MODEx inputs.
The sequencer is a 10-bit counter that sets the reference value of the PWM current controller and the direction of
the current for both of the H bridges.
Table 8. Step mode selection through MODEx inputs
DS11633 - Rev 5
MODE3
MODE4
(STCK)
(DIR)
0
MODE1
MODE2
Step mode
0
0
0
Full-step
0
0
0
1
1/32nd step
0
0
1
0
1/128th step
0
0
1
1
1/256th step
0
1
0
0
Full-step - 1/32nd step (1)
0
1
0
1
1/4th step
0
1
1
0
1/256th step
0
1
1
1
1/64th step
1
0
0
0
Full-step - 1/128nd step
1
0
0
1
1/256th step
1
0
1
0
1/2 step
1
0
1
1
1/8th step
1
1
0
0
Full-step - 1/256th step
1
1
0
1
1/64th step
(1)
(1)
page 9/29
STSPIN220
Microstepping sequencer
MODE3
MODE4
(STCK)
(DIR)
1
1
MODE1
MODE2
Step mode
1
1
0
1/8th step
1
1
1
1/16th step
1. This driving mode is automatically bypassed by the MODE1 = MODE2 = 0 if it is kept after the device quit the standby
condition.
Figure 4. STCK and DIR timing
DIR
tDIR,su
tDIR,ho
STCK
tSTCKH
tSTCKL
1/fSTCK
Figure 5. Mode selection example
VS
VSth(ON)
STBY\
RESET
t MODEsu
t MODEh
MODE1
MODE2
t MODEsu
t MODEh
MODE3
(STCK)
MODE4
(DIR)
Stepping
mode
Undeterminated
1/256 th step
Full-step
1/256th step
Undeterminated
1/16 th step
When the full-step mode is set, the reference value of the PWM current controller and the direction of the current
for both H bridges as listed in Table 8. Step mode selection through MODEx inputs.
DS11633 - Rev 5
page 10/29
STSPIN220
Microstepping sequencer
Table 9. Target reference and current direction according to sequencer value (full-step mode)
Phase A
Sequencer value
Phase B
Reference voltage
Current direction
Reference
voltage
Current
direction
0
0
X X
X
X
X
X
X
X
100% × VREF
A1 → A2
100% × VREF
B1 → B2
0
1
X
X
X
X
X
X
X
X
100% × VREF
A1 → A2
100% × VREF
B1 ← B2
1
0
X
X
X
X
X
X
X
X
100% × VREF
A1 ← A2
100% × VREF
B1 ← B2
1
1
X
X
X
X
X
X
X
X
100% × VREF
A1 ← A2
100% × VREF
B1 → B2
When the step mode is different from the full-step mode the values listed in Table 10. Target reference and current
direction according to sequencer value (not full-step mode) are used.
Table 10. Target reference and current direction according to sequencer value (not full-step mode)
Phase A
Sequencer value
0 0 0 0 0 0 0 0 0 0
0 0
N
0 1 0 0 0 0 0 0 0 0
0 1
N
1 0 0 0 0 0 0 0 0 0
1 0
N
1 1 0 0 0 0 0 0 0 0
1 1
N
Phase B
Current
direction
Reference voltage
Current
direction
-
100% × VREF
B1 → B2
Sin(N/256 × π/2) × VREF
A1 → A2
Cos(N/256 × π/2) × VREF
B1 → B2
100% × VREF
A1 → A2
Sin(π/2 + N/256 × π/2) ×
VREF
A1 → A2
Cos(π/2 + N/256 × π/2) ×
VREF
B1 ← B2
-
100% × VREF
B1 ← B2
Sin(N/256 × π/2) × VREF
A1 ← A2
Cos(N/256 × π/2) × VREF
B1 ← B2
100% × VREF
A1 ← A2
Sin(π/2 + N/256 × π/2) ×
VREF
A1 ← A2
Reference voltage
Zero
(power bridge disabled)
Zero
(power bridge disabled)
Zero
(power bridge disabled)
Zero
(power bridge disabled)
Cos(π/2 + N/256 × π/2) ×
VREF
-
B1 → B2
The following table shows the target reference and sequencer values for 1/2-, 1/4- and 1/8-step operation. Higher
microstepping resolutions follow the same pattern. The reset state (home state) for all stepping mode is entered
at power-up or when the device exits the standby status.
DS11633 - Rev 5
page 11/29
STSPIN220
PWM current control
Table 11. Example
1/2 step
1/4 step
1/8 step
VREF phase A
VREF phase B
1
1
1
0%
100%
2
19.509%
98.079%
0000100000
3
38.268%
92.388%
0001000000
4
55.557%
83.147%
0001100000
5
70.711%
70.711%
0010000000
6
83.147%
55.557%
0010100000
7
92.388%
19.509%
0011100000
8
98.079%
19.509%
0011100000
9
100%
0%
0100000000
10
98.079%
-19.509%
0100100000
11
92.388%
-38.268%
0101000000
12
83.147%
-55.557%
0101100000
13
70.711%
-70.711%
0110000000
14
55.557%
-83.147%
0110100000
15
38.268%
-92.388%
0111000000
16
19.509%
-98.079%
1000100000
17
0%
100%
1000000000
18
-19.509%
-98.079%
1000100000
19
-38.268%
-92.388%
1001000000
20
-55.557%
-83.147%
1001100000
2
2
3
4
3
5
6
4
7
8
5
9
10
6
11
12
7
13
14
8
15
16
Note:
6.3
Sequencer value
0000000000
home state
21
-70.711%
-70.711%
1010000000
22
-83.147%
-55.557%
1010100000
23
-92.388%
-38.268%
1011000000
24
-98.079%
-19.509%
1011100000
25
-100%
0%
1100000000
26
-98.079%
19.509%
1100100000
27
-92.388%
38.268%
1101000000
28
-83.147%
55.557%
1101100000
29
-70.711%
70.711%
1110000000
30
-55.557%
83.147%
1110100000
31
-38.268%
92.388%
1111000000
32
-19.509%
98.079%
1111100000
The positive number means that the output current is flowing from OUTx1 to OUTx2, vice versa for a negative
value.
PWM current control
The device implements two independent PWM current controllers, one for each full bridge.
DS11633 - Rev 5
page 12/29
STSPIN220
PWM current control
The voltage of the sense pins (VSENSEA and VSENSEB) is compared to the respective internal reference generated
based on the sequencer value (see Table 9. Target reference and current direction according to sequencer value
(full-step mode) and Table 10. Target reference and current direction according to sequencer value (not full-step
mode)).
When VSENSEX > VREFX, the integrated comparator is triggered, the OFF time counter is started and the decay
sequence is performed.
The decay sequence starts turning on both the low sides of the full bridge. When 5/8ths of the programmed OFF
time (tOFF,SLOW) has expired, the decay sequence performs a quasi-synchronous fast decay.
Table 12. ON, slow decay and fast decay states
Current direction(1)
Zero (power bridge disabled)
X1 → X2
X1 ← X2
ON
Slow decay
Fast decay (quasi-synch)
HSX1 = OFF
HSX1 = OFF
HSX1 = OFF
LSX1 = OFF
LSX1 = OFF
LSX1 = OFF
HSX2 = OFF
HSX2 = OFF
HSX2 = OFF
LSX2 = OFF
LSX2 = OFF
LSX2 = OFF
HSX1 = ON
HSX1 = OFF
HSX1 = OFF
LSX1 = OFF
LSX1 = ON
LSX1 = ON
HSX2 = OFF
HSX2 = OFF
HSX2 = OFF
LSX2 = ON
LSX2 = ON
LSX2 = OFF
HSX1 = OFF
HSX1 = OFF
HSX1 = OFF
LSX1 = ON
LSX1 = ON
LSX1 = OFF
HSX2 = ON
HSX2 = OFF
HSX2 = OFF
LSX2 = OFF
LSX2 = ON
LSX2 = ON
1. The current direction is set according toTable 9. Table 9 and Table 9. Target reference and current direction according to
sequencer value (full-step mode)Table 10. Target reference and current direction according to sequencer value (not full-step
mode) .
The reference voltage value, VREF, must be selected according to the load current target value (peak value) and
sense resistor value.
Equation 1
In choosing the sense resistor value, two main issues must be taken into account:
•
The sense resistor dissipates energy and provides dangerous negative voltages on the SENSE pins during
current recirculation. For this reason the resistance of this component should be kept low (using multiple
resistors in parallel will help to obtain the required power rating with standard resistors).
•
The lower the RSNSx value, the higher the peak current error due to noise on the VREF pin and the input
offset of the current sense comparator. Values of RSNSx that are too low must be avoided.
DS11633 - Rev 5
page 13/29
STSPIN220
PWM current control
Figure 6. PWM current control sequence
VS
VS
VS
OUTX1
VS
VS
OUTX2
OUTX1
OUTX2
SENSEX
RSENSE
VS
VS
OUTX1
OUTX2
SENSEX
OUTX1
RSENSE
VS
OUTX2
SENSEX
RSENSE
VS
VS
OUTX1
SENSEX
RSENSE
OUTX2
SENSEX
RSENSE
t OFF
VREFX/RSENSE
t DT
t DT
Iphase
t OFF,SLOW
t OFF,FAST
VREFX
VSENSEX
6.3.1
OFF time adjustment
The total OFF time (slow decay + fast decay) is adjusted through an external resistor connected between the
TOFF pin and ground, as shown in Figure 6. PWM current control sequence. A small RC series must be
inserted in parallel with the regulator resistor in order to increase the stability of the regulation circuit according to
Table 12. ON, slow decay and fast decay states indications.
Figure 7. OFF time regulation circuit
TOFF
RRCOFF
ROFF
CRCOFF
The relationship between the OFF time and the external resistor value is shown in Figure 7. OFF time regulation
circuit. The value typically ranges from 10 µs to 150 µs.
DS11633 - Rev 5
page 14/29
STSPIN220
Overcurrent and short-circuit protection
Table 13. Recommended R RCOFF and C RCOFF values according to R OFF
ROFF
RRCOFF
CRCOFF
10 kΩ ≤ ROFF < 82 kΩ
1 kΩ
22 nF
82 kΩ ≤ ROFF ≤ 160 kΩ
2.2 kΩ
22 nF
Figure 8. OFF time vs. ROFF value
140
Off time [us]
120
100
80
60
40
20
0
0
50
100
150
200
Off resistor [kohm]
6.4
Overcurrent and short-circuit protection
The device embeds circuitry protecting each power output against the overload and short circuit conditions
(short-circuit to ground, short-circuit to VS and short-circuit between outputs).
When the overcurrent or short-circuit protection is triggered, the power stage is disabled and the EN\FAULT
input is forced low through the integrated open-drain MOSFET discharging the external CEN capacitor (refer to
Figure 9. Overcurrent and short-circuit protection management).
The power stage is kept disabled and the open-drain MOSFET is kept ON until the EN\FAULT input falls below
the VRELEASE threshold, then the CEN capacitor is charged through the external REN resistor.
DS11633 - Rev 5
page 15/29
STSPIN220
Overcurrent and short-circuit protection
Figure 9. Overcurrent and short-circuit protection management
MCU
DEVICE
FAULT_MCU
VRELEASE
RELEASE
EN\FAULT
EN_MCU
REN
VEN
CEN
EN
IPDEN
OC\SC
THSD
FAULT
Overcurrent
protection
VIH
VIL
VRELEASE
Power
stage
ENABLED
DISABLED
tdischarge
ENABLED
tcharge
FAULT
tDIS
The total disable time after an overcurrent event can be set sizing properly the external network connected to the
EN\FAULT pin (refer to Figure 9. Overcurrent and short-circuit protection management):
Equation 2
But tcharge is normally much higher than tdischarge, thus we can consider the following:
Equation 3
DS11633 - Rev 5
page 16/29
STSPIN220
Overcurrent and short-circuit protection
where VDD is the pull-up voltage of the REN resistor.
Figure 10. Disable time versus REN and CEN values (VDD = 3.3 V)
1000
REN = 18 kΩ
REN = 10 kΩ
REN = 6.8 kΩ
Disable time [µs]
REN = 4.7 kΩ
REN = 3.3 kΩ
REN = 2.2 kΩ
100
10
0
10
20
30
40
50
60
70
80
90
100
90
100
CEN [nF]
Figure 11. Disable time versus REN and CEN values (VDD = 1.8 V)
REN = 18 kΩ
1000
REN = 10 kΩ
REN = 6.8 kΩ
REN = 4.7 kΩ
REN = 3.3 kΩ
Disable time [µs]
REN = 2.2 kΩ
100
10
0
10
20
30
40
50
60
70
80
CEN [nF]
DS11633 - Rev 5
page 17/29
STSPIN220
Thermal shutdown
6.5
Thermal shutdown
The device embeds circuitry protecting it from the overtemperature conditions.
When the thermal shutdown temperature is reached, the power stage is disabled and the EN\FAULT input is
forced low through the integrated open-drain MOSFET (refer to Figure 12. Thermal shutdown management).
The protection and the EN\FAULT output are released when the IC temperature returns below a safe operating
value (TjSD - TjSD,Hyst).
Figure 12. Thermal shutdown management
MCU
DEVICE
FAULT_MCU
VRELEASE
EN\FAULT
EN_MCU
REN
CEN
RELEASE
EN
IPDEN
OC\SC
THSD
FAULT
Thermal
shutdown
TjSD
TjSD,hyst
Tj
VEN
VIH
VIL
VRELEASE
Power
stage
FAULT
DS11633 - Rev 5
ENABLED
DISABLED
DISABLED
ENABLED
t THSD
page 18/29
STSPIN220
Graphs
7
Graphs
Figure 13. Power stage resistance versus supply voltage
Figure 14. Power stage resistance versus temperature
RDS(ON) HS+LS normalized at 25°C
1.4
1.3
1.2
1.1
1
VS = 1. 8 V
VS = 3 V
0.9
VS = 10 V
0.8
-50
0
50
100
150
Temperature [°C]
DS11633 - Rev 5
page 19/29
STSPIN220
Graphs
Figure 15. Overcurrent threshold versus supply voltage
DS11633 - Rev 5
page 20/29
STSPIN220
Package information
8
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.
DS11633 - Rev 5
page 21/29
STSPIN220
VFQFPN 3x3x1.0 16L package information
8.1
VFQFPN 3x3x1.0 16L package information
Figure 16. VFQFPN 3x3x1.0 16L package outline
DS11633 - Rev 5
page 22/29
STSPIN220
VFQFPN 3x3x1.0 16L package information
Table 14. Table A: Package dimensions
SYMBOL
Dimensions [mm]
Min. (mm)
Nom.
Max.
A
0.80
0.90
1.00
A1
0.00
0.02
0.05
A3
b
0.20
0.20
0.25
D
3.00 BSC
D1
1.50 BSC
D2
1.60
1.70
e
0.50 BSC
E
3.00 BSC
D2
1.50 BSC
0.30
1.80
E2
1.60
1.70
1.80
L
0.30
0.40
0.50
k
0.20
N
16
Table 15. Table B: Position and form tolerance
DS11633 - Rev 5
SYMBOL
TOLERANCE OF FORM AND POSITION
aaa
0.15
bbb
0.10
ccc
0.10
ddd
0.05
eee
0.08
fff
0.10
page 23/29
STSPIN220
VFQFPN 3x3x1.0 16L package information
Figure 17. VFQFPN 3x3x1.0 16L recommended footprint
DS11633 - Rev 5
page 24/29
STSPIN220
Revision history
Table 16. Document revision history
Date
Version
06-May-2016
1
Changes
Initial release.
- Updated document status to Datasheet - production data on page 1.
30-Jun-2016
2
- Updated Table 1 (changed Max. value of VS from 12 to 11) and Table 7 (changed tOFF
value from ≅47 µs to ≅37 µs).
- Updated Figure 1 in Section 1 Block diagram (replaced by new figure).
- Updated Table 2 in Section 2.2 Recommended operating conditions (added tINw
symbol).
- Updated Table 3 in Section 2.3 Thermal data(replaced by new table).
28-Nov-2016
3
- Updated Table 8 in Section 6.2 Microstepping sequencer [removed "Sequencer module
(binary)" column].
- Added Table 11 in Section 6.2 Microstepping sequencer.
- Updated Table 13 in (updated title).
- Updated Figure 13 in (replaced by new figure).
- Minor modifications throughout document.
DS11633 - Rev 5
21-Mar-2019
4
Updated Section 8.1 VFQFPN 3x3x1.0 16L package information
09-Dec-2020
5
Updated Figure 9 in Section 6.4 , Figure 16 and Figure 17. Updated Table 14 and added
Table 15
page 25/29
STSPIN220
Contents
Contents
1
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2.1
Absolute maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.2
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.3
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.4
ESD protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
5
Typical application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
6
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
6.1
Standby and power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
6.2
Microstepping sequencer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
6.3
PWM current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6.3.1
OFF time adjustment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6.4
Overcurrent and short-circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6.5
Thermal shutdown. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7
Graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
8
Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
8.1
VFQFPN 3x3x1.0 16L package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
List of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
List of figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
DS11633 - Rev 5
page 26/29
STSPIN220
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Recommended operating conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD protection ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical application values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Step mode selection through MODEx inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Target reference and current direction according to sequencer value (full-step mode) . . .
Target reference and current direction according to sequencer value (not full-step mode)
Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ON, slow decay and fast decay states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Recommended R RCOFF and C RCOFF values according to R OFF . . . . . . . . . . . . . . . . . . .
Table 14.
Table 15.
Table 16.
Table A: Package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table B: Position and form tolerance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
DS11633 - Rev 5
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. 3
. 3
. 3
. 4
. 5
. 7
. 8
. 9
11
11
12
13
15
page 27/29
STSPIN220
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
DS11633 - Rev 5
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . .
Typical application schematic . . . . . . . . . . . . . . . . . . .
STCK and DIR timing . . . . . . . . . . . . . . . . . . . . . . . .
Mode selection example . . . . . . . . . . . . . . . . . . . . . .
PWM current control sequence . . . . . . . . . . . . . . . . . .
OFF time regulation circuit . . . . . . . . . . . . . . . . . . . . .
OFF time vs. ROFF value . . . . . . . . . . . . . . . . . . . . . .
Overcurrent and short-circuit protection management . .
Disable time versus REN and CEN values (VDD = 3.3 V) .
Disable time versus REN and CEN values (VDD = 1.8 V) .
Thermal shutdown management . . . . . . . . . . . . . . . . .
Power stage resistance versus supply voltage . . . . . . .
Power stage resistance versus temperature . . . . . . . . .
Overcurrent threshold versus supply voltage . . . . . . . .
VFQFPN 3x3x1.0 16L package outline . . . . . . . . . . . .
VFQFPN 3x3x1.0 16L recommended footprint . . . . . . .
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. 2
. 7
. 8
10
10
14
14
15
16
17
17
18
19
19
20
22
24
page 28/29
STSPIN220
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service
names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2020 STMicroelectronics – All rights reserved
DS11633 - Rev 5
page 29/29
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