STSPIN240

STSPIN240 Low voltage dual brush DC motor driver Datasheet - production data Description The STSPIN240 is a dual brush DC motor driver integrating a low RDS(ON) power stage in a small QFN 3 x 3 mm package. Both the full-bridges implement an independent PWM current controller with fixed OFF time. The device is designed to operate in batterypowered scenarios and can be forced into a zeroconsumption state allowing a significant increase in battery life. QFN 3 x 3 mm (16-pin) The device offers a complete set of protection features including overcurrent, overtemperature and short-circuit protection. Features  Operating voltage from 1.8 to 10 V  Maximum output current 1.3 Arms  RDS(ON) HS + LS = 0.4  typ.  Current control with programmable off-time  Full protection set – Non-dissipative overcurrent protection – Short-circuit protection – Thermal shutdown  Energy saving and long battery life with standby consumption less than 80 nA Applications Battery-powered DC motor applications such as:  Toys  Portable printers  Robotics  Point of sale (POS) devices  Portable medical equipment  Healthcare and wellness devices (shavers and toothbrushes) August 2017 This is information on a product in full production. DocID029313 Rev 4 1/26 www.st.com Contents STSPIN240 Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.3 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.4 ESD protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Typical applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.1 Standby and power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.2 Motor driving . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.3 PWM current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 TOFF adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6.4 Overcurrent and short-circuit protections . . . . . . . . . . . . . . . . . . . . . . . . . 18 6.5 Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7 Graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 8.1 VFQFPN 3 x 3 x 1.0 mm - 16L package information . . . . . . . . . . . . . . . . 23 9 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 2/26 DocID029313 Rev 4 STSPIN240 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 ESD protection ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Typical application values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 ON and slow decay states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Recommended RRCOFF and CRCOFF values according to ROFF . . . . . . . . . . . . . . . . . . . . 17 VFQFPN 3 x 3 x 1.0 mm - 16L package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . 24 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 DocID029313 Rev 4 3/26 26 List of figures STSPIN240 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. 4/26 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 PWM current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 OFF time regulation circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 OFF time vs. ROFF value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Overcurrent and short-circuit protections management . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Disable time versus REN and CEN values (VDD = 3.3 V) . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Disable time versus REN and CEN values (VDD = 1.8 V) . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Thermal shutdown management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Power stage resistance versus supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Power stage resistance versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Overcurrent threshold versus supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 VFQFPN 3 x 3 x 1.0 mm - 16L package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 VFQFPN 3 x 3 x 1.0 mm - 16L recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 DocID029313 Rev 4 STSPIN240 1 Block diagram Block diagram Figure 1. Block diagram              %(&  %"&       $#'%$"
"$!            %(&        &!""'$%    DocID029313 Rev 4 5/26 26 Electrical data STSPIN240 2 Electrical data 2.1 Absolute maximum ratings Table 1. Absolute maximum ratings Symbol Parameter Test condition Value Unit VS Supply voltage - -0.3 to 11 V VIN Logic input voltage - -0.3 to 5.5 V VOUT - VSENSE Output to sense voltage drop - up to 12 V VS - VOUT Supply to output voltage drop - up to 12 V Sense pins voltage - -1 to 1 V Reference voltage input - -0.3 to 1 V Continuous power stage output current (each bridge) - 1.3 Arms Tj,OP Operative junction temperature - -40 to 150 °C Tj,STG Storage junction temperature - -55 to 150 °C VSENSE VREF IOUT,RMS 2.2 Recommended operating conditions Table 2. Recommended operating conditions Symbol Parameter Test condition Min. Typ. Max. Unit VS Supply voltage - 1.8 - 10 V VIN Logic input voltage - 0 - 5 V Reference voltage input - 0.1 - 0.5 V Value Unit 57.1 °C/W VREF 2.3 Thermal data Table 3. Thermal data Symbol RthJA Parameter Conditions (1) Junction to ambient thermal resistance Natural convection, according to JESD51-2a RthJCtop Junction to case thermal resistance (top side) Simulation with cold plate on package top 67.3 °C/W RthJCbot Junction to case thermal resistance (bottom side) Simulation with cold plate on exposed pad 9.1 °C/W RthJB Junction to board thermal resistance According to JESD51-8(1) JT JB Junction to top characterization Junction to board characterization 23.3 °C/W According to JESD51-2a(1) 3.3 °C/W According to JESD51-2a(1) 22.6 °C/W 1. Simulated on a 21.2 x 21.2 mm board, 2s2p 1 Oz copper and four 300 m vias below exposed pad. 6/26 DocID029313 Rev 4 STSPIN240 2.4 Electrical data ESD protections Table 4. ESD protection ratings Symbol Parameter Test condition Class Value Unit HBM Human body model Conforming to ANSI/ESDA/JEDEC JS-001-2014 H2 2 kV CDM Charge device model Conforming to ANSI/ESDA/JEDEC JS-002-2014 C2a 500 V DocID029313 Rev 4 7/26 26 Electrical characteristics 3 STSPIN240 Electrical characteristics Testing conditions: VS = 5 V, Tj = 25 °C unless otherwise specified. Table 5. Electrical characteristics Symbol Parameter Test condition Min. Typ. Max. Unit Supply VSth(ON) VS turn-on voltage VS rising from 0 V 1.45 1.65 1.79 V VSth(OFF) VS turn-off voltage VS falling from 5 V 1.3 1.45 1.65 V VSth(HYS) VS hysteresis voltage - - 180 - mV No commutations, EN = 0 ROFF = 160 k - 960 1300 A No commutations, EN = 1 ROFF = 160 k - 1500 1950 A IS VS supply current IS,STBY VS standby current STBY = 0 V - 10 80 nA VSTBYL Standby low logic level input voltage - - - 0.9 V VSTBYH Standby high logic level input voltage - 1.48 - - V - 0.4 0.65 - 0.53 0.87 VS = 3 V, IOUT = 0.4 A - 0.53 0.8 OUTx = VS - - 1 -1 - - Power stage VS = 10 V, IOUT = 1.3 A RDS(ON)HS+LS Total on resistance HS + LS VS = 10 V, IOUT = 1.3 A, Tj = 125 °C(1)  IDSS Leakage current VDF Freewheeling diode forward voltage ID = 1.3 A - 0.9 - V trise Rise time VS = 10 V; unloaded outputs - 10 - ns tfall Fall time VS = 10 V; unloaded outputs - 10 - ns tDT Dead time - - 50 - ns -15 - +15 mV ROFF = 10 k - 9 - µs ROFF = 160 k - 125 - µs Internal oscillator precision (fOSC/fOSC,ID) ROFF = 20 k -20% - +20% - Total OFF time jittering ROFF = 10 k - - 2% - OUTx = GND µA PWM current controller VSNS,OFFSET Sensing offset tOFF Total OFF time fOSC tOFF,jitter 8/26 VREF = 0.5 V; internal reference 20% VREF DocID029313 Rev 4 STSPIN240 Electrical characteristics Table 5. Electrical characteristics (continued) Symbol Parameter Test condition Min. Typ. Max. Unit Logic IOs VIH High logic level input voltage - 1.6 - - V VIL Low logic level input voltage - - - 0.6 V FAULT open drain release voltage - - - 0.4 V Low logic level output voltage IOL = 4 mA - - 0.4 V RSTBY STBY pull-down resistance - - 36 - k IPDEN EN pull-down current - - 10.5 - µA tENd EN input propagation delay From EN falling edge to OUT high impedance - 55 - ns tPWM,d(ON) PWMX turn-on propagation delay See Figure 4 on page 14 - 125 - ns tPWM,d(OFF) PWMX turn-off propagation delay See Figure 4 - 140 - ns PHX propagation delay See Figure 4 - 125 - ns TjSD Thermal shutdown threshold - - 160 - °C TjSD,Hyst Thermal shutdown hysteresis - - 40 - °C Overcurrent threshold See Figure 14 on page 22 - 2 - A VRELEASE VOL tPH,d Protections IOC 1. Based on characterization data on a limited number of samples, not tested during production. DocID029313 Rev 4 9/26 26 Pin description 4 STSPIN240 Pin description Figure 2. Pin connection (top view) PWMB PHB STBY\ RESET EN\FAULT 16 15 14 13 PHA 1 12 TOFF PWMA 2 11 REF EPAD OUTA1 3 10 OUTB1 SENSEA 4 9 SENSEB 5 6 7 8 OUTA2 VS GND OUTB2 1. The exposed pad must be connected to ground. Table 6. Pin description No. Name Type 1 PHA Logic input Phase input for bridge A 2 PWMA Logic input PWM input for bridge A 3 OUTA1 Power output Power bridge output side A1 4 SENSEA Power output Sense output of the bridge A 5 OUTA2 Power output Power bridge output side A2 6 VS Supply Device supply voltage 7, EPAD GND Ground Device ground 8 OUTB2 Power output Power bridge output side B2 9 SENSEB Power output Sense output of the bridge B 10 OUTB1 Power output Power bridge output side B1 11 REF Analog input Reference voltage for the current limiter circuitry 12 TOFF Analog input Internal oscillator frequency adjustment 13 10/26 EN\FAULT Logic input\ open drain output Function Logic input 5 V compliant with open drain output. This is the power stage enable (when low, the power stage is turned off) and is forced low through the integrated open drain MOSFET when a failure occurs. DocID029313 Rev 4 STSPIN240 Pin description Table 6. Pin description (continued) No. Name Type Function 14 STBY\RESET Logic input Logic input 5 V compliant. When forced low, the device is forced into low consumption mode. 15 PHB Logic input Phase input for bridge B 16 PWMB Logic input PWM input for bridge B DocID029313 Rev 4 11/26 26 Typical applications 5 STSPIN240 Typical applications Table 7. Typical application values Name Value CS 2.2 µF / 16 V CSPOL 22 µF / 16 V RSNSA, RSNSB 330 m / 1 W CEN 10 nF / 6.3 V REN 18 k CSTBY 1 nF / 6.3 V RSTBY 18 k CRCOFF 22 nF RRCOFF 1 k ROFF 47 k (tOFF  37 µs) Figure 3. Typical application schematic VS VDD VS RSTBY CS C STBY Brush DC A OUTA1 REN EN\FAULT CEN OUTA2 SENSEA PWMA PHA PWMB RSNSA STSPIN240 Brush DC B OUTB1 PHB OUTB2 REF PWM SENSEB RSNSB TOFF RRCOFF CRCOFF 12/26 CSPOL STBY\RESET ROFF GND DocID029313 Rev 4 STSPIN240 6 Functional description Functional description The STSPIN240 is a dual brush DC motor driver integrating two PWM current controllers and a power stage composed by two fully-protected full-bridges. 6.1 Standby and power-up The device provides a low settable consumption mode forcing the STBY\RESET input below the VSTBYL threshold. When the device is in standby status, the power stage is disabled (outputs are in high impedance) and the supply to the integrated control circuitry is cut off. 6.2 Motor driving The outputs of each bridge are controlled by the respective PWMx and PHx inputs as listed in Table 8. Table 8. Truth table EN\FAULT PHx PWMx OUTx1 OUTx2 0 X X HiZ HiZ 1 0 0 GND GND 1 0 1 GND VS 1 1 0 GND GND Both LS on 1 1 1 VS GND HS1 and LS2 on (current X1  X2) DocID029313 Rev 4 Full-bridge condition Disabled Both LS on HS2 and LS1 on (current X1  X2) 13/26 26 Functional description STSPIN240 Figure 4. Timing diagram PHx PWMx tPWM,d(ON) tPWM,d(OFF) 90% tPH,d OUTx1 10% 10% tPH,d OUTx2 10% 14/26 DocID029313 Rev 4 STSPIN240 6.3 Functional description PWM current control The device implements two independent current controllers, one for each full-bridge. The voltage on the sense pins (VSENSEA and VSENSEB) is compared to the reference voltage applied on the REF pin (VREF). When VSENSEX > VREF, the current limiter is triggered, the OFF time counter is started and the decay sequence is performed. The decay sequence starts turning on both low sides of the full-bridge. Table 9. ON and slow decay states PHx 0 0 1 1 PWMx ON Decay 0 HSx1 = OFF LSx1 = ON HSx2 = OFF LSx2 = ON N.A.(1) 1 HSx1 = OFF LSx1 = ON HSx2 = ON LSx2 = OFF HSx1 = OFF LSx1 = ON HSx2 = OFF LSx2 = ON 0 HSx1 = OFF LSx1 = ON HSx2 = OFF LSx2 = ON N.A.(1) 1 HSx1 = ON LSx1 = OFF HSx2 = OFF LSx2 = ON HSx1 = OFF LSx1 = ON HSx2 = OFF LSx2 = ON 1. During decays the inputs values are ignored until the system returns to ON condition (decay time expired). The reference voltage value, VREF, has to be selected according to the load current target value (peak value) and sense resistors value. Equation 1 VREF = RSNSx • ILOAD,peak In choosing the sense resistor value, two main issues must be taken into account:  The sensing resistor dissipates energy and provides dangerous negative voltages on the SENSE pins during the current recirculation. For this reason the resistance of this component should be kept low (using multiple resistors in parallel will help to obtain the required power rating with standard resistors).  The lower is the RSNSx value, the higher is the peak current error due to noise on the VREF pin and to the input offset of the current sense comparator: too low values of RSNSx must be avoided. DocID029313 Rev 4 15/26 26 Functional description STSPIN240 Figure 5. PWM current control 74 74 0659 0659 0659 74 74 0659 0659 4& 4&/4&9 34&/4& 74 74 74 4&/4&9 0659 74 0659 4&/4&9 34&/4& 34&/4& 0659 4&/4&9 34&/4& 18.9 1)9 U 0'' 73&'9 34&/4& U %5 * QIBTF 73&' 74&/4&9 ". 16/26 DocID029313 Rev 4 STSPIN240 Functional description TOFF adjustment The decay time is adjusted through an external resistor connected between the TOFF pin and ground as shown in Figure 6. A small RC series must be inserted in parallel with the regulator resistor in order to increase the stability of the regulation circuit according to indications listed in Table 10. Figure 6. OFF time regulation circuit 50'' 33$0'' 30'' $3$0'' ". The relation between the OFF time and the external resistor value is shown in the graph of Figure 7. The value typically ranges from 10 µs to 150 µs. Table 10. Recommended RRCOFF and CRCOFF values according to ROFF ROFF RRCOFF CRCOFF 10 k ≤ ROFF < 82 k 1 k 22 nF 82 k ≤ ROFF ≤ 160 k 2.2 k 22 nF Figure 7. OFF time vs. ROFF value
". DocID029313 Rev 4 17/26 26 Functional description 6.4 STSPIN240 Overcurrent and short-circuit protections The device embeds circuitry protecting each power output against the overload and shortcircuit conditions (short to ground, short to VS and short between outputs). When the overcurrent or the short-circuit protection is triggered, the power stage is disabled and the EN\FAULT input is forced low through the integrated open drain MOSFET discharging the external CEN capacitor. The power stage is kept disabled and the open drain MOSFET is kept ON until the EN\FAULT input falls below the VRELEASE threshold, then the CEN capacitor is charged through the REN resistor. Figure 8. Overcurrent and short-circuit protections management .$6 %&7*$& '"6-5@.$6 73&-&"4& &/='"6 -5 &/@.$6 3&/ $&/ 3&-&"4& &/ *1%&/ 0$=4$ 5)4% '"6-5 0WFSDVSSFOU QSPUFDUJPO 7&/ 7 *) 7*73&-&"4& 1PXFS TUBHF &/"#-&% %*4"#-&% UEJTDIBSHF &/"#-&% UDIBSHF U0$4% '"6-5 U%*4 ". The total disable time after an overcurrent event can be set by properly sizing the external network connected to the EN\FAULT pin (refer to Figure 9 and Figure 10): Equation 2 tDIS = tdischarge + tcharge But tcharge is normally much higher than tdischarge, thus we can consider only the second one contribution: Equation 3  V DD – R EN  I PDEN  – V RELEASE t DIS  R EN  C EN  I n ----------------------------------------------------------------------------------------- V DD – R EN  I PDEN  – V IH Where VDD is the pull-up voltage of the REN resistor. 18/26 DocID029313 Rev 4 STSPIN240 Functional description Figure 9. Disable time versus R%% values (VDD = 3.3 V) EN and CEN  3&/ 3&/ 3&/ %JTBCMF
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3&/ 3&/ 3&/              $&/ ". DocID029313 Rev 4 19/26 26 Functional description 6.5 STSPIN240 Thermal shutdown The device embeds circuitry protecting it from overtemperature conditions. When the thermal shutdown temperature is reached, the power stage is disabled and the EN\FAULT input is forced low through the integrated open drain MOSFET. The protection and the EN\FAULT output are released when the IC temperature returns below a safe operating value (TjSD - TjSD,Hyst). Figure 11. Thermal shutdown management .$6 %&7*$& '"6-5@.$6 73&-&"4& &/='"6-5 &/@.$6 3&/ $&/ 3&-&"4& &/ *1%&/ 0$=4$ 5)4% '"6-5 5IFSNBM TIVUEPXO 5K4% 5K4% IZTU 5K 7&/ 7*) 7*73&-&"4& 1PXFS TUBHF '"6-5 &/"#-&% %*4"#-&% %*4"#-&% &/"#-&% U5)4% ". 20/26 DocID029313 Rev 4 STSPIN240 Graphs Figure 12. Power stage resistance versus supply voltage Figure 13. Power stage resistance versus temperature  3%4 0/
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".7 22/26 DocID029313 Rev 4 STSPIN240 8 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 8.1 VFQFPN 3 x 3 x 1.0 mm - 16L package information Figure 15. VFQFPN 3 x 3 x 1.0 mm - 16L package outline DocID029313 Rev 4 23/26 26 Package information STSPIN240 Table 11. VFQFPN 3 x 3 x 1.0 mm - 16L package mechanical data Dimensions (mm) Symbol Notes Min. Typ. Max. A 0.80 0.90 1.00 (1) A1 - 0.02 - - A3 - 0.20 - - b 0.18 0.25 0.30 - D 2.85 3.00 3.15 - D2 1.70 1.80 1.90 - E 2.85 3.00 3.15 - E2 1.70 1.80 1.90 - e - 0.50 - - L 0.45 0.50 0.55 - 1. VFQFPN stands for “Thermally Enhanced Very thin Fine pitch Quad Packages No lead”. Very thin: 0.80 < A ≤ 1.00 mm / fine pitch: e < 1.00 mm. The pin #1 identifier must be present on the top surface of the package by using an indentation mark or an other feature of the package body. Figure 16. VFQFPN 3 x 3 x 1.0 mm - 16L recommended footprint 24/26 DocID029313 Rev 4 STSPIN240 9 Ordering information Ordering information Table 12. Device summary 10 Order code Package Packaging STSPIN240 VFQFPN 3 x 3 x 1.0 16L Tape and reel Revision history Table 13. Document revision history Date Revision 06-May-2016 1 Initial release. 2 Updated document status to Datasheet - production data on page 1. Updated Table 1 on page 6 (changed Max. value of VS from 12 to 11). Updated Table 7 on page 11 (changed value of tOFF from 47 µs to 37 µs). 3 Updated Figure 1 on page 5 and Figure 12 on page 21 (replaced by new figures). Updated Table 2 on page 6 (added tINw symbol). Updated Table 3 on page 6 (replaced by new table). Minor modifications throughout document. 4 Updated Table 2 on page 6 (removed tINw parameter). Updated title of Figure 12 on page 21 and Figure 13 on page 21 [removed “(normalized at ...”]. Minor modifications throughout document. 30-Jun-2016 04-Nov-2016 11-Aug-2017 Changes DocID029313 Rev 4 25/26 26 STSPIN240 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved 26/26 DocID029313 Rev 4