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STU16NC50

STU16NC50

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

  • 描述:

    STU16NC50 - N-CHANNEL 500V - 0.22ohm - 16A Max220 PowerMeshâ„¢II MOSFET - STMicroelectronics

  • 数据手册
  • 价格&库存
STU16NC50 数据手册
N-CHANNEL 500V - 0.22Ω - 16A Max220 PowerMesh™II MOSFET TYPE STU16NC50 s s s s s STU16NC50 VDSS 500V RDS(on) < 0.27Ω ID 16 A TYPICAL RDS(on) = 0.22Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED NEW HIGH VOLTAGE BENCHMARK GATE CHARGE MINIMIZED Max220 1 2 3 DESCRIPTION The PowerMESH™II is the evolution of the first generation of MESH OVERLAY™. The layout refinements introduced greatly improve the Ron*area figure of merit while keeping the device at the leading edge for what concerns swithing speed, gate charge and ruggedness. APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING s UNINTERRUPTIBLE POWER SUPPLIES (UPS) s DC-AC CONVERTERS FOR TELECOM, INDUSTRIAL, AND LIGHTING EQUIPMENT s INTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID ID IDM (q) PTOT dv/dt(1) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuos) at TC = 25°C Drain Current (continuos) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature Value 500 500 ±30 16 10 64 160 1.28 3 –65 to 150 150 (1)ISD ≤16A, di/dt ≤100A/µs, V DD ≤ V(BR)DSS, Tj ≤ T JMAX. Unit V V V A A A W W/°C V/ns °C °C (•)Pulse width limited by safe operating area October 2001 1/8 STU16NC50 THERMAL DATA Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Maximum Lead Temperature For Soldering Purpose 0.78 62.5 300 °C/W °C/W °C AVALANCHE CHARACTERISTICS Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) Max Value 16 1000 Unit A mJ ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 µA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 °C VGS = ±30V Min. 500 1 50 ±100 Typ. Max. Unit V µA µA nA ON (1) Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS, ID = 250 µA VGS = 10V, ID = 9A Min. 2 Typ. 3 0.22 Max. 4 0.27 Unit V Ω DYNAMIC Symbol gfs Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS > ID(on) x RDS(on)max, ID = 9A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 18 2980 410 58 Max. Unit S pF pF pF 2/8 STU16NC50 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 400V, ID = 20 A, VGS = 10V Test Conditions VDD = 250V, ID = 10 A RG = 4.7Ω VGS = 10V (see test circuit, Figure 3) Min. Typ. 29 21 95 14.7 41.7 128 Max. Unit ns ns nC nC nC SWITCHING OFF Symbol tr(Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 400V, ID = 20 A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 5) Min. Typ. 14 30 58 Max. Unit ns ns ns SOURCE DRAIN DIODE Symbol ISD ISDM (2) Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Test Conditions Min. Typ. Max. 16 64 Unit A A V ns µC A VSD (1) trr Qrr IRRM ISD = 18.4 A, VGS = 0 ISD = 20 A, di/dt = 100A/µs, VDD = 100V, Tj = 150°C (see test circuit, Figure 5) 480 5 21 1.6 Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/8 STU16NC50 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STU16NC50 Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STU16NC50 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STU16NC50 Max220 MECHANICAL DATA DIM. MIN. A A1 A2 b b1 b2 c D D1 D2 D3 e E L L1 4.3 2.2 2.9 0.7 1.25 1.2 0.45 15.9 9 0.8 2.8 2.44 10.05 13.2 3 mm TYP. MAX. 4.6 2.4 3.1 0.93 1.4 1.38 0.6 16.3 9.35 1.2 3.2 2.64 10.35 13.6 3.4 0.354 0.031 0.110 0.096 0.396 0.520 0.118 MIN. 0.169 0.087 0.114 0.027 0.049 0.047 0.18 0.626 inch TYP. MAX. 0.181 0.094 0.122 0.036 0.055 0.054 0.023 0.641 0.368 0.047 0.126 0.104 0.407 0.535 0.133 D3 D2 D1 A A2 C D b1 b2 E b e L1 L A1 P011R 7/8 STU16NC50 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics ® 2000 STMicroelectronics - All Rights Reserved All other names are the property of their respective owners. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 8/8
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