STD8NM50N, STP8NM50N
Datasheet
N-channel 500 V, 0.73 Ω typ., 5 A, MDmesh™ II Power MOSFETs
in DPAK and TO-220 packages
Features
Order codes
TAB
TAB
VDS @ TJmax
RDS(on) max.
ID
550 V
0.79 Ω
5A
STD8NM50N
2 3
1
STP8NM50N
TO-220
DPAK
1
2
3
•
•
•
100% avalanche tested
Low input capacitance and gate charge
Low gate input resistance
Applications
D(2, TAB)
•
Switching applications
Description
G(1)
S(3)
AM01475v1_noZen
These devices are N-channel Power MOSFETs developed using the second
generation of MDmesh™ technology. These revolutionary Power MOSFETs
associate a vertical structure to the company’s strip layout to yield one of the world’s
lowest on-resistance and gate charge. They are therefore suitable for the most
demanding high-efficiency converters.
Product status links
STD8NM50N
STP8NM50N
Product summary
Order code
STD8NM50N
Marking
8NM50N
Package
DPAK
Packing
Tape and reel
Order code
STP8NM50N
Marking
8NM50N
Package
TO-220
Packing
Tube
DS6808 - Rev 7 - September 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
STD8NM50N, STP8NM50N
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
Parameter
Value
VDS
Drain-source voltage
500
VGS
Gate-source voltage
±25
Unit
V
Drain current (continuous) at Tcase = 25 °C
5
Drain current (continuous) at Tcase = 100 °C
3
IDM(1)
Drain current (pulsed)
20
A
PTOT
Total dissipation at Tcase = 25 °C
45
W
Peak diode recovery voltage slope
15
V/ns
-55 to 150
°C
ID
dv/dt(2)
Tstg
Storage temperature range
Tj
Operating junction temperature range
A
1. Limited by maximum junction temperature
2. ISD ≤ 5 A, di/dt ≤ 400 A/μs, VDS(Peak) ≤ V(BR)DSS, VDD = 80% V(BR)DSS
Table 2. Thermal data
Symbol
Parameter
Rthj-case
Thermal resistance junction-case
Rthj-amb
Thermal resistance junction-ambient
Rthj-pcb
(1)
Thermal resistance junction-pcb
Value
DPAK
TO-220
2.78
Unit
°C/W
62.5
50
°C/W
°C/W
1. When mounted on an 1 inch² FR-4, 2 Oz copper board
Table 3. Avalanche characteristics
Symbol
DS6808 - Rev 7
Parameter
IAR
Avalanche current, repetitive or non-repetitive (pulse width limited by TJmax)
EAS
Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V)
Value
Unit
2
A
140
mJ
page 2/21
STD8NM50N, STP8NM50N
Electrical characteristics
2
Electrical characteristics
(Tcase = 25 °C unless otherwise specified)
Table 4. Static
Symbol
V(BR)DSS
Parameter
Test conditions
Drain-source breakdown voltage
VGS = 0 V, ID = 1 mA
Min.
Typ.
Max.
500
Unit
V
VGS = 0 V, VDS = 500 V
1
IDSS
Zero gate voltage drain current
VGS = 0 V, VDS = 500 V,
Tcase = 125 °C (1)
100
IGSS
Gate-body leakage current
VDS = 0 V, VGS = ±25 V
±100
nA
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 250 µA
3
4
V
RDS(on)
Static drain-source on-resistance
VGS = 10 V, ID = 2.5 A
0.73
0.79
Ω
Min.
Typ.
Max.
Unit
-
364
-
-
33
-
-
1.2
-
2
µA
1. Defined by design, not subject to production test.
Table 5. Dynamic
Symbol
Parameter
Test conditions
Ciss
Input capacitance
Coss
Output capacitance
Crss
Reverse transfer capacitance
Coss eq.(1)
Equivalent output capacitance
VDS = 0 to 400 V, VGS = 0 V
-
147.5
-
pF
RG
Intrinsic gate resistance
f = 1 MHz, ID = 0 A
-
5.4
-
Ω
Qg
Total gate charge
VDD = 400 V, ID = 5 A,
-
14
-
Qgs
Gate-source charge
VGS = 0 to 10 V
-
3
-
Gate-drain charge
(see Figure 15. Test circuit for gate
charge behavior)
-
7
-
Qgd
VDS = 50 V, f = 1 MHz, VGS = 0 V
pF
nC
1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0
to 80% VDSS.
Table 6. Switching times
Symbol
td(on)
tr
td(off)
tf
DS6808 - Rev 7
Parameter
Test conditions
Min.
Typ.
Max.
Turn-on delay time
VDD = 250 V, ID = 2.5 A,
-
7
-
Rise time
RG = 4.7 Ω, VGS = 10 V
-
4.4
-
Turn-off delay time
(see Figure 14. Test circuit for
resistive load switching times and
Figure 19. Switching time
waveform)
-
25
-
-
9
-
Fall time
Unit
ns
page 3/21
STD8NM50N, STP8NM50N
Electrical characteristics
Table 7. Source-drain diode
Symbol
ISD
ISDM(1)
(2)
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Source-drain current
-
5
A
Source-drain current (pulsed)
-
20
A
1.5
V
Forward on voltage
VGS = 0 V, ISD = 5 A
-
trr
Reverse recovery time
ISD = 5 A, di/dt = 100 A/µs,
-
187
ns
Qrr
Reverse recovery charge
VDD = 60 V
-
1.3
μC
Reverse recovery current
(see Figure 16. Test circuit for
inductive load switching and diode
recovery times)
-
14
A
trr
Reverse recovery time
ISD = 5 A, di/dt = 100 A/µs,
-
224
ns
Qrr
Reverse recovery charge
VDD = 60 V, Tj = 150 °C
-
1.5
μC
IRRM
Reverse recovery current
(see Figure 16. Test circuit for
inductive load switching and diode
recovery times)
-
13
A
VSD
IRRM
1. Pulse width is limited by safe operating area.
2. Pulse test: pulse duration = 300 µs, duty cycle 1.5%.
DS6808 - Rev 7
page 4/21
STD8NM50N, STP8NM50N
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area for DPAK
Figure 2. Thermal impedance for DPAK
AM07915v1
ID
(A)
on
)
10µs
D
S(
O
Li p e r
m at
ite io
d ni
by n
m th is
ax a
R re a
is
10
1
100µs
1ms
10ms
Tj=150°C
Tc=25°C
0.1
0.01
0.1
S ingle
puls e
10
1
100
VDS (V)
Figure 3. Safe operating area for TO-220
Figure 4. Thermal impedance for TO-220
AM07916v1
ID
(A)
on
)
10µs
D
S(
O
Li p e r
m at
ite io
d ni
by n
m th is
ax a
R re a
is
10
1
100µs
Tj=150°C
Tc=25°C
0.1
0.01
1ms
10ms
S ingle
puls e
0.1
10
1
100
VDS (V)
Figure 5. Output characteristics
ID
(A)
Figure 6. Transfer characteristics
AM07917v1
VGS =10V
10
8
6V
6
6
4
4
5V
2
DS6808 - Rev 7
VDS = 20 V
10
7V
8
0
AM07918v1
ID
(A)
0
10
20
30
VDS (V)
2
0
0
2
4
6
8
VGS (V)
page 5/21
STD8NM50N, STP8NM50N
Electrical characteristics (curves)
Figure 7. Static drain-source on-resistance
AM07919v1
R DS (on)
(Ω)
0.77
AM07920v1
VGS
(V)
VDS (V)
VDD=400 V
12
VGS =10V
0.76
Figure 8. Gate charge vs gate-source voltage
0.74
350
VDS
10
0.75
400
ID=5 A
300
8
250
6
200
0.73
0.72
150
0.71
4
0.70
0.69
0.68
100
2
0
2
1
3
4
5
ID(A)
Figure 9. Capacitance variations
1000
50
10
5
0
0
Q g (nC)
15
Figure 10. Output capacitance stored energy
AM07921v1
C
(pF)
0
Cis s
AM07922v1
E
(μJ)
2
100
Cos s
1
10
Crs s
1
0
1
10
100
VDS (V)
Figure 11. Normalized gate threshold voltage vs
temperature
AM07923v1
VGS (th)
(norm)
0
0
200
100
500 VDS (V)
AM07924v1
R DS (on)
(norm)
2.1
ID = 2.5 A
1.7
1.00
1.3
0.90
0.9
0.80
DS6808 - Rev 7
400
Figure 12. Normalized on-resistance vs temperature
ID = 250 µA
0.70
-50 -25
300
0
25
50
75 100
TJ (°C)
0.5
-50 -25
0
25
50
75 100
TJ (°C)
page 6/21
STD8NM50N, STP8NM50N
Electrical characteristics (curves)
Figure 13. Normalized V(BR)DSS vs temperature
AM09028v1
V(BR)DSS
(norm)
ID=1mA
1.10
1.08
1.06
1.04
1.02
1.00
0.98
0.96
0.94
0.92
-50 -25
DS6808 - Rev 7
0
25
50
75
100
TJ(°C)
page 7/21
STD8NM50N, STP8NM50N
Test circuits
3
Test circuits
Figure 14. Test circuit for resistive load switching times
Figure 15. Test circuit for gate charge behavior
VDD
12 V
2200
+ μF
3.3
μF
VDD
VD
VGS
1 kΩ
100 nF
RL
IG= CONST
VGS
RG
47 kΩ
+
pulse width
D.U.T.
2.7 kΩ
2200
μF
pulse width
D.U.T.
100 Ω
VG
47 kΩ
1 kΩ
AM01469v1
AM01468v1
Figure 16. Test circuit for inductive load switching and
diode recovery times
D
G
A
D.U.T.
S
25 Ω
A
L
A
B
B
3.3
µF
D
G
+
VD
100 µH
fast
diode
B
Figure 17. Unclamped inductive load test circuit
RG
1000
+ µF
2200
+ µF
VDD
3.3
µF
VDD
ID
D.U.T.
S
D.U.T.
Vi
_
pulse width
AM01471v1
AM01470v1
Figure 19. Switching time waveform
Figure 18. Unclamped inductive waveform
ton
V(BR)DSS
td(on)
VD
toff
td(off)
tr
tf
90%
90%
IDM
VDD
10%
0
ID
VDD
AM01472v1
VGS
0
VDS
10%
90%
10%
AM01473v1
DS6808 - Rev 7
page 8/21
STD8NM50N, STP8NM50N
Package information
4
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK®
packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions
and product status are available at: www.st.com. ECOPACK® is an ST trademark.
DS6808 - Rev 7
page 9/21
STD8NM50N, STP8NM50N
DPAK (TO-252) type A package information
4.1
DPAK (TO-252) type A package information
Figure 20. DPAK (TO-252) type A package outline
0068772_A_25
DS6808 - Rev 7
page 10/21
STD8NM50N, STP8NM50N
DPAK (TO-252) type A package information
Table 8. DPAK (TO-252) type A mechanical data
Dim.
mm
Min.
Max.
A
2.20
2.40
A1
0.90
1.10
A2
0.03
0.23
b
0.64
0.90
b4
5.20
5.40
c
0.45
0.60
c2
0.48
0.60
D
6.00
6.20
D1
4.95
E
6.40
E1
4.60
4.70
4.80
e
2.159
2.286
2.413
e1
4.445
4.572
4.699
H
9.35
10.10
L
1.00
1.50
(L1)
2.60
2.80
3.00
L2
0.65
0.80
0.95
L4
0.60
R
V2
DS6808 - Rev 7
Typ.
5.10
5.25
6.60
1.00
0.20
0°
8°
page 11/21
STD8NM50N, STP8NM50N
DPAK (TO-252) type C package information
4.2
DPAK (TO-252) type C package information
Figure 21. DPAK (TO-252) type C package outline
0068772_C_25
DS6808 - Rev 7
page 12/21
STD8NM50N, STP8NM50N
DPAK (TO-252) type C package information
Table 9. DPAK (TO-252) type C mechanical data
Dim.
mm
Min.
Typ.
Max.
A
2.20
2.30
2.38
A1
0.90
1.01
1.10
A2
0.00
0.10
b
0.72
0.85
b4
5.13
c
0.47
0.60
c2
0.47
0.60
D
6.00
D1
5.25
E
6.50
E1
4.70
e
5.46
6.10
6.20
6.60
6.70
2.186
2.286
2.386
H
9.80
10.10
10.40
L
1.40
1.50
1.70
L1
L2
2.90 REF
0.90
L3
L4
1.25
0.51 BSC
0.60
L6
DS6808 - Rev 7
5.33
0.80
1.00
1.80 BSC
θ1
5°
7°
9°
θ2
5°
7°
9°
V2
0°
8°
page 13/21
STD8NM50N, STP8NM50N
DPAK (TO-252) type C package information
Figure 22. DPAK (TO-252) recommended footprint (dimensions are in mm)
FP_0068772_25_C
DS6808 - Rev 7
page 14/21
STD8NM50N, STP8NM50N
DPAK (TO-252) packing information
4.3
DPAK (TO-252) packing information
Figure 23. DPAK (TO-252) tape outline
10 pitches cumulative
tolerance on tape +/- 0.2 mm
T
P0
Top cover
tape
P2
D
E
F
B1
K0
For machine ref. only
including draft and
radii concentric around B0
W
B0
A0
P1
D1
User direction of feed
R
Bending radius
User direction of feed
AM08852v1
DS6808 - Rev 7
page 15/21
STD8NM50N, STP8NM50N
DPAK (TO-252) packing information
Figure 24. DPAK (TO-252) reel outline
T
40mm min.
access hole
at slot location
B
D
C
N
A
G measured
at hub
Tape slot
in core for
tape start
2.5mm min.width
Full radius
AM06038v1
Table 10. DPAK (TO-252) tape and reel mechanical data
Tape
Dim.
mm
mm
Dim.
Min.
Max.
A0
6.8
7
A
B0
10.4
10.6
B
1.5
12.1
C
12.8
1.6
D
20.2
G
16.4
50
B1
DS6808 - Rev 7
Reel
Min.
Max.
330
13.2
D
1.5
D1
1.5
E
1.65
1.85
N
F
7.4
7.6
T
K0
2.55
2.75
P0
3.9
4.1
Base qty.
2500
P1
7.9
8.1
Bulk qty.
2500
P2
1.9
2.1
R
40
T
0.25
0.35
W
15.7
16.3
18.4
22.4
page 16/21
STD8NM50N, STP8NM50N
TO-220 type A package information
4.4
TO-220 type A package information
Figure 25. TO-220 type A package outline
0015988_typeA_Rev_21
DS6808 - Rev 7
page 17/21
STD8NM50N, STP8NM50N
TO-220 type A package information
Table 11. TO-220 type A package mechanical data
Dim.
mm
Min.
Max.
A
4.40
4.60
b
0.61
0.88
b1
1.14
1.55
c
0.48
0.70
D
15.25
15.75
D1
DS6808 - Rev 7
Typ.
1.27
E
10.00
10.40
e
2.40
2.70
e1
4.95
5.15
F
1.23
1.32
H1
6.20
6.60
J1
2.40
2.72
L
13.00
14.00
L1
3.50
3.93
L20
16.40
L30
28.90
øP
3.75
3.85
Q
2.65
2.95
page 18/21
STD8NM50N, STP8NM50N
Revision history
Table 12. Document revision history
Date
Version
20-Apr-2010
1
Changes
Initial release.
Document status promoted from preliminary data to datasheet.
03-Sep-2010
2
Inserted Section 2.1: Electrical characteristics (curves).
Corrected RDS(on) max value in: Features.
Modified: Figure 4.
03-Feb-2011
3
Modified: note 1.
Modified: Table 5.
Updated VDSS (@Tjmax) in cover page.
21-Oct-2011
4
Updated Section 4: Package mechanical data.
Minor text changes
15-Nov-2011
5
13-Sep-2012
6
The part number STF8NM50N has been moved to a separate datasheet.
Figure 2 and Figure 4 have been modified.
Section 4: Package mechanical data has been updated.
The part number STU8NM50N has been moved to a separate datasheet.
04-Sep-2018
7
Removed maturity status indication from cover page. The document status is
production data.
Updated Section 4 Package information.
Minor text changes
DS6808 - Rev 7
page 19/21
STD8NM50N, STP8NM50N
Contents
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4
Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
4.1
DPAK (TO-252) type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.2
DPAK (TO-252) type C package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3
DPAK (TO-252) packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.4
TO-220 type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
DS6808 - Rev 7
page 20/21
STD8NM50N, STP8NM50N
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
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products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
DS6808 - Rev 7
page 21/21