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STV6414ADT

STV6414ADT

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

  • 描述:

    STV6414ADT - Audio/video switch matrix - STMicroelectronics

  • 数据手册
  • 价格&库存
STV6414ADT 数据手册
STV6414A Audio/video switch matrix Features ■ ■ ■ I²C bus control Standby mode with interrupt signal output Video section – 3 CVBS inputs, 2 CVBS outputs – 3 Y/C inputs, 2 Y/C outputs – Switchable LPFs (low pass filters) on 6 inputs – 6 dB gain on all CVBS/Y and C outputs – Integrated 150 Ω buffers – 2 RGB/FB inputs, 1 tri-state RGB/FB output with 6 dB adjustable gain (from +3 dB to +9 dB) – Video muting on all outputs – 2 slow blanking inputs/outputs – Sync bottom clamp on all CVBS/Y and RGB inputs, average clamp on C inputs – SVHS switch on C VCR output – Bandwidth: 15 MHz – Crosstalk: 50 dB minimum Audio section – 3 stereo inputs, 3 stereo outputs – Stereo-to-mono sound capability – 0/6/9 dB selectable gain on one stereo input – Full range volume control with soft control – Audio muting on all outputs LQFP64 (10 × 10 × 1.4 mm) (Low-profile Quad Flat Package) Marking: STV6414ADT Description The STV6414A is a highly integrated I²C buscontrolled audio and video switch matrix, optimized for use in digital set-top box applications. It provides the audio and video routings required in a two SCART set-top box design. In an LQFP64 (10 × 10 × 1.4 mm) package, the STV6414A is compatible with the STV6413. Table 1. Order code STV6414AD STV6414ADT ■ Device summary Packaging Tray Tape and reel June 2008 Rev 1 1/32 www.st.com 32 Contents STV6414A Contents 1 General information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 I/O pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1 2.2 2.3 2.4 2.5 2.6 2.7 Latch-up data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Audio section characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Video section characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Chroma section characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Blanking section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 I²C bus characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3 I²C bus selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.1 I²C bus addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4 5 6 Input/output groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6.1 Lead-free packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 2/32 STV6414A General information 1 Figure 1. General information STV6414A pinout diagram Y/CVBSOUT_VCR 48 Y/CVBSOUT_TV R/COUT_TV COUT_VCR 46 GOUT_TV BOUT_TV LOUT_TV 47 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCCB 1 VCCB 2 VCCB 3 VCCB 4 VCCB 5 GNDB NC NC NC FBOUT_TV FBIN_VCR FBIN_ENC NC VDD NC SCL SDA GND IT_OUT SLB_TV R/CIN_VCR SLB_VCR GIN_VCR VCC12 BIN_VCR 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 10 11 12 13 14 15 16 1 VCC 2 NC 3 DECV 4 Y/CVBSIN_ENC 5 GND 6 YIN_ENC 7 NC 8 CIN_ENC 9 NC STV6414A ROUT_TV VCCAO LOUT_VCR ROUT_VCR LOUT_CINCH ROUT_CINCH NC GNDA VCCA RIN_TV LIN_TV CVBSIN_TV RIN_VCR LIN_VCR Y/CVBSIN_VCR GND R/CIN_ENC RIN_ENC GIN_ENC LIN_ENC BIN_ENC NC DECA 3/32 General information STV6414A 1.1 I/O pin description Table 2. Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 I/O pin description Name VCC NC DECV Y/CVBSIN_ENC GND YIN_ENC NC CIN_ENC NC R/CIN_ENC RIN_ENC GIN_ENC LIN_ENC BIN_ENC NC DECA GND Y/CVBSIN_VCR LIN_VCR RIN_VCR CVBSIN_TV LIN_TV RIN_TV Function +5 V Supply Not connected Video decoupling capacitor Y/CVBS input from encoder Ground Y input from encoder Not connected Chroma input from encoder Not connected Red/Chroma input from encoder Audio right, input from encoder Green input from encoder Audio left, input from encoder Blue input from encoder Not connected Audio decoupling capacitor Ground Y/CVBS input from VCR SCART Audio left, input from VCR SCART Audio right, input from VCR SCART CVBS input from TV SCART Audio left, input from TV SCART Audio right, input from TV SCART 9V audio supply voltage output if VCCAO is used as 12V supply voltage input or 9V audio supply voltage input, VCCAO must be used as 9V supply voltage input Audio ground Not connected Audio right output to CINCH Audio left output to CINCH Audio right output to VCR SCART Audio left output to VCR SCART 24 VCCA (see Figure 2) 25 26 27 28 29 30 GNDA NC ROUT_CINCH LOUT_CINCH ROUT_VCR LOUT_VCR 4/32 STV6414A Table 2. Pin No. General information I/O pin description (continued) Name Function 12V supply voltage input, VCCA is regulated 9V output for decoupling or 9v Supply Voltage input, VCCA must be used as 9V supply voltage input. Audio right output to TV SCART Audio left output to TV SCART Not connected Not connected Not connected Video output buffer supply pin Blue output to TV SCART Video output buffer supply pin Green output to TV SCART Video buffer ground Red/Chroma output to TV SCART Video output buffer supply pin Y/CVBS output to TV SCART Video output buffer supply pin Chroma output to VCR SCART Video output buffer supply pin Y/CVBS output to VCR SCART Fast blanking output to TV SCART Fast blanking input from VCR SCART Fast blanking input from encoder Not connected +5 V I²C supply Not connected I²C bus clock I²C bus data Ground digital Interrupt output Slow blanking input/output from TV SCART Red input (or C Input) from VCR SCART Slow blanking input/output from VCR SCART Green input from VCR SCART 31 VCCAO (see Figure 2) 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 ROUT_TV LOUT_TV NC NC NC VCCB5 BOUT_TV VCCB4 GOUT_TV GNDB R/COUT_TV VCCB3 Y/CVBSOUT_TV VCCB2 COUT_VCR VCCB1 Y/CVBSOUT_VCR FBOUT_TV FBIN_VCR FBIN_ENC NC VDD NC SCL SDA GND IT_OUT SLB_TV R/CIN_VCR SLB_VCR GIN_VCR 5/32 General information Table 2. Pin No. 63 64 STV6414A I/O pin description (continued) Name VCC12 BIN_VCR Function +12 V supply Blue input from VCR SCART Figure 2. Power supply configuration STV6414A STV6414A 63 VCC12 9 volt output VCCAO VCCA 24 12V 31 9V 31 VCCAO VCCA 24 9 volt input Audio ground Audio ground In applications where a 12 volt supply from slow blanking is used to derive the internal audio 9 Volt supply voltage, the VCCAO pin must be connected to the 12 volt supply as shown in the example. The VCCA pin will show the regulated 9 volt audio supply voltage which must be decoupled by capacitors. In applications having a dedicated audio supply voltage, the VCCAO pin must be connected together with the VCCA pin to the audio supply as shown in the example. The VCCA pin acts as power supply input for the internal audio block. 6/32 STV6414A Figure 3. STV6414A block diagram General information FBIN_ENC FBIN_VCR FBIN_ENC FBIN_VCR FBOUT_TV FB Switch BIN_ENC BIN_VCR GIN_ENC GIN_VCR R/CIN_ENC R/CIN_VCR LPF LPF LPF BIN_ENC BIN_VCR Mute GIN_ENC GIN_VCR Mute R/CIN_ENC R/CIN_VCR Mute 3 to 9 dB BOUT_TV 3 to 9 dB GOUT_TV 3 to 9 dB RGB Switch R/CIN_VCR CIN_ENC R/CIN_ENC Mute R/C Switch R/COUT_TV Tri-State CIN_ENC LPF 6 dB C Switch Y/CVBSIN_VCR Y/CVBSIN_VCR YIN_ENC Y/CVBSIN_ENC 6 dB YIN_ENC LPF Mute Y/CVBSOUT_TV Y/CVBS Switch Y/CVBSIN_ENC LPF Mute CIN_ENC R/CIN_ENC Mute 6 dB COUT_VCR C Switch CVBSIN_TV CVBSIN_TV Y_ENC Y/CVBSIN_ENC Mute 6 dB IT_OUT Slow Blanking Monitor Interrupt Signal SLB_TV SLB_VCR Y/CVBSOUT_VCR Y/CVBS Switch LIN_ENC LIN_TV 0/6/9 dB LIN_ENC LIN_TV Mute RIN_ENC RIN_TV Mute Stereo/Mono LOUT_VCR ROUT_VCR RIN_ENC 0/6/9 dB VCR Switch RIN_TV LIN_ENC LIN_VCR LIN_TV Mute RIN_ENC RIN_VCR RIN_TV Mute -62 dB 0/6 dB -62 dB 0/6 dB 0/6 dB ROUT_CINCH 0/6 dB LOUT_CINCH LIN_VCR Stereo/Mono LOUT_TV ROUT_TV RIN_VCR TV Switch I²C Bus Decoder SDA SCL 7/32 General information Figure 4. STV6414A functional diagram Audio L Audio R STV6414A STV6414A R/C G B Fast Blanking CVBS SCART1 TV Audio L Audio R CVBS/Y Audio L Audio R Slow Blanking Chroma Switches CVBS/Y Switches RGB and FB Switches CINCH Output R/C G B Fast Blanking CVBS/Y C Audio L Audio R Y Encoder R/C G B Fast Blanking CVBS/Y Audio L Audio R CVBS/Y SCART2 VCR Audio Switches Micro Interrupt Slow Blanking I/O Control C Audio L Audio R Slow Blanking 8/32 STV6414A Electrical characteristics 2 Table 3. Symbol VCC12 VCCAO VCCA VDD VCC, VCCBI Electrical characteristics Absolute maximum ratings Parameter Supply voltage for slow blanking sections Supply voltage for audio drivers Supply voltage for digital audio sections Supply voltage for digital sections Supply voltage for video sections Input voltage at pin (in reference to GND) Audio pins Video pins Bus pins Slow Blanking pins Value 13.2 13.2 10 6 6 0, VCCA 0, VCC or VCCBI 0, 5.5 0, VCC12 Unit V V V V V VIN V VESD Maximum ESD Voltage allowed. (human body model: ±4 100 pF capacitor discharged through 1.5 kOhm serial resistor) kV Table 4. Symbol RthJA TSTG TOPER Tj Thermal data Parameter Maximum junction-to-ambient thermal resistance Storage temperature Operating free air temperature range Maximum junction temperature Value 58 -20, +150 0 to +70 150 Unit °C/W °C °C °C 2.1 Latch-up data At an ambient temperature of 25 °C, all pins meet the following specifications: I trigger = 200 mA or I trigger = -200 mA. 2.2 Recommended operating conditions TAMB = 25° C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V, RLOUTA = 10 kΩ RLOUTV = , 150 Ω (unless otherwise specified) Table 5. Symbol Recommended operating conditions Parameter Test conditions Min Typ Max Unit Supply voltages VDD VCCAO Digital supply voltage Audio operating supply voltage 4.75 - Decoupling capacitor on VCCA 11.2 8.5 - Connected to VCCA 5 12 9 5.25 12.8 9.5 V V 9/32 Electrical characteristics Table 5. Symbol VCC VCC12 STV6414A Recommended operating conditions (continued) Parameter Video operating supply voltage Slow blanking control supply voltage Test conditions Min 4.75 11.2 Typ 5 12 Max 5.25 12.8 Unit V V Active mode (all channels ON) IDD ICCA Digital supply current Audio supply current VDD = 5 V VCCAO = 12 V, no load 6 8 35 50 48 63 0 3 10 15 45 65 62 80 1 4 mA mA ICCV VCC = 5 V, no load, LPF OFF Total video supply current VCC = 5 V, no load, LPF ON (VCC+VCCB1+VCCB2+VCCB3+VCC VCC = 5 V, with load, LPF OFF B4+VCCB5) VCC = 5 V, with load, LPF ON 12 V supply current VCC12 = 12 V SLB input mode SLB output mode, no load mA ICC12 mA Standby mode (all channels OFF + LPF OFF) IDD ICCAstd ICCVstd Digital supply current Audio supply current Total video supply current VDD = 5 V VCCA0 = 12 V, no load VCC = 5 V 6 3 1 10 mA mA mA 2.3 Audio section characteristics TAMB = 25°C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V, RGA = 600 Ω, RLOUTA = 10 kΩ, RGV = 50 Ω, RLOUTV = 150 Ω, unless otherwise specified. Table 6. Symbol Audio section characteristics Parameter Test conditions Min Typ Max Unit SVR100 Supply voltage rejection VRIPPLE = 500 mVRMS at 100 Hz, Gain= 0 dB DECA filter cap = 47 µF 60 DECA filter cap = 220 µF VRIPPLE = 500 mVRMS at 1 kHz, Gain = 0 dB 70 70 80 80 3.2 2 dB SVR1K VINDC VINAC RIN RINmatch FRANGE Flatness Supply voltage rejection Input DC level Input signal amplitude Input resistance Input resistance matching Bandwidth Spread of gain in audio band dB V VRMS kΩ ±10 % kHz 0.5 dB 30 50 ±2 -3 dB, 0.5 VRMS, RLOAD = 10 kΩ, Gain = 0 dB -0.5 VRMS, 20 Hz to 20 kHz, Gain = 0 dB 50 10/32 STV6414A Table 6. Symbol CS Electrical characteristics Audio section characteristics (continued) Parameter Test conditions Min Typ 90 74 85 VCCA/2 1 60 1 VRMS input on each input channel at 1 kHz VIN = 1 VRMS at 1 kHz input weighted CCIR 468-4 quasi peak, 75 Gain = 0 dB BW = 20 Hz, 20 kHz Flat, Gain = 0 dB 0.5 VRMS, RLOAD = 10 kΩ, Gain = 0 dB -62 dB to +6 dB (see Figure 5) VIN = 0.5 VRMS at 1 kHz, Gain = 0 dB VIN = 0.5 VRMS at 1 kHz, Gain = 0 dB VOUT = 0.5 VRMS at 1 kHz, LPF at 80 kHz, Volume level adjustment = 0 dB THD = 0.2%, 1 kHz VIN = 1 VRMS, THD = 0.3%, Gain = 0 dB VIN = 0.5 VRMS, on one point 2.1 2 -90 -0.5 -0.5 2 0.5 85 ±15 120 3 Max Unit dB dB dB V mV W ° deg. Channel separation, from audio VIN = 0.5 VRMS at 1 kHz on one 80 inputs , input, RLOAD = 10 kΩ Gain = 0 dB 70 Between L & R of TV outputs Channel isolation from video inputs Output DC level DC offset change Output resistance Phase difference VIN = 1 VPP at 15 kHz on one point VCCA = 9 V Switching between inputs Ci VOUT VOFF ROUT PHD ASN S/N ratio Equivalent rms input voltage noise 0 dB gain Gain step Gain matching between different inputs of one output Gain matching between left/right outputs of one input channel Total harmonic distortion ENC Input at 0 dB ENC Input at 6 dB ENC Input at 9 dB Output clipping level Output load resistance Mute suppression dB eNI G0 GSTEP GMATCH1 5 +0.5 µV dB dB dB GMATCH2 -0.5 0.5 dB THD0 THD6 THD9 VCL RL Mute 0.01 0.01 0.01 2.3 2.25 0.05 0.05 0.05 % VRMS kΩ dB 11/32 Electrical characteristics Figure 5. Volume control characteristics 0 ± 0.5 dB 18 31 Step Number STV6414A -36 ± 0.5 dB + 2 dB -62 dB - 0.5 dB 2.4 Video section characteristics TAMB = 25 °C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V, RLOUTA = 10 kΩ RLOUTV = 150 Ω, unless otherwise specified. , Table 7. Symbol VDCIN ICLAMP ILEAK CIN VIN DYN BW Video characteristics Parameter DC input level Clamping current Input leakage current Input capacitance Max input signal Dynamic output signal Bandwidth at -3 dB - Y/CVBS - RGB Spread of gain in video band (15 kHz - 20 MHz) - Y/CVBS - RGB VCC = 5 V VCC = 5 V Input without low pass filter VIN = 1 VPP VIN = 1 VPPVINC = muted Input without low pass filter VIN = 1 VPP VIN = 1 VPP, VINC = muted 7.5 -47 -36 +/-0.5 +/-0.5 dB 10 10 15 15 Test conditions Bottom sync pulse at VDCIN - 400 mV VIN = VDCIN +1 V 1 Min Typ 2 2 1 2 1.5 3 10 Max Unit V mA µA pF VPP VPP MHz Flatness BW LPF ATT Low pass filter bandwidth at -3dB VIN = 1 VPP, CL=10pF Low pass filter attenuation 27 MHz Mhz dB 12/32 STV6414A Table 7. Symbol CTi CTo ROUT GRGB GRGBM Electrical characteristics Video characteristics (continued) Parameter Test conditions Min Typ 60 50 5 VIN = 1 Vpp, gain = 6 dB VIN = 1 Vpp, gain = 6 dB 3 dB to 6 dB VIN = 1 VPP 5.5 -0.3 0.75 5.5 -0.5 6 0 1 6 0 0.6 1 1 -55 0.3 Refer to note below 65 3 5 5 10 6.5 0.3 1.25 6.5 0.5 Max Unit dB dB Ω dB dB dB dB dB V ° deg. % dB % dB Crosstalk isolation between input VIN = 1 VPP at 4.43 MHz on channel one point Crosstalk Isolation between output channel Output resistance Gain at RGB outputs Gain matching between R, G, B VIN = 1 VPP at f = 4.43 MHz, on one point, RLOAD = 150Ω GRGBSTEP Step of gain GYCVBS GYCVBSM DCOUT DPHI DG Mute LNL VSN Gain on Y,/CVBS channels Gain matching between Y, CVBS VIN = 1 VPP inputs DC output voltage Differential phase Differential gain Mute suppression Luminance non-linearity Video S/N Ratio Bottom sync pulse VIN = 1 VPP at 4.43 MHz VIN = 1 VPP at 4.43 MHz VIN = 1 VPP at 5 MHz on one point Note: S/N = 20 log (VOUT black to white = 0.7 VPP / VNoise (mVRMS) weighted CCIR 567). 2.5 Chroma section characteristics TAMB = 25 °C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V, RLOUTA = 10 kΩ RLOUTV = 150 Ω, unless otherwise specified. , Table 8. Symbol VDCIN RIN CIN VIN DYN DCOUT CBW CTi Chroma section characteristics Parameter DC input level Input resistance Input capacitance Max input signal Dynamic output signal DC output VCR voltage Chroma bandwidth Crosstalk isolation between input channel CIN = 1 VPP at -3 db VIN = 1 VPP at 4.43 MHz on one input 10 2.2 15 55 30 Test conditions Min Typ 3 50 2 1.5 3 Max Unit V kΩ pF VPP VPP V MHz dB 13/32 Electrical characteristics Table 8. Symbol CTo ROUT GOUTC GCM Mute CToYdel ZCOUT_V CR STV6414A Chroma section characteristics (continued) Parameter Crosstalk isolation between output channel Output resistance Gain at OUTC Gain matching between C inputs Mute suppression Chroma to luma delay, source Y/C Output impedance when switched to ground VIN = 1 Vpp VIN = 1 VPP 5.5 -0.5 Test conditions VIN = 1 VPP at 4.43 MHz on one input, RLOAD = 150 Ω Min Typ 50 5 6 0 10 6.5 0.5 Max Unit dB W dB dB dB 20 2 ns W VIN = 1 VPP at 4.43 MHz on one 55 input VPP at 4.43 MHz 2.7V applied to COUT_VCR with series 75Ω Resistor 2.6 Blanking section TAMB = 25 °C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V, RLOUTA = 10 kΩ RLOUTV = 150 Ω, unless otherwise specified. , Table 9. Symbol Slow blanking section Parameter Test conditions Min Typ Max Unit Input mode SLBlow SLBhigh IIN Input low level threshold Input high level threshold Input current 2.5 7.5 3.25 8.25 50 4 9 100 V V µA Output mode SLBlow SLBmed SLBhigh Output low level (int. TV) Output medium level (ext. 16/9) Output high level (ext. 4/3) 0 5 10 0.02 5.75 11 1.5 6.5 12 V V V Table 10. Symbol Input mode Fast blanking section Parameter Test conditions Min Typ Max Unit FBlow/high Input low/high level threshold IIN Input current 0.4 0.7 2 0.9 10 V µA Output mode FBLOW FBHIGH Output Low Level Output High Level RLOAD = 150 Ω 0.5 3.0 3.4 3.8 V V 14/32 STV6414A Table 10. Symbol Electrical characteristics Fast blanking section (continued) Parameter Test conditions At 50% on digital RGB transients, at 2 V on FB rise transient, at 1 V on FB fall, CLOAD = 10pF maximum CLOAD = 10 pF maximum between 10% and 90% between 90% and 10% Min Typ Max Unit FBDEL Fast Blanking RGB delay 15 ns FBTRANS FB Transitions at FB output Rise Time Fall Time 10 10 ns ns Table 11. Symbol IT-Leak IT-Low Interrupt output Parameter High level leakage Output low level (active) Test conditions External pull-up to 5 V IIN = 0 mA IIN = 1 mA Min Typ Max 10 0.3 0.7 Unit µA V V Note: The interrupt is forced low when a change is detected on slow blanking inputs. It can be used in standby mode to wake up the microprocessor. It is released when the I²C bus register is read. Address selection input Parameter Test conditions Min Typ 0 2.5 Max 0.2 VDD 10 Unit V V µA Table 12. Symbol ADDsel_ Address selection low level L ADDsel_ Address selection high level H ILEAK Leakage current 15/32 Electrical characteristics STV6414A 2.7 I²C bus characteristics TAMB = 25°C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V, RLOUTA = 10kΩ RLOUTV = 150Ω, unless otherwise specified. , Table 13. Symbol SCL VIL VIH ILI fSCL tR tF CI SDA VIL VIH ILI CI tR tF VOL tF CL I2C bus characteristics Parameter Test conditions Min Typ Max Unit Low level input voltage High level input voltage Input leakage current Clock frequency Input rise time Input fall time Input capacitance 1.5 V to 3 V 1.5 V to 3 V VIN = 0 to 5.5 V -0.3 2.3 -10 0 1.5 5.5 10 400 1 300 10 V V µA kHz µs ns pF Low level input voltage High level input voltage Input leakage current Input capacitance Input rise time Input fall time Low level output voltage Output fall time Load capacitance 1.5 V to 3 V 3 V to 1.5 V IOL = 3 mA 3 V to 1.5 V VIN = 0 to 5.5 V -0.3 2.3 -10 0 1.5 5.5 10 10 1 300 0.4 250 400 V V µA pF µs ns V ns pF Timing: SCL frequency = 400 kHz tLOW tHIGH tSU,DAT tHD,DAT tSU,STO tBUF tHD,STA tSU,STA Clock low period clock high period Data setup time Data hold time Setup Time from clock high to stop Start setup time following a stop Start hold time Start setup time following clock low to high transition 1.3 0.6 100 0 0.6 1.3 0.6 0.6 340 µs µs ns ns µs µs µs µs 16/32 STV6414A Figure 6. I²C bus timing Electrical characteristics SDA tBUF tLOW tF SCL tHD,STA tR tHD,DAT tHIGH tSU,DAT SDA (start, stop) tSU,STA tSU,STO 17/32 I²C bus selection STV6414A 3 I²C bus selection Data transfers follow the usual I²C format; that is, after the start condition (S), a 7-bit slave address is sent, followed by an eight-bit data direction bit (W). An 8-bit sub-address is sent to select a register, followed by an 8-bit data word to be included in the register. The IC’s I²C bus decoder enables the automatic incrementation mode in write mode. The circuit operates at clock frequencies of up to 400 kHz. Table 14. S String format 0 A SUB-ADDRESS A DATA A P Write only mode (S = Start condition, P = Stop condition, A = Acknowledge) SLAVE ADDRESS Table 15. S Read only mode SLAVE ADDRESS 1 A DATA A P Table 16. Address Value Slave address A6 1 A5 0 A4 0 A3 1 A2 0 A1 1 A0 X Table 17. S Auto increment mode 0 A SUB-ADDRESS A DATA0 A DATA1 A .... DATAn A P Sub-Address Sub-Address +1 Sub-Address + N SLAVE ADDRESS 3.1 I²C bus addresses Write Address: 1001 0110 = 96(hex), Read Address: 1001 0111 = 97(hex) Table 18. Reg add (hex) Audio 00h Input signal summary (write mode) Data d7 d6 d5 d4 d3 d2 d1 d0 TV Stereo Mono VCR Stereo Mono TV 0/6 dB TV Volume-62 dB to 0 dB - 2 dB steps CINCH Audio Gain Soft Volume Mode 01h Video Not Used (See Note) VCR Audio Switch Control TV/CINCH Audio Switch Control 18/32 STV6414A Table 18. Reg add (hex) I²C bus selection Input signal summary (write mode) (continued) Data d7 VCR chroma muted RGB and FB tri-state d6 d5 d4 d3 d2 d1 d0 02h TV VCR video and chroma switch control chroma muted RGB gain TV video and chroma switch control Fast blanking mode/input selection 03h RGB switch control Miscellaneous 04h IT enable SLB mode LPF enable VCR-C output control TV R or C Not used Not used output (see Note) (see Note) selection VCR R/C ENC R/C sub clamp sub clamp 05h Standby 06h VCR slow blanking TV slow blanking ENC audio input gain 0/6/9 dB Not used (see Note) TV outputs CINCH outputs VCR outputs Not used (see Note) TV inputs VCR inputs ENC inputs Note: At register address 06h, bits marked “Not used” must be set to “1”. All other bits from all other registers marked “Not used” must be set to “0”. TV audio output Data Description Bits d7 Soft volume change Level adjustment 1 5 1 1 X X X X X X 0 1 d6 X X X X 0 1 X X d5 X X 0 1 X X X X d4 X X 0 1 X X X X d3 X X 0 1 X X X X d2 X X 0 1 X X X X d1 X X 0 1 X X X X d0 0 1 X X X X X X Active Disabled 0 dB -62 dB (-2 dB/step) 0 dB +6 dB 0 = stereo 1 = mono Comments Table 19. Reg add (hex) 00h 6 dB extra gain TV stereo or mono mode 19/32 I²C bus selection STV6414A Table 20. Reg add (hex) Audio selection and VCR audio output Data Description Bits d7 X X X X X X X X X X X X X X 0 1 d6 X X X X X X X X X X X X X X X X d5 X X X X X X X X X X 0 0 1 1 X X d4 X X X X X X X X X X 0 1 0 1 X X d3 X X X X X X X X 0 1 X X X X X X d2 0 0 0 0 1 1 1 1 X X X X X X X X d1 0 0 1 1 0 0 1 1 X X X X X X X X d0 0 1 0 1 0 1 0 1 X X X X X X X X Muted Encoder L/R selected VCR L/R selected Not allowed TV L/R selected Not allowed Not allowed Not allowed 0 dB Follow TV gain Muted Encoder L/R selected TV L/R selected Not allowed 0 = stereo 1 = mono Comments TV & CINCH audio output selection 3 01h CINCH audio gain 1 VCR audio output selection VCR stereo or mono mode 2 1 20/32 STV6414A I²C bus selection Table 21. Reg add (hex) TV and VCR video selection Data Description Bits d7 d6 d5 d4 d3 d2 d1 d0 Y/CVBS muted & chroma muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC Y/CVBS_VCR & R/C_VCR Not allowed Not allowed Not allowed Not allowed Chroma defined by d2d1d0 Chroma force to mute Y/CVBS muted & chroma muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC CVBS_TV & chroma muted Not allowed Not allowed Not allowed Not allowed Chroma defined by d6d5d4 Chroma force to mute Comments TV video output selection 3 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 TV chroma output control 02h 1 X X X X X X X X 0 1 X X X X X X VCR video output selection 3 X X X X X X X X 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X VCR chroma output control 1 0 1 X X X X X X X X X X X X X X 21/32 I²C bus selection STV6414A Table 22. Reg add (hex) RGB and fast blanking outputs Data Description Bits d7 X X X X X X X X X X X X X X 0 RGB and FB control 1 1 X X X X X X X d6 X X X X X X X X X X X X 0 1 X d5 X X X X X X X X 0 0 1 1 X X X d4 X X X X X X X X 0 1 0 1 X X X d3 X X X X 0 0 1 1 X X X X X X X d2 X X X X 0 1 0 1 X X X X X X X d1 0 0 1 1 X X X X X X X X X X X d0 0 1 0 1 X X X X X X X X X X X FB forced to low level FB forced to high level FB from Encoder FB from VCR Muted RGB_ENC selected RGB_VCR selected Not allowed +6 dB gain +5 dB gain +4 dB gain +3 dB gain +0 dB extra gain +3 dB for weak input signals RGB and FB outputs high impedance state RGB and FB outputs active Comments Fast blanking control 2 RGB selection 2 03h RGB gain 2 1 Table 23. Reg add (hex) Miscellaneous control Data Description Bits d7 R/C TV output selection Not used 1 2 X X X X X X X X X X 0 1 d6 X X X X X X X X 0 1 X X d5 X X X X X X 0 1 X X X X d4 X X X 0 0 1 X X X X X X d3 X X X 0 1 X X X X X X X d2 0 0 X 0 0 0 0 0 0 0 0 0 d1 0 0 X 0 0 0 0 0 0 0 0 0 d0 0 1 X X X X X X X X X X Red signal selected Chroma signal selected Not used Grounded Tri-state mode (high impedance) Active LPF enabled LPF disabled Normal mode SLB TV is driven by SLB VCR No iterrupt flag IT enable Comments C_VCR output control 04h Low pass filters control Slow blanking mode 2 1 1 IT enable 1 22/32 STV6414A I²C bus selection Table 24. Reg add (hex) Slow blanking and inputs control Data Description Encoder R/Csub clamp VCR R/Csub clamp Bits d7 1 1 X X X X d6 X X X X d5 X X X X d4 X X X X d3 X X X X d2 X X X X d1 X X 0 1 d0 0 1 X X Bottom level clamp Average level clamp Bottom level clamp Average level clamp 0 dB for normal audio inputs +6 dB for weak audio inputs +9 dB for weak audio inputs Input mode only Output < 2 V Output 16/9 format Output 4/3 format Input mode only Output < 2 V Output 16/9 format Output 4/3 format Comments Encoder input level adjustment 05h 2 X X X X X X X X X X X X 0 0 1 0 1 0 X X X X X X Slow blanking TV SCART 2 X X X X 0 0 1 1 X X X X 0 1 0 1 0 0 1 1 X X X X 0 1 0 1 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X Slow blanking VCR SCART 2 23/32 I²C bus selection STV6414A Table 25. Reg add (hex) Standby modes Data Description Bits d7 ENC inputs VCR inputs TV inputs 1 1 1 1 1 1 1 1 1 1 1 d6 X X X X X X X X d5 X X X X X X X X d4 X X X X X X 0 1 d3 1 1 1 1 1 1 1 1 d2 X X X X 0 1 X X d1 X X 0 1 X X X X d0 0 1 X X X X X X Inputs active Inputs disabled Inputs active Inputs disabled Inputs active Inputs disabled Audio & video outputs ON Audio & video outputs OFF Audio & video outputs ON Audio & video outputs OFF Audio & video outputs ON Audio & video outputs OFF Only I²C bus and slow blanking detection parts are supplied. Comments VCR outputs 06h CINCH outputs 1 1 1 1 X X 0 1 X X 1 1 X X X X X X TV outputs 1 1 1 0 1 X X X X 1 1 X X X X X X Full stop 1 1 1 1 1 1 1 1 Table 26. Reg add (hex) Output signals (read mode) Data Description Bits d7 Slow blanking TV SCART Slow banking VCR SCART 2 X X X X X X X X d6 X X X X X X X X d5 X X X X X X X X d4 X X X X X X 0 1 d3 X X X 0 1 1 X X d2 X X X 1 0 1 X X d1 0 1 1 X X X X X d0 1 0 1 X X X X X Input < 2 V Input 16/9 format Input 4/3 format Input < 2 V Input 16/9 format Input 4/3 format No change since read One change has been detected (refer to Note) Comments 2 Interrupt flag 1 Note: The interrupt flag will be cleared when this register is read. To prepare for a new interrupt, a “1” must be re-written in the IT Enable bit (Reg. 04, d7). 24/32 STV6414A Input/output groups 4 Figure 7. Input/output groups Bottom clamped video inputs (pins Figure 8. 2, 4, 6, 12, 14, 18, 21, 62, and 64) VCC 5 V VCC 5 V Average clamped video inputs (pin 8) VCC 5 V VCC 5 V IB 25 kΩ 25 kΩ 3V 2 V + VD 15 kΩ tri tri Protected pad Protected pad Figure 9. R/C clamped video inputs (pins 10 and 60) Figure 10. Fast blanking output (pin 49) VCCB1 5 V VCC 5 V R/C inputs may be configured either as a bottom clamped input or as an average clamped input. In either case, the simplified input schematic is very close to one of the graphics shown above. Protected pad Figure 11. Fast blanking inputs (pins 50 and 51) Figure 12. Video outputs (pins 36, 38, 40, 42, 44, 46, and 48) VCCB1,2 ...5 5V VCC 5 V VDD 5 V ib tri Protected Pad Protected pad Protected pad 25/32 Input/output groups STV6414A Figure 13. Audio inputs (pins 7, 9 11, 13, 19, 20, 22, and 23) 12 V Figure 14. Audio outputs (pins 27, 28, 29, 30, 32, 33, and 35) I2 V 9 kΩ 2 kΩ 8 kΩ IB 24 kΩ 13 kΩ 24 kΩ 32 kΩ Protected pad VREF Protected pad Figure 15. Slow blanking I/O (pins 59 and 61) Figure 16. Interrupt output (pin 58) VDD 5 V 12 V Float 40 Ω 110 kΩ 55 kΩ Protected pad Protected pad Figure 17. Trap filter (pin 34) VCC 5 V VCCB5 5 V Figure 18. I²C bus (SDA) (Pin 56) VDD 5 V Float 1 kΩ 100 Ω 10 kΩ Protected pad Protected pad 26/32 STV6414A Input/output groups Figure 19. I²C bus (ADD) (pin 54) Figure 20. I²C bus (SCL) (pin 55) VDD 5 V Float VDD 5 V Float 10 kΩ 10 kΩ Protected pad Protected pad Figure 21. Power supply connection VCCB1 VCCB2 VCCB3 VCCB4 VCCB5 VCC VCCA0 VCCA VCC1 VDD 5V 47 45 5V 43 39 37 5V 1 5V 12 V 31 12 V 24 12 V 63 12 V 5V 53 5V 41 5 17 25 57 GNDB GNDV GNDref GNDA GND 27/32 Application diagram STV6414A 5 Note: Application diagram The application diagram presented here is an example only and is subject to change without notice. The real application diagram will depend on application conditions and constraints. Figure 22. STV6414A application diagram STV6414A B 28/32 STV6414A Package mechanical data 6 Package mechanical data Seating plane Figure 23. 64 pin, LQFP64 (low-profile quad flat package) 10 x10 x 1.4 mm Pin 1 identification Gage plane Table 27. Dimension LQFP64 package dimensions Millimeters Minimum Typical Maximum 1.60 0.05 1.35 0.17 0.09 1.40 0.22 0.15 1.45 0.27 0.20 0.08 11.80 9.80 12.00 10.00 7.50 11.0 9.80 12.00 10.00 12.20 10.20 0.464 0.385 12.20 10.20 0.464 0.385 0.472 0.393 0.295 0.472 0.393 0.480 0.401 0.002 0.053 0.006 0.003 0.055 0.008 Minimum Inches Typical Maximum 0.063 0.005 0.057 0.010 0.0078 0.0031 0.48 0.401 A A1 A2 b c ccc D D1 D3 E E1 29/32 Package mechanical data Table 27. Dimension Minimum E3 e Typical 7.50 0.50 0.45 0.60 1.00 0.75 0.017 Maximum Minimum Typical 0.295 0.019 0.023 0.039 STV6414A LQFP64 package dimensions (continued) Millimeters Inches Maximum L L1 0.029 Degrees K 0° minimum 3.5° typical 7° maximum 6.1 Lead-free packaging To meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 30/32 STV6414A Revision history Revision history Table 28. Date 26-Jun-2008 Document revision history Revision 1 Initial release Changes 31/32 STV6414A Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. 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Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2008 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 32/32
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