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STV6436

STV6436

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

  • 描述:

    STV6436 - Filtered Video Buffers for STB and DVD Devices - STMicroelectronics

  • 数据手册
  • 价格&库存
STV6436 数据手册
® STV6436 Filtered Video Buffers for STB and DVD Devices TARGET SPECIFICATION FEATURES s Y, C, CVBS Inputs with 7 MHz Filters s Y, Cr, Cb Inputs with 7 MHz Filters s 6 dB Gains s Capabilities of Integrated Output Buffers: Single Load (150Ω) for Y/Cr/Cb signals Double Load (75Ω) for Y, C and CVBS signals s DC Coupled Outputs for CVBS and YCrCb signals, DC or AC coupled output for Chroma signal s Bottom Clamp on Y and CVBS, Bias Clamp on C, Sync Clamps on Cr and Cb s Crosstalk: 55 dB (typ.) s Separate Stand-by Modes on Y/C/CVBS and on Y/Cr/Cb signals s Switchable Y+C Adder for Decoders without CVBS Outputs SO24 Order Code: STV6436S DESCRIPTION The STV6436 is a filtered video output interface for STB and DVD applications. After removing D/A conversion noises using integrated low pass filters, the STV6436 adapts in amplitude and impedance the video signals coming from the digital decoder for transmission, via 75Ω adapted cables, to the TV set, VCR and auxiliary devices. The STV6436 is powered by a 5V supply. The STV6436 is fully compatible with STi55xx Digital Decoders. The STV6436 is mounted in a SO24 package (STV6436S) or in a DIP package (STV6436D). PDIP20 Order Code: STV6436D September 2003 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/17 STV6436 Table of Contents Chapter 1 1.1 General Information I/O Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 ............................................................................................................. 4 Chapter 2 2.1 2.2 2.3 2.3.1 2.3.2 2.3.3 2.3.4 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Absolute Maximum Ratings ................................................................................................ 6 Thermal Data ...................................................................................................................... 6 Electrical Characteristics ...................................................................................................... 6 Video Section (Y1, Y2 and CVBS Signals) ...........................................................................................................7 Chroma Section ....................................................................................................................................................8 Cb/Cr Section .......................................................................................................................................................9 Mute Section .........................................................................................................................................................9 Chapter 3 Chapter 4 Chapter 5 Input/Output Groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Package Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 2/17 STV6436 General Information 1 General Information Figure 1: STV6436S Pinout CVBS_ENC DEC C_ENC GND Y1_ENC GND GND VCC Y2_ENC CR_ENC MUTE CB_ENC 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCCB3 CVBSOUT VCCB2 COUT GNDB GND GND Y1OUT Y2OUT VCCB1 CROUT CBOUT Figure 2: STV6436D Pinout CVBS_ENC DEC C_ENC GND Y1_ENC VCC Y2_ENC CR_ENC MUTE CB_ENC 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCCB3 CVBSOUT VCCB2 COUT GNDB Y1OUT Y2OUT VCCB1 CROUT CBOUT 3/17 General Information STV6436 1.1 I/O Pin Description Table 1: Pin Description STV6436S STV6436D 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 16 17 18 19 20 6 7 8 9 10 11 12 13 14 15 1 2 3 4 5 Name CVBS_ENC DEC C_ENC GND Y1_ENC GND GND VCC Y2_ENC CR_ENC MUTE CB_ENC CBOUT CROUT VCCB1 Y2OUT Y1OUT GND GND GNDB COUT VCCB2 CVBSOUT VCCB3 Function CVBS Input from Encoder command internal CVBS switch Decoupling Capacitor Chroma Input from Encoder Ground Y Input from Encoder Ground Ground +5 V Supply Large-band Y Input from Encoder Large-band Cr Input from Encoder 4-State command for Mute Large-band Cb Input from Encoder Cb Output Cr Output +5 V Supply for Output Buffers Y2 Output Y1 Output Ground Ground Ground for Buffers Chroma Output +5 V Supply for Output Buffers CVBS Output +5 V Supply for Output Buffers 4/17 STV6436 Figure 3: STV6436 Block Diagram General Information C_ENC 7 MHz Av. Clamp 4th order 7 MHz Bot. Clamp 4th order 6 dB Buffer 6 dB Buffer COUT CVBS_ENC CVBSOUT Y1_ENC 7 MHz Bot. Clamp 4th order 6 dB Buffer Y1OUT Digital Encoder MUTE Mute Y2_ENC Bot. Clamp Sync Extract. 7 MHz 6 dB 4th order 7 MHz Syn. Clamp 4th order 6 dB Buffer Buffer Y2_OUT CR_ENC CR_OUT CB_ENC Syn. Clamp 7 MHz 6 dB 4th order Buffer CB_OUT 5/17 Electrical Characteristics STV6436 2 2.1 Electrical Characteristics Absolute Maximum Ratings Parameter Value 6 -0.6 to VCC ±4 Symbol VCC, VCCB Supply Voltage V VESD Voltage at all pins to Ground ESD Susceptibility Unit V V kV Human Body Model: 100 pF discharged through 1.5 kΩ serial resistor 2.2 Thermal Data Parameter Junction-to-Ambient Thermal Resistance Maximum Recommended Junction Temperature Operating Ambient Temperature Storage Temperature STV6436S STV6436D STV6436S STV6436D Symbol RthJA TJ TOPER TSTG Value 70 65 130 0 to +70 -55 to +150 Unit °C/W °C °C °C 2.3 Electrical Characteristics Test conditions: TAMB = 25°C, VCC = 5 V; VCCB = 5 V; RGENERATOR = 75 Ω, RLOUT = 75 Ω for Y1OUT, CVBSOUT and COUT RLOUT = 150 Ω for Y2OUT, CBOUT and CROUT, unless otherwise specified. Symbol VCC VCCB Parameter Operating Supply Voltage Buffer Supply Voltage Test Conditions Min. 4.75 4.75 Typ. 5.00 5.00 Max. 5.25 5.25 Unit V V Active (Channels ON) ICC1 ICC2 ICC3 Supply Current (VCC + VCCB) Supply Current (VCC + VCCB) Supply Current (VCC + VCCB) No Load, MUTE pin to VCC pin (5 V) All channels active No Load, MUTE pin = 1.5 V (not connected) Y1/C/CVBS active No Load, MUTE pin = 3 V Y2/Cr/Cb active 50 30 30 65 mA mA mA Standby (All Channels OFF) ICCSTB Total Supply Current No Load, MUTE pin to 0 V 4 mA 6/17 STV6436 2.3.1 Video Section (Y1, Y2 and CVBS Signals) Electrical Characteristics Test conditions: TAMB = 25°C, VCC = 5 V; VCCB = 5 V; RGENERATOR = 75 Ω, RLOUT = 75 Ω for Y1 and CVBS outputs and RLOUT = 150 Ω for Y2 output, unless otherwise specified. Symbol VDCIN ICLAMP ILEAK Parameter DC Input Level, Bottom Clamp input Clamping Current, Bottom Clamp input Test Conditions Bottom level, Y1 and CVBS inputs at VDCIN - 400 mV Min. Typ. 2 Max. Unit V mA 1 2 1 2.3 2 10 Input Leakage Current, Bottom Clamp VIN = VDCIN +1 V input Y2 input, YCrCb mode, Black Level µA V pF VDCIN_YSYNC DC Input Level CIN VIN DYN Y1F1 Y2F1 Y1F3 Y2F3 Y1SBR Y2SBR Input Capacitance Maximum Input Signal Dynamic Output Signal VCCV = 5 V VCCV = 5 V 4.0 4.0 4.5 4.5 7 7 - 40 - 40 1.5 3 VPP VPP MHz MHz MHz MHz dB dB -1 dB Bandwidth (Flatness) of Y1 and 1H signal CVBS -1 dB Bandwidth (Flatness) of Y2 -3 dB Bandwidth of Y1 and CVBS -3 dB Bandwidth of Y2 Stopband Rejection Stopband Rejection 1H signal 1H signal 1H signal 27 MHz versus 100 kHz 27 MHz versus 100 kHz VIN = 1 VPP Band = 15 kHz to 5 MHz for Y1, Y2 and CVBS VIN = 0.5 VPP at f = 3.58 MHz, on either CIN_ENC or CRIN_ENC or CBIN_ENC input, RLOAD = 150Ω Flatness Spread of Gain in Video Bands ±0.5 dB VCTo Crosstalk Isolation of Y1 (or Y2 or CVBS) from C and Cr Cb channels 55 dB ROUT GY DCYOUT Output Resistance Gain on Y1, Y2 and CVBS channels DC Output Voltage (Y1 and Y2) VIN = 1 VPP at f = 1 MHz Video signal bottom sync pulse at IC output pins Video signal bottom sync pulse at IC output pin VIN = 1 VPP at f = 3.58 MHz VIN = 1 VPP at f = 3.58 MHz 5.5 5 6 0.5 1.0 0.2 0.3 0.5 NTC-7 weighting 4.2 MHz Lowpass 7 MHz filter 70 20 10 6.5 Ω dB V V DCCVBSOUT DC Output Voltage (CVBS) DPHI DG LNL VSN7 Dtpd7 Differential Phase Differential Gain Luminance non-linearity Video S/N Ratio: Y1, C and CVBS channels (7 MHz filter) Group Delay Variation from Flatness 3 3 3 deg. % % dB nS 7/17 Electrical Characteristics 2.3.2 Chroma Section STV6436 Test conditions: TAMB = 25°C, VCC = 5 V; VCCB = 5 V; RGENERATOR = 75 Ω and RLOUT = 75 Ω unless otherwise specified. Symbol VDCIN RIN CIN VIN DYN DCCOUT CF1 CF3 CSBR Parameter DC Input Level Input Resistance Input Capacitance Max Input Signal Dynamic Output Signal DC Output Voltage (COUT) -1 dB Bandwidth (Flatness) -3 dB Bandwidth Stopband Rejection Test Conditions Min. Typ. 3 Max. Unit V kΩ pF 30 50 2 1 2 VPP VPP V MHz MHz dB Without signal 4 1.5 4.5 7 27 MHz versus 100 kHz VIN = 1 VPP Band = 15 kHz to 5 MHz for Y1 and CVBS VIN = 1 VPP at f = 3.58 MHz, on Y1 or Y2 or CVBS inputs, RLOAD = 150Ω - 40 Flatness Spread of Gain in Video Bands ±0.5 dB CCTo Crosstalk Isolation of C from Y1, Y2 and CVBS Channels Output Resistance Gain on C channel Chroma to Luma Delay, source Y1/C Voltage to be applied at CVBS_ENC input for Y+C adder selection 55 dB Ω dB ns V ROUT GC CToYdel YCadd 5 VIN = 1 VPP at f = 1 MHz VIN = 1 VPP at f = 3.58 MHz VCC 5.5 6 10 6.5 20 VCC 8/17 STV6436 2.3.3 Cb/Cr Section Electrical Characteristics Test conditions: TAMB = 25°C, VCC = 5 V; VCCB = 5 V; RGENERATOR = 75 Ω and RLOUT = 150 Ω, unless otherwise specified. Symbol VDCIN_SYNC ICLAMP_SYN C Parameter DC Input Level Test Conditions Sync clamp input (Cr,Cb) Sync signal on Y input Sync clamp input (Cr,Cb) at VDCIN -400 mV Min. Typ. 3.0 Max. Unit V Clamping Current, Sync clamp Input Capacitance Max Input Signal Dynamic Output Signal DC Output Voltage (Cr and Cb Outputs) -1 dB Bandwidth (Flatness) -3 dB Bandwidth Stopband Rejection Spread of Gain in Video Bands 100 2 1 2 µA pF VPP VPP V MHz MHz dB ±0.5 dB CIN VIN DYN DCCrCbOUT PF1 PF3 PSBR Flatness Black Level sync signal on Y2 input 4.0 1.5 4.5 7 27 MHz versus 100 kHz VIN = 1 VPP Band = 15 kHz to 5 MHz VIN = 1 VPP at f = 3.58 MHz, on Y1 or Y2 or CVBS input, RLOAD = 150Ω - 40 PCTo Crosstalk Isolation of Cr or Cb from Y1, Y2 and CVBS Channels Output Resistance Gain on Cr and Cb channels 55 dB Ω dB ROUT GP 5 VIN = 1 VPP at f = 1 MHz 5.5 6 10 6.5 2.3.4 Mute Section Test conditions: TAMB = 25°C, VCC = 5 V; VCCB = 5 V; RGENERATOR = 75 Ω and RLOUT = 75 Ω unless otherwise specified. Symbol V00 V01 V10 V11 Parameter MUTE Voltage for Y1/C/CVBS muted and Y2/Cr/Cb muted MUTE Voltage for Y1/C/CVBS active and Y2/Cr/Cb muted MUTE Voltage for Y1/C/CVBS muted and Y2/Cr/Cb active MUTE Voltage for Y1/C/CVBS active and Y2/Cr/Cb active Test Conditions Pin MUTE to GND or logical 0 Pin MUTE opened (not connected) See Note 1. Pin MUTE connected by 22 kΩ to VCC or at 3.3V (IIN < 140 µA) Pin MUTE to VCC (5V) Min. 0 1.3 Typ. Max. 1.1 1.7 Unit V V 1.9 4 V 4.2 Vcc V Note: 1 When the MUTE pin is left open, its voltage is defined by an internal voltage divider performed by a 42 kΩ resistor to Vcc and 18 kΩ resistor to GND. 9/17 Input/Output Groups STV6436 3 Input/Output Groups Figure 4: Bottom Clamped Video Input (Y1_ENC) Figure 6: Video Outputs (CVBSOUT, Y1OUT, Y2OUT, CROUT and CBOUT) VCCB VCC 5 V 2V + VBE VCC 5 V VCCB 15 kΩ 10 kΩ Mute Protected Pad GNDB V V REF GNDA Figure 5: Average Clamped Video Input (C_ENC) Figure 7: C Video Output (COUT) VCC 5 V VCC 5 V VCCB VCCB 5 kΩ 25 kΩ Mute 25 kΩ Protected Pad 2.3 V V V VREF GNDA GNDB 10/17 STV6436 Figure 8: Black Level Clamped Video Input (Y2_ENC) Input/Output Groups VCC 5 V VCC 5 V VCC 5 V VCC 5 V 5 kΩ Mute 20 kΩ Protected Pad 11 kΩ Figure 9: Cb/Cr Inputs (CR_ENC and CB_ENC) VCC 5 V V CC 5 V 2V + VBE 15 kΩ Mute Protected Pad 10 kΩ Figure 10: Decoupling Capacitor (DEC) V CC 5 V VCC 5 V 10 kΩ 40 kΩ 12 kΩ 12 kΩ 1 kΩ Protected Pad Mute 1 kΩ 1 kΩ Mute 1 kΩ 11/17 Input/Output Groups Figure 11: Mute (MUTE) STV6436 VCC 5 V VCC 5 V 42 kΩ 18 kΩ V 1.2 V Protected Pad V 1.8 V V 4.1 V Figure 12: CVBS Input (CVBS_ENC) VCC 5 V V CC 5 V 2V + VBE 15 kΩ Mute Protected Pad 10 kΩ V 4.1 V Figure 13: Power Supply Connection Float VCC VCCB3 VCCB2 VCCB1 5V GND 5V GNDB These symbols represent some huge diode and Zener-like components used for ESD protection of the device. They are not supposed to be paths for any current in normal operation mode. 12/17 STV6436 Table 2: Power Supply Connections Supply VCCB1 VCCB2 VCCB3 GNDB VCC GND Input/Output Groups Description Y2OUT, CROUT and CBOUT Supply Y1OUT and COUT Supply CVBSOUT Supply Output Buffer Ground Input Stages, Filters and 6-dB Amplifier Supply Input Stages, Filters and 6-dB Amplifier Ground 13/17 Package Mechanical Data STV6436 4 Package Mechanical Data Figure 14: 20-Pin Plastic Single in Line Package (PDIP20) mm Dim. Min. A A1 A2 b b2 c D e E1 L 6.10 2.92 0.38 2.92 0.36 1.14 0.20 24.89 2.54 6.35 3.30 7.11 3.81 0.240 0.115 3.30 0.46 1.52 0.25 4.95 0.56 1.78 0.36 26.92 Inches Max. 5.33 0.015 0.115 0.014 0.045 0.008 0.980 0.100 0.250 0.130 0.280 0.150 0.130 0.018 0.060 0.010 0.195 0.022 0.070 0.014 1.060 Typ. Min. Typ. Max. 0.210 14/17 STV6436 Package Mechanical Data Figure 15: 24-Pin Plastic Small Outline Package (SO24) D L A A1 a B e C h x 45× E H mm Dim. Min. A A1 B C D E e H h α L 10.00 0.25 0° 0.40 2.35 0.10 0.33 0.23 15.20 7.40 1.27 10.65 0.75 8° 1.27 0.394 0.010 0° 0.016 Inches Max. 2.65 0.30 0.51 0.32 15.60 7.60 Typ. Min. 0.093 0.004 0.013 0.009 0.599 0.291 Typ. Max. 0.104 0.012 0.020 0.013 0.614 0.299 0.050 0.419 0.030 8° 0.050 15/17 Revision History STV6436 5 Revision History Main Changes First Issue. Revision 0.1 Date 21 June 2002 16/17 STV6436 Revision History Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 2003 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. www.st.com 17/17
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