STW12N150K5

STW12N150K5 N-channel 1500 V, 1.6 Ω typ.,7 A MDmesh™ K5 Power MOSFET in a TO-247 package Datasheet - production data Features Order code VDS RDS(on) max. STW12N150K5 1500 V 1.9 Ω      3 2 1 TO-247 ID PTOT 7 A 250 W Industry’s lowest RDS(on) * area Industry’s best figure of merit (FoM) Ultra low gate charge 100% avalanche tested Zener-protected Applications  Figure 1: Internal schematic diagram Switching applications Description This very high voltage N-channel Power MOSFET is designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. Table 1: Device summary Order code Marking Package Packing STW12N150K5 12N150K5 TO-247 Tube July 2015 DocID027833 Rev 3 This is information on a product in full production. 1/13 www.st.com Contents STW12N150K5 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 9 4 Package information ..................................................................... 10 4.1 5 2/13 TO-247 package information ........................................................... 10 Revision history ............................................................................ 12 DocID027833 Rev 3 STW12N150K5 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter VGS Gate-source voltage Value Unit ± 30 V ID Drain current at TC = 25 °C 7 A ID Drain current at TC = 100 °C 4 A (1) IDM Drain current (pulsed) 28 A PTOT Total dissipation at TC = 25 °C 250 W dv/dt (2) Peak diode recovery voltage slope 4.5 V/ns dv/dt (3) MOSFET dv/dt ruggedness 50 V/ns - 55 to 150 °C Tj Operating junction temperature Tstg Storage temperature Notes: (1) Pulse width limited by safe operating area (2) ISD ≤ 7 A, di/dt ≤ 100 A/µs, VPeak ≤ V(BR)DSS (3) VDS ≤ 1200 V Table 3: Thermal data Symbol Parameter Value Unit Rthj-case Thermal resistance junction-case 0.5 °C/W Rthj-amb Thermal resistance junction-amb 50 °C/W Table 4: Avalanche characteristics Symbol Parameter IAR Max current during repetitive or single pulse avalanche EAS Single pulse avalanche energy DocID027833 Rev 3 Value Unit 2 A 900 mJ 3/13 Electrical characteristics 2 STW12N150K5 Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 5: On/off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS = 0 V, ID = 1 mA Min. Typ. Max. 1500 Unit V VGS = 0 V, VDS = 1500 V 1 µA VGS = 0 V, VDS = 1500 V, Tc=125 °C 50 µA Gate body leakage current VDS = 0, VGS = ± 20 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA 4 5 V RDS(on) Static drain-source onresistance VGS = 10 V, ID = 3.5 A 1.6 1.9 Ω Min. Typ. Max. Unit - 1360 - pF - 80 - pF - 0.7 - pF - 82 - pF - 32 - pF IDSS Zero gate voltage drain current IGSS 3 Table 6: Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance (1) Co(tr) Test conditions VGS = 0 V, VDS = 100 V, f = 1MHz Equivalent capacitance time related VDS = 0 V to 1200 V, VGS = 0 V Co(er) Equivalent capacitance energy related RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 3 - Ω VDD = 1200V, ID = 7 A VGS = 10 V (see Figure 16: "Gate charge test circuit") - 47 - nC - 8 - nC - 32 - nC (2) Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Notes: (1) Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. (2) Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS. 4/13 DocID027833 Rev 3 STW12N150K5 Electrical characteristics Table 7: Switching times Symbol td(on) tr Parameter Turn-on delay time Rise time td(off) tf Turn-off delay time Test conditions VDD = 750 V, ID = 3.5 A, RG = 4.7 Ω VGS = 10 V (see Figure 18: "Unclamped inductive load test circuit") Fall time Min. Typ. Max. Unit - 25 - ns - 8 - ns - 90 - ns - 37 - ns Min. Typ. Max. Unit Table 8: Source drain diode Symbol Parameter Test conditions ISD Source-drain current - 7 A ISDM Source-drain current (pulsed) - 28 A ISD = 7 A, VGS = 0 V - 1.5 V ISD = 7 A, VDD = 60 V di/dt = 100 A/µs, (see Figure 17: "Test circuit for inductive load switching and diode recovery times") - 302 ns - 3.71 µC - 24.6 A ISD = 7 A,VDD = 60 V di/dt = 100 A/µs, Tj = 150 °C (see Figure 17: "Test circuit for inductive load switching and diode recovery times") - 432 ns - 4.71 µC - 21.8 A (1) VSD Forward on voltage trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current Notes: (1) Pulsed: pulse duration = 300µs, duty cycle 1.5% Table 9: Gate-source Zener diode Symbol V(BR)GSO Parameter Gate-source breakdown voltage Test conditions IGS = ±1 mA, ID = 0 A Min. 30 Typ. Max. Unit - V The built-in back-to-back Zener diodes have been specifically designed to enhance the ESD capability of the device. The Zener voltage is appropriate for efficient and costeffective intervention to protect the device integrity. These integrated Zener diodes thus eliminate the need for external components. DocID027833 Rev 3 5/13 Electrical characteristics 2.1 STW12N150K5 Electrical characteristics (curves) Figure 3: Thermal impedance Figure 2: Safe operating area GC18460 K δ=0.5 0.2 10 -1 0.1 0.05 0.02 10 -2 0.01 Z th= K*R thj-c δ= t p/Ƭ Single pulse tp 10 6/13 Ƭ -3 10 -5 10 -4 10 -3 10 -2 10 -1 t p (s) Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance DocID027833 Rev 3 STW12N150K5 Electrical characteristics Figure 8: Capacitance variation Figure 9: Output capacitance stored energy Figure 10: Normalized gate threshold voltage vs temperature Figure 11: Normalized on-resistance vs temperature Figure 12: Normalized V(BR)DSS vs temperature Figure 13: Source-drain diode forward characteristics DocID027833 Rev 3 7/13 Electrical characteristics STW12N150K5 Figure 14: Maximum avalanche energy vs TJ 8/13 DocID027833 Rev 3 STW12N150K5 3 Test circuits Test circuits Figure 15: Switching times test circuit for resistive load Figure 16: Gate charge test circuit Figure 17: Test circuit for inductive load switching and diode recovery times Figure 18: Unclamped inductive load test circuit Figure 19: Unclamped inductive waveform Figure 20: Switching time waveform DocID027833 Rev 3 9/13 Package information 4 STW12N150K5 Package information In order to meet environmental requirements, ST offers these devices in different grades of ® ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK is an ST trademark. 4.1 TO-247 package information Figure 21: TO-247 package outline 10/13 DocID027833 Rev 3 STW12N150K5 Package information Table 10: TO-247 package mechanical data mm. Dim. Min. Typ. Max. A 4.85 5.15 A1 2.20 2.60 b 1.0 1.40 b1 2.0 2.40 b2 3.0 3.40 c 0.40 0.80 D 19.85 20.15 E 15.45 15.75 e 5.30 L 14.20 14.80 L1 3.70 4.30 L2 5.45 5.60 18.50 ØP 3.55 ØR 4.50 S 5.30 DocID027833 Rev 3 3.65 5.50 5.50 5.70 11/13 Revision history 5 STW12N150K5 Revision history Table 11: Document revision history 12/13 Date Revision Changes 11-May-2015 1 First release. 30-Jun-2015 2 Updated title and features in cover page. Updated Section 4: "Electrical ratings", Section 5: "Electrical characteristics". Added Section 5.1: "Electrical characteristics (curves)" . Minor text changes. 07-Jul-2015 3 Updated Section 5.1: "Electrical characteristics (curves)". Minor text changes. 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All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved DocID027833 Rev 3 13/13