STW20NK70Z

STW20NK70Z N-CHANNEL 700V - 0.25Ω - 20A TO-247 Zener-Protected SuperMESH™ MOSFET TYPE STW20NK70Z
VDSS RDS(on) ID Pw 700 V < 0.285 Ω 20 A 350 W TYPICAL RDS(on) = 0.25 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED GATE CHARGE MINIMIZED VERY LOW INTRINSIC CAPACITANCES VERY GOOD MANUFACTURING REPEATIBILITY ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O




DESCRIPTION The SuperMESH™ series is obtained through an extreme optimization of ST’s well established stripbased PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmesh™ products. 3 2 1 TO-247 INTERNAL SCHEMATIC DIAGRAM APPLICATIONS
HIGH CURRENT, HIGH SPEED SWITCHING
IDEAL FOR OFF-LINE POWER SUPPLIES ORDER CODES PART NUMBER MARKING PACKAGE PACKAGING STW20NK70Z W20NK70Z TO-247 TUBE April 2004 1/9 STW20NK70Z ABSOLUTE MAXIMUM RATINGS Symbol VDS Parameter VDGR VGS Value Unit Drain-source Voltage (VGS = 0) 700 V Drain-gate Voltage (RGS = 20 kΩ) 700 V Gate- source Voltage ± 30 V ID Drain Current (continuous) at TC = 25°C 20 A ID Drain Current (continuous) at TC = 100°C 12 A Drain Current (pulsed) 80 A IDM () PTOT VESD(G-S) dv/dt (1) Total Dissipation at TC = 25°C 350 W Derating Factor 2.77 W/°C Gate source ESD(HBM-C=100pF, R=1.5KΩ) 6000 Peak Diode Recovery voltage slope Tj Tstg o r P (1) ISD ≤ 20A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX. (*) Limited only by maximum temperature allowed e t e l THERMAL DATA Rthj-case Thermal Resistance Junction-case Max Rthj-amb Tl Thermal Resistance Junction-ambient Max Maximum Lead Temperature For Soldering Purpose Parameter s ( t c Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) o r P ) s ( ct GATE-SOURCE ZENER DIODE ete Symbol ol BVGSO s b O Parameter u d o Gate-Source Breakdown Voltage r P e 0.36 Test Conditions Min. Igs=± 1mA (Open Drain) 30 c u d V/ns °C ) s t( o r P 50 300 e t le o s b O - IAR du o s b O ) AVALANCHE CHARACTERISTICS ct du -55 to 150 () Pulse width limited by safe operating area Symbol V 4.5 Operating Junction Temperature Storage Temperature (s) °C/W °C/W °C Max Value Unit 19 A 300 mJ Typ. Max. Unit V PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. s b O t e l o 2/9 STW20NK70Z ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) ON/OFF Symbol Parameter Test Conditions Min. Typ. Max. Drain-source Breakdown Voltage ID = 1 mA, VGS = 0 IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating VDS = Max Rating, TC = 125 °C 1 50 µA µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 20V ±10 µA VGS(th) Gate Threshold Voltage VDS = VGS, ID = 150 µA RDS(on) Static Drain-source On Resistance VGS = 10V, ID = 10 A V(BR)DSS 700 Unit 3 V 3.75 4.5 V 0.25 0.285 Ω ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O DYNAMIC Symbol gfs (1) Ciss Coss Crss Coss eq. (3) Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions Min. VDS = 15 V, ID = 10 A VDS = 25V, f = 1 MHz, VGS = 0 Typ. Max. Unit 18 S 6000 550 118 pF pF pF Equivalent Output Capacitance VGS = 0V, VDS = 0V to 640V 310 pF td(on) tr td(off) tf Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time VDD = 350 V, ID = 10A RG = 4.7Ω VGS = 10 V (Resistive Load see, Figure 3) 42 33 130 38 ns ns ns ns Qg Qgs Qgd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 560V, ID = 20 A, VGS = 10V 185 38 92 nC nC nC SOURCE DRAIN DIODE Symbol Parameter ISD ISDM (2) Source-drain Current Source-drain Current (pulsed) VSD (1) Forward On Voltage ISD = 20 A, VGS = 0 Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 20 A, di/dt = 100 A/µs VDD = 100 V, Tj = 25°C (see test circuit, Figure 5) 940 16 35 ns µC A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 20 A, di/dt = 100A/µs VDD = 100 V, Tj = 150°C (see test circuit, Figure 5) 772 13 33 ns µC A trr Qrr IRRM trr Qrr IRRM Test Conditions Min. Typ. Max. Unit 20 80 A A 1.6 V Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. 3/9 STW20NK70Z Safe Operating Area Thermal Impedance ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Output Characteristics Transconductance 4/9 Transfer Characteristics Static Drain-source On Resistance STW20NK70Z Gate Charge vs Gate-source Voltage Capacitance Variations ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized BVDSS vs Temperature 5/9 STW20NK70Z Maximum Avalanche Energy vs Temperature ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O 6/9 STW20NK70Z Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 7/9 STW20NK70Z TO-247 MECHANICAL DATA DIM. mm. MIN. TYP inch MAX. MIN. TYP. MAX. A 4.85 5.15 0.19 0.20 A1 2.20 2.60 0.086 0.102 b 1.0 1.40 0.039 0.055 b1 2.0 2.40 0.079 0.094 b2 3.0 3.40 0.118 0.134 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O c 0.40 0.80 0.015 0.03 D 19.85 20.15 0.781 0.793 E 15.45 15.75 0.608 e 5.45 L 14.20 14.80 0.560 L1 3.70 4.30 0.14 L2 18.50 0.582 0.17 0.728 øP 3.55 3.65 0.140 0.143 øR 4.50 5.50 0.177 0.216 S 8/9 0.620 0.214 5.50 0.216 STW20NK70Z ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners © 2004 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com 9/9