STW20NM50

STW20NM50 N-CHANNEL 550V @ Tjmax - 0.20Ω - 20A TO-247 MDmesh™ MOSFET TYPE STW20NM50





VDSS (@Tjmax) RDS(on) ID 550V < 0.25Ω 20 A TYPICAL RDS(on) = 0.20Ω HIGH dv/dt AND AVALANCHE CAPABILITIES 100% AVALANCHE TESTED LOW INPUT CAPACITANCE AND GATE CHARGE LOW GATE INPUT RESISTANCE TIGHT PROCESS CONTROL AND HIGH MANUFACTURING YIELDS DESCRIPTION The MDmesh™ is a new revolutionary MOSFET technology that associates the Multiple Drain process with the Company’s PowerMESH™ horizontal layout. The resulting product has an outstanding low on-resistance, impressively high dv/dt and excellent avalanche characteristics. The adoption of the Company’s proprietary strip technique yields overall dynamic performance that is significantly better than that of similar competition’s products. ) (s ) s ( ct 3 u d o 2 1 TO-247 r P e t e l o s b O INTERNAL SCHEMATIC DIAGRAM t c u d o r APPLICATIONS The MDmesh™ family is very suitable for increasing power density of high voltage converters allowing system miniaturization and higher efficiencies. P e t e l o s b O ABSOLUTE MAXIMUM RATINGS Symbol Value Unit Gate- source Voltage ±30 V ID Drain Current (continuous) at TC = 25°C 20 A ID Drain Current (continuous) at TC = 100°C 12.6 A 80 A VGS IDM () PTOT dv/dt (1) Tstg Tj Parameter Drain Current (pulsed) Total Dissipation at TC = 25°C 214 W Derating Factor 1.44 W/°C 15 V/ns Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature –65 to 150 °C 150 °C (•)Pulse width limited by safe operating area (1) ISD ≤20A, di/dt ≤400A/µs, VDD ≤ V(BR)DSS, Tj ≤ T JMAX. February 2004 1/8 STW20NM50 THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 0.585 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 30 °C/W 300 °C Tl Maximum Lead Temperature For Soldering Purpose AVALANCHE CHARACTERISTICS Symbol Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Parameter 10 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = 5 A, VDD = 35 V) 650 mJ ) s ( ct ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol Parameter Drain-source Breakdown Voltage Test Conditions V(BR)DSS ID = 250 µA, VGS = 0 VDS = Max Rating Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating, TC = 125 °C IGSS Gate-body Leakage Current (VDS = 0) Symbol Parameter )- s b O Test Conditions s ( t c Gate Threshold Voltage VDS = VGS, ID = 250µA RDS(on) Static Drain-source On Resistance o s b Ciss V 1 µA 100 µA ±100 nA Min. Typ. Max. Unit 3 4 5 V 0.20 0.25 Ω Typ. Max. Unit VGS = 10V, ID = 10A r P e Test Conditions Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 let gfs (1) r P e Unit u d o DYNAMIC Symbol Max. u d o t e l o VGS = ±30V VGS(th) Typ. 500 IDSS ON (1) O Min. Parameter Forward Transconductance VDS > ID(on) x RDS(on)max, ID = 10A Min. 10 S 1480 pF Coss Output Capacitance 285 pF Crss Reverse Transfer Capacitance 34 pF Coss eq. (2) RG Equivalent Output Capacitance VGS = 0V, VDS = 0V to 400V 130 pF Gate Input Resistance f=1 MHz Gate DC Bias = 0 Test Signal Level = 20mV Open Drain 1.6 Ω 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. 2/8 STW20NM50 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol Parameter td(on) Test Conditions tr Rise Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge Min. VDD = 250V, ID = 10 A RG = 4.7Ω VGS = 10 V (see test circuit, Figure 3) Turn-on Delay Time VDD = 400 V, ID = 20 A, VGS = 10 V Typ. Max. Unit 24 ns 16 ns 40 56 nC 13 nC 19 nC SWITCHING OFF Symbol Parameter tr(Voff) Test Conditions tf Fall Time tc Cross-over Time Min. VDD = 400 V, ID = 20 A, RG = 4.7Ω, VGS = 10 V (see test circuit, Figure 5) Off-voltage Rise Time 9 23 Parameter ISD e t e l Test Conditions Source-drain Current ISDM (2) Source-drain Current (pulsed) VSD (1) o r P Min. o s b ) s ( t Max. c u d 8.5 SOURCE DRAIN DIODE Symbol Typ. Typ. Unit ns ns ns Max. Unit 20 A 80 A 1.5 V Forward On Voltage ISD = 20 A, VGS = 0 trr Qrr Irrm Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 20 A, di/dt = 100 A/µs, VDD = 100 V, Tj = 25°C (see test circuit, Figure 5) 350 4.6 26 ns µC A trr Qrr Irrm Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 20 A, di/dt = 100 A/µs, VDD = 100 V, Tj = 150°C (see test circuit, Figure 5) 435 5.9 27 ns µC A O ) s ( t c u d o r P e Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. let Safe Operating Area o s b Thermal Impedance O 3/8 STW20NM50 Output Characteristics Transfer Characteristics ) s ( ct u d o r P e Transconductance Static Drain-source On Resistance t e l o ) (s s b O t c u d o r P e t e l o Gate Charge vs Gate-source Voltage s b O 4/8 Capacitance Variations STW20NM50 Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature ) s ( ct u d o r P e Source-drain Diode Forward Characteristics t e l o ) (s s b O t c u d o r P e t e l o s b O 5/8 STW20NM50 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform ) s ( ct u d o r P e Fig. 4: Gate Charge test Circuit Fig. 3: Switching Times Test Circuit For Resistive Load t e l o ) (s t c u d o r P e t e l o Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times s b O 6/8 s b O STW20NM50 TO-247 MECHANICAL DATA DIM. mm. MIN. inch TYP MAX. MIN. TYP. MAX. 0.19 0.20 A 4.85 5.15 D 2.20 2.60 0.08 0.10 E 0.40 0.80 0.015 0.03 F 1 1.40 0.04 0.05 F1 3 0.11 F2 2 0.07 F3 2 2.40 0.07 F4 3 3.40 0.11 G 15.75 0.60 L 19.85 20.15 0.78 L1 3.70 14.20 so 14.80 34.60 L5 5.50 )- 2 s ( t c 5º V 60º V2 e t e ol 0.14 18.50 L4 Dia e t e l 4.30 L2 M u d o 0.43 15.45 L3 0.09 10.90 H du 3.55 b O 3 ) s ( ct Pr 0.13 0.62 0.79 0.17 0.72 0.56 0.58 1.36 0.21 0.07 0.11 5º 60º 3.65 0.14 0.143 o r P s b O 7/8 STW20NM50 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners © 2004 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com 8/8