STW26NM60N

STW26NM60N N-channel 600 V, 0.135 Ω typ., 20 A MDmesh™ II Power MOSFET in a TO-247 package Datasheet - production data Features    3 2 1 Order code VDS RDS(on) max ID STW26NM60N 600 V 0.165 Ω 20 A 100% avalanche tested Low input capacitance and gate charge Low gate input resistance Applications  TO-247 Switching applications Description Figure 1: Internal schematic diagram D(2) This device is an N-channel Power MOSFET developed using the second generation of MDmesh™ technology. This revolutionary Power MOSFET associates a vertical structure to the company’s strip layout to yield one of the world’s lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters. G(1) S(3) AM01475v1_no Tab_noZen Table 1: Device summary Order code Marking Package Packaging STW26NM60N 26NM60N TO-247 Tube December 2016 DocID025246 Rev 2 This is information on a product in full production. 1/12 www.st.com Contents STW26NM60N Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 8 4 Package information ....................................................................... 9 4.1 5 2/12 TO-247 package information ............................................................. 9 Revision history ............................................................................ 11 DocID025246 Rev 2 STW26NM60N 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 600 V VGS Gate-source voltage ±30 V ID Drain current (continuous) at TC = 25 °C 20 A ID Drain current (continuous) at TC = 100 °C 12.6 A Drain current (pulsed) 80 A Total dissipation at TC = 25 °C 140 W Peak diode recovery voltage slope 15 V/ns -55 to 150 °C Value Unit 0.89 °C/W 50 °C/W Value Unit 6 A 610 mJ IDM (1) PTOT (2) dv/dt Tstg Tj Storage temperature range Operating junction temperature range Notes: (1)Pulse (2)I SD width limited by safe operating area. ≤ 20 A, di/dt ≤ 400 A/µs, VDS(peak) ≤ V(BR)DSS, VDD ≤ 80% V(BR)DSS Table 3: Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case Rthj-amb Thermal resistance junction-ambient Table 4: Avalanche characteristics Symbol Parameter IAS Single pulse avalanche current (pulse width limited by Tjmax) EAS Single pulse avalanche energy (starting TJ=25 °C, ID=IAS, VDD=50 V) DocID025246 Rev 2 3/12 Electrical characteristics 2 STW26NM60N Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 5: On/off states Symbol Parameter V(BR)DSS Drain-source breakdown voltage Test conditions ID = 1 mA, VGS = 0 V Min. Typ. Max. 600 Unit V VGS = 0 V, VDS = 600 V 1 VGS = 0 V, VDS = 600 V, TC= 125 °C (1) 100 Gate-body leakage current VDS = 0 V, VGS = ±25 V ±0.1 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 3 4 V RDS(on) Static drain-source onresistance VGS = 10 V, ID = 10 A 0.135 0.165 Ω Min. Typ. Max. Unit - 1800 - pF - 115 - pF - 6 - pF VGS = 0 V, VDS = 0 to 480 V - 310 - pF - 60 - nC - 8.5 - nC - 30 - nC - 2.8 - Ω IDSS Zero gate voltage drain current IGSS 2 µA Notes: (1)Defined by design, not subject to production test. Table 6: Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Coss eq. (1) Equivalent output capacitance Test conditions VDS = 50 V, f = 1 MHz, VGS = 0 V Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge VDD = 480 V, ID = 20 A, VGS = 10 V (see Figure 14: "Test circuit for gate charge behavior") RG Gate input resistance f=1 MHz, ID=0 A Notes: (1)C oss eq. is defined as a constant equivalent capacitance giving the same charging time as C oss when VDS increases from 0 to 80% VDS Table 7: Switching times Symbol td(on) tr td(off) tf 4/12 Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions Min. Typ. Max. Unit VDD = 300 V, ID = 10 A, RG = 4.7 Ω, VGS = 10 V (see Figure 13: "Test circuit for resistive load switching times" and Figure 18: "Switching time waveform") - 13 - ns - 25 - ns - 85 - ns - 50 - ns DocID025246 Rev 2 STW26NM60N Electrical characteristics Table 8: Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current - 20 A ISDM(1) Source-drain current (pulsed) - 80 A VSD(2) Forward on voltage ISD = 20 A, VGS = 0 V - 1.5 V trr Reverse recovery time - 370 ns Qrr Reverse recovery charge - 5.8 µC IRRM Reverse recovery current ISD = 20 A, di/dt = 100 A/µs VDD = 60 V (see Figure 15: "Test circuit for inductive load switching and diode recovery times") - 31.6 A ISD = 20 A, di/dt = 100 A/µs VDD = 60 V, Tj = 150 °C (see Figure 15: "Test circuit for inductive load switching and diode recovery times" ) - 450 ns - 7.5 µC - 32.5 A trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current Notes: (1)Pulse (2) width limited by safe operating area. Pulsed: pulse duration = 300 µs, duty cycle 1.5% DocID025246 Rev 2 5/12 Electrical characteristics 2.1 STW26NM60N Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Static drain-source on-resistance Figure 7: Gate charge vs gate-source voltage W 6/12 DocID025246 Rev 2 STW26NM60N Electrical characteristics Figure 8: Capacitance variations Figure 9: Normalized gate threshold voltage vs temperature Figure 10: Normalized on-resistance vs temperature Figure 11: Source-drain diode forward characteristics Figure 12: Normalized V(BR)DSS vs temperature DocID025246 Rev 2 7/12 Test circuits 3 8/12 STW26NM60N Test circuits Figure 13: Test circuit for resistive load switching times Figure 14: Test circuit for gate charge behavior Figure 15: Test circuit for inductive load switching and diode recovery times Figure 16: Unclamped inductive load test circuit Figure 17: Unclamped inductive waveform Figure 18: Switching time waveform DocID025246 Rev 2 STW26NM60N 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 TO-247 package information Figure 19: TO-247 package outline 0075325_8 DocID025246 Rev 2 9/12 Package information STW26NM60N Table 9: TO-247 package mechanical data mm Dim. Min. Max. A 4.85 5.15 A1 2.20 2.60 b 1.0 1.40 b1 2.0 2.40 b2 3.0 3.40 c 0.40 0.80 D 19.85 20.15 E 15.45 15.75 e 5.30 L 14.20 14.80 L1 3.70 4.30 L2 10/12 Typ. 5.45 5.60 18.50 ØP 3.55 ØR 4.50 S 5.30 DocID025246 Rev 2 3.65 5.50 5.50 5.70 STW26NM60N 5 Revision history Revision history Table 10: Document revision history Date Revision 07-Jul-2016 1 First release. 2 Modified Table 6: "Dynamic" and Table 8: "Source-drain diode" Modified Section 2.1: "Electrical characteristics (curves)" Minor text changes 12-Dec-2016 Changes DocID025246 Rev 2 11/12 STW26NM60N IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved 12/12 DocID025246 Rev 2