STW30N80K5

STW30N80K5 N-channel 800 V, 0.15 Ω typ., 24 A, MDmesh™ K5 Power MOSFET in a TO-247 package Datasheet - production data Features table Order code VDS RDS(on) max. ID STW30N80K5 800 V 0.18 Ω 24 A Features      3 2 1 TO-247 Figure 1: Internal schematic diagram Industry’s lowest RDS(on) x area Industry’s best FoM (figure of merit) Ultra-low gate charge 100% avalanche tested Zener-protected Applications  Switching applications Description This very high voltage N-channel Power MOSFET is designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. Table 1: Device summary Order code Marking Package Packing STW30N80K5 30N80K5 TO-247 Tube March 2016 DocID028638 Rev 2 This is information on a product in full production. 1/13 www.st.com Contents STW30N80K5 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 9 4 Package information ..................................................................... 10 4.1 5 2/13 TO-247 package information ........................................................... 10 Revision history ............................................................................ 12 DocID028638 Rev 2 STW30N80K5 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 800 V VGS Gate-source voltage ± 30 V ID Drain current (continuous) at TC = 25 °C 24 A ID Drain current (continuous) at TC = 100 °C 15 A IDM(1) Drain current (pulsed) 96 A PTOT Total dissipation at TC = 25 °C 250 W Peak diode recovery voltage slope 4.5 MOSFET dv/dt ruggedness 50 dv/dt(2) dv/dt (3) Tstg Tj Storage temperature range Operating junction temperature range V/ns - 55 to 150 °C Notes: (1)Pulse (2)I SD< (3)V width limited by safe operating area 24 A, di/dt < 100 A/µs, VDSpeak < V (BR)DSS, VDD= 80% V(BR)DSS DS= 640 V Table 3: Thermal data Symbol Parameter Value Unit Rthj-case Thermal resistance junction-case 0.5 °C/W Rthj-amb Thermal resistance junction-ambient 50 °C/W Table 4: Avalanche characteristics Symbol Parameter IAR Avalanche current, repetitive or not repetitive (pulse width limited by Tjmax.) EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) DocID028638 Rev 2 Value Unit 8 A 440 mJ 3/13 Electrical characteristics 2 STW30N80K5 Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 5: On/off states Symbol Parameter V(BR)DSS Drain-source breakdown voltage Test conditions ID = 1 mA, VGS= 0 V Min. Typ. Max. 800 Unit V VGS= 0 V, VDS = 800 V 1 µA VGS= 0 V, VDS = 800 V, TC= 125 °C(1) 50 µA Gate source leakage current VDS= 0 V, VGS = ± 20 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA 4 5 V RDS(on) Static drain-source onresistance VGS = 10 V, ID = 12 A 0.15 0.18 Ω Min. Typ. Max. Unit - 1530 - pF - 145 - pF - 1.2 - pF - 91 - pF - 244 - pF - 43 - nC IDSS IGSS Zero gate voltage drain current 3 Notes: (1)Defined by design, not subject to production test Table 6: Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Test conditions VDS = 100 V, f = 1 MHz, VGS= 0 V Co(er)(1) Equivalent capacitance energy related Co(tr)(2) Equivalent capacitance time related VGS = 0 V, VDS = 0 to 640 V Qg Total gate charge Qgs Gate-source charge VDD = 640 V, ID = 24 A, VGS = 10 V - 12.8 - nC Qgd Gate-drain charge (See Figure 16: "Test circuit for gate charge behavior") - 24.2 - nC Rg Gate input resistance f =1 MHz, ID= 0 A - 3.5 - Ω Notes: (1)Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS (2)Time related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS 4/13 DocID028638 Rev 2 STW30N80K5 Electrical characteristics Table 7: Switching times Symbol td(on) Parameter tr Turn-on delay time Rise time td(off) Turn-off delay time Fall time tf Test conditions VDS = 400 V, ID= 12 A, RG = 4.7 Ω VGS = 10 V (See Figure 15: "Test circuit for resistive load switching times" and Figure 20: "Switching time waveform") Min. Typ. Max. Unit - 21 - ns - 15 - ns - 100 - ns - 13.5 - ns Min. Typ. Max. Unit Table 8: Source-drain diode Symbol Parameter Test conditions Source-drain current - 24 A ISDM(1) Source-drain current (pulsed) - 96 A VSD(2) Forward on voltage ISD= 24 A, VGS = 0 V - 1.5 V ISD = 24 A, di/dt = 100 A/µs VDD = 60 V (See Figure 17: "Test circuit for inductive load switching and diode recovery times") - 555 ns - 9.95 µC - 36 A ISD = 24 A, di/dt = 100 A/µs VDD = 60 V, Tj = 150 °C (See Figure 17: "Test circuit for inductive load switching and diode recovery times") - 765 ns - 13.2 µC - 34.5 A ISD trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current Notes: (1)Pulse width limited by safe operating area. (2)Pulsed: pulse duration = 300 µs, duty cycle 1.5%. Table 9: Gate-source Zener diode Symbol V(BR)GSO Parameter Gate-source breakdown voltage Test conditions IGS= ±1 mA, ID = 0 A Min. Typ. Max. Unit 30 - - V The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry. DocID028638 Rev 2 5/13 Electrical characteristics 2.1 STW30N80K5 Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance K GC18460_ZTH δ=0.5 δ=0.2 0.1 10 -1 0.05 0.02 10 -2 10 6/13 0.01 Single pulse -3 10-5 10-4 10-3 10 -2 10 -1 tp(s) Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance DocID028638 Rev 2 STW30N80K5 Electrical characteristics Figure 8: Capacitance variations Figure 9: Normalized gate threshold voltage vs temperature Figure 10: Normalized on-resistance vs temperature Figure 11: Normalized V(BR)DSS vs temperature Figure 12: Maximum avalanche energy vs starting TJ Figure 13: Source-drain diode forward characteristics DocID028638 Rev 2 7/13 Electrical characteristics STW30N80K5 Figure 14: Output capacitance stored energy 8/13 DocID028638 Rev 2 STW30N80K5 3 Test circuits Test circuits Figure 15: Test circuit for resistive load switching times Figure 16: Test circuit for gate charge behavior Figure 17: Test circuit for inductive load switching and diode recovery times Figure 18: Unclamped inductive load test circuit Figure 19: Unclamped inductive waveform Figure 20: Switching time waveform DocID028638 Rev 2 9/13 Package information 4 STW30N80K5 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 TO-247 package information Figure 21: TO-247 package outline 10/13 DocID028638 Rev 2 STW30N80K5 Package information Table 10: TO-247 package mechanical data mm. Dim. Min. Typ. Max. A 4.85 5.15 A1 2.20 2.60 b 1.0 1.40 b1 2.0 2.40 b2 3.0 3.40 c 0.40 0.80 D 19.85 20.15 E 15.45 15.75 e 5.30 L 14.20 14.80 L1 3.70 4.30 L2 5.45 5.60 18.50 ØP 3.55 ØR 4.50 S 5.30 DocID028638 Rev 2 3.65 5.50 5.50 5.70 11/13 Revision history 5 STW30N80K5 Revision history Table 11: Document revision history 12/13 Date Revision Changes 03-Dec-2015 1 First release. 21-Mar-2016 2 Document status promoted from preliminary to production data. Minor text changes. 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All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved DocID028638 Rev 2 13/13