STW48N60M2
Datasheet
N-channel 600 V, 60 mΩ typ., 42 A MDmesh M2 Power MOSFET
in a TO-247 package
Features
2
1
3
TO-247
Order code
V DS @ TJmax.
RDS(on) max.
ID
STW48N60M2
650 V
70 mΩ
42 A
•
•
Extremely low gate charge
Excellent output capacitance (COSS) profile
•
•
100% avalanche tested
Zener-protected
Applications
D(2, TAB)
•
G(1)
Switching applications
Description
S(3)
AM01475V1
This device is an N-channel Power MOSFET developed using MDmesh M2
technology. Thanks to its strip layout and an improved vertical structure, the device
exhibits low on-resistance and optimized switching characteristics, rendering it
suitable for the most demanding high efficiency converters.
Product status
STW48N60M2
Device summary
Order code
STW48N60M2
Marking
48N60M2
Package
TO-247
Packing
Tube
DS10379 - Rev 4 - March 2020
For further information contact your local STMicroelectronics sales office.
www.st.com
STW48N60M2
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
Value
Unit
Gate-source voltage
±25
V
ID
Drain current (continuous) at TC = 25 °C
42
A
ID
Drain current (continuous) at TC = 100 °C
26
A
Drain current (pulsed)
168
A
Total power dissipation at TC = 25 °C
300
W
Peak diode recovery voltage slope
15
V/ns
MOSFET dv/dt ruggedness
50
V/ns
- 55 to 150
°C
Value
Unit
0.42
°C/W
50
°C/W
Value
Unit
7
A
1
J
VGS
IDM
(1)
PTOT
dv/dt (2)
dv/dt
(3)
Tstg
Tj
Parameter
Storage temperature range
Operating junction temperature range
1. Pulse width limited by safe operating area.
2. ISD ≤ 42 A, di/dt ≤ 400 A/µs; VDS(peak) < V(BR)DSS, VDD = 400 V
3. VDS ≤ 480 V
Table 2. Thermal data
Symbol
Parameter
Rthj-case Thermal resistance junction-case
Rthj-amb Thermal resistance junction-ambient
Table 3. Avalanche characteristics
Symbol
IAR
EAS
DS10379 - Rev 4
Parameter
Avalanche current, repetitive or not repetitive
(pulse width limited by Tjmax.)
Single pulse avalanche energy
(starting Tj = 25 °C, ID = IAR; VDD = 50 V)
page 2/12
STW48N60M2
Electrical characteristics
2
Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 4. On /off-states
Symbol
V(BR)DSS
IDSS
IGSS
VGS(th)
RDS(on)
Parameter
Test conditions
Drain-source
breakdown voltage
VGS = 0 V, ID = 1 mA
Zero-gate voltage
VGS = 0 V, VDS= 600 V
drain current
Gate-body leakage
current
Gate threshold
voltage
Static drain-source
on-resistance
VGS = 0 V, VDS = 600 V, TC = 125
Min.
Typ.
Max.
600
V
1
µA
100
µA
±10
µA
3
4
V
60
70
mΩ
Min.
Typ.
Max.
Unit
-
3060
-
pF
-
143
-
pF
-
4.3
-
pF
°C(1)
VDS = 0 V, VGS = ±25 V
VDS = VGS, ID = 250 µA
Unit
2
VGS = 10 V, ID = 21 A
1. Defined by design, not subject to production test.
Table 5. Dynamic
Symbol
Parameter
Test conditions
Ciss
Input capacitance
Coss
Output capacitance
Crss
Reverse transfer
capacitance
C oss eq. (1)
Equivalent output
capacitance
VGS = 0 V, VDS = 0 to 480 V
-
630
-
pF
RG
Intrinsic gate
resistance
f = 1 MHz, ID = 0 A
-
4.6
-
Ω
Qg
Total gate charge
VDD = 480 V, ID = 42 A,
-
70
-
nC
Gate-source charge
VGS = 0 to 10 V
-
10.5
-
nC
Gate-drain charge
(see Figure 14. Test circuit for gate charge
behavior )
-
31
-
nC
Qgs
Qgd
VGS = 0 V, VDS = 100 V, f = 1 MHz
1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0
to 80% VDSS.
Table 6. Switching times
Symbol
td (on)
tr
td(off)
tf
DS10379 - Rev 4
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Turn-on delay time
VDD = 300 V, ID = 21 A,
-
18.5
-
ns
Rise time
RG = 4.7 Ω, VGS = 10 V
-
17
-
ns
Turn-off delay time
(see Figure 13. Test circuit for resistive load
switching times and Figure 18. Switching time
waveform)
-
119
-
ns
-
13
-
ns
Fall time
page 3/12
STW48N60M2
Electrical characteristics
Table 7. Source-drain diode
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
ISD
Source-drain current
-
42
A
ISDM (1)
Source-drain current
(pulsed)
-
168
A
VSD (2)
Forward on voltage
VGS = 0 V, ISD = 21 A
-
1.6
V
trr
Reverse recovery
time
ISD = 42 A, di/dt = 100 A/µs
Qrr
Reverse recovery
charge
IRRM
Reverse recovery
current
trr
Reverse recovery
time
Qrr
Reverse recovery
charge
IRRM
Reverse recovery
current
VDD = 60 V (see Figure 15. Test circuit for
inductive load switching and diode recovery
times)
ISD = 42 A, di/dt = 100 A/µs
VDD = 60 V, Tj = 150 °C
(see Figure 15. Test circuit for inductive load
switching and diode recovery times)
-
487
ns
-
9.1
µC
-
37.5
A
-
605
ns
-
12.5
µC
-
41.5
A
1. Pulse width limited by safe operating area.
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%.
DS10379 - Rev 4
page 4/12
STW48N60M2
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 2. Thermal impedance
Figure 1. Safe operating area
ID
(A)
GADG190120170828SOA
TO247EZx8
t p = 10 µs
10 2 Operation in this
area is limited by
max. R DS(on)
10 -1
Zth=k*Rthj-c
t p = 100 µs
10 1
t p = 1 ms
10
K
0
t p = 10 ms
Single pulse
Tc = 25 °C
T j = ≤150 °C
VGS= 10 V
10 -1
10 -1
10 0
10 1
V DS (V)
10 2
Figure 3. Output characteristics
ID
(A)
10 -4
10 -3
10 -2
tp (s)
10 -1
Figure 4. Transfer characteristics
GADG190120170825TCH
120
7V
100
10 -3
10 -5
ID
(A)
GADG190120170825OCH
VGS = 8, 9, 10 V
120
10 -2
VDS =21 V
100
6V
80
80
60
60
5V
40
40
20
20
0
0
4
8
12
4V
20
16
VDS (V)
Figure 5. Gate charge vs gate-source voltage
VGS
(V)
GADG190120170826QVG VDS
(V)
10 VDS
8
500
0
0
2
4
6
8
VGS (V)
Figure 6. Static drain-source on-resistance
RDS(on)
(mΩ)
GADG190120170822RID
VGS =10 V
64
400
VDD = 480 V
ID = 42 A
62
6
300
4
200
2
100
60
0
0
DS10379 - Rev 4
10
20
30
40
50
60
70
0
Qg (nC)
58
56
0
10
20
30
40
I D (A)
page 5/12
STW48N60M2
Electrical characteristics (curves)
Figure 7. Capacitance variations
C
(pF)
Figure 8. Output capacitance stored energy
E OSS
(µJ)
GADG190120170824CVR
GADG190120170827EOS
20
10 4
CISS
16
10 3
12
10
COSS
2
8
10 1
10 0
10 -1
f=1 MHz
10 0
10 1
10 2
CRSS
4
V DS (V)
0
0
Figure 9. Normalized gate threshold voltage vs
temperature
VGS(th)
(norm.)
GADG190120171204VTH
300
400
500
600
V DS (V)
R DS(on)
(nrm.)
GADG190120170818RON
VGS = 10 V
ID = 21 A
2.0
1.0
1.5
0.9
1.0
0.8
0.5
0.7
0.6
-75
200
Figure 10. Normalized on-resistance vs temperature
2.5
I D = 250 µA
1.1
100
-25
25
75
125
T j (°C)
Figure 11. Normalized V(BR)DSS vs temperature
V (BR)DSS
(norm.)
GADG190120170823BDV
-25
25
75
125
T j (°C)
Figure 12. Source-drain diode forward characteristics
V SD
(V)
GADG190120170823SDF
1.1
I D = 1 mA
1.10
0.0
-75
T j = -50 °C
1.0
1.05
T j = 25 °C
0.9
1.00
0.8
0.95
0.90
0.85
-75
DS10379 - Rev 4
T j = 150 °C
0.7
0.6
-25
25
75
125
T j (°C)
0.5
0
10
20
30
40
I SD (A)
page 6/12
STW48N60M2
Test circuits
3
Test circuits
Figure 13. Test circuit for resistive load switching times
Figure 14. Test circuit for gate charge behavior
VDD
12 V
2200
+ μF
3.3
μF
VDD
VD
VGS
1 kΩ
100 nF
RL
IG= CONST
VGS
RG
47 kΩ
+
pulse width
D.U.T.
2.7 kΩ
2200
μF
pulse width
D.U.T.
100 Ω
VG
47 kΩ
1 kΩ
AM01469v1
AM01468v1
Figure 15. Test circuit for inductive load switching and
diode recovery times
D
G
A
D.U.T.
S
25 Ω
A
L
A
B
B
3.3
µF
D
G
+
VD
100 µH
fast
diode
B
Figure 16. Unclamped inductive load test circuit
RG
1000
+ µF
2200
+ µF
VDD
3.3
µF
VDD
ID
D.U.T.
S
D.U.T.
Vi
_
pulse width
AM01471v1
AM01470v1
Figure 18. Switching time waveform
Figure 17. Unclamped inductive waveform
ton
V(BR)DSS
td(on)
VD
toff
td(off)
tr
tf
90%
90%
IDM
VDD
10%
0
ID
VDD
AM01472v1
VGS
0
VDS
10%
90%
10%
AM01473v1
DS10379 - Rev 4
page 7/12
STW48N60M2
Package information
4
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.
4.1
TO-247 package information
Figure 19. TO-247 package outline
0075325_9
DS10379 - Rev 4
page 8/12
STW48N60M2
TO-247 package information
Table 8. TO-247 package mechanical data
Dim.
mm
Min.
Max.
A
4.85
5.15
A1
2.20
2.60
b
1.0
1.40
b1
2.0
2.40
b2
3.0
3.40
c
0.40
0.80
D
19.85
20.15
E
15.45
15.75
e
5.30
L
14.20
14.80
L1
3.70
4.30
L2
DS10379 - Rev 4
Typ.
5.45
5.60
18.50
ØP
3.55
3.65
ØR
4.50
5.50
S
5.30
5.50
5.70
page 9/12
STW48N60M2
Revision history
Table 9. Document revision history
Date
Revision
09-Jun-2014
1
Changes
First release.
Document status promoted from preliminary to production data.
01-Sep-2014
2
Added Section 2.1: "Electrical characteristics curves".
Minor text changes.
Updated Table 1. Absolute maximum ratings, Table 3. Avalanche characteristics,
19-Jan-2017
3
Table 4. On /off-states and Table 6. Switching times.
Updated Section 2.1 Electrical characteristics (curves).
19-Mar-2020
DS10379 - Rev 4
4
Updated Table 6. Switching times.
Minor text changes.
page 10/12
STW48N60M2
Contents
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4
Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1
TO-247 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
DS10379 - Rev 4
page 11/12
STW48N60M2
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service
names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2020 STMicroelectronics – All rights reserved
DS10379 - Rev 4
page 12/12