STW50N65DM2AG

STW50N65DM2AG Datasheet Automotive-grade N-channel 650 V, 70 mΩ typ., 38 A Power MOSFET MDmesh DM2 in a TO-247 package Features 1 2 3 TO-247 D(2, TAB) • • • • • • • Order code VDS RDS(on) max. ID STW50N65DM2AG 650 V 87 mΩ 38 A AEC-Q101 qualified Fast-recovery body diode Extremely low gate charge and input capacitance Low on-resistance 100% avalanche tested Extremely high dv/dt ruggedness Zener-protected Applications G(1) • Switching applications Description S(3) NG1D2TS3Z This high-voltage N-channel Power MOSFET is part of the MDmesh DM2 fastrecovery diode series. It offers very low recovery charge (Qrr) and time (trr) combined with low RDS(on), rendering it suitable for the most demanding high-efficiency converters and ideal for bridge topologies and ZVS phase-shift converters. Product status link STW50N65DM2AG Product summary(1) Order code STW50N65DM2AG Marking 50N65DM2 Package TO-247 Packing Tube 1. The HTRB test was performed at 80% V(BR)DSS in compliance with AEC-Q101 rev. C. All the other tests were performed according to rev. D. DS11149 - Rev 3 - August 2020 For further information contact your local STMicroelectronics sales office. www.st.com STW50N65DM2AG Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit Gate-source voltage (static) ±25 Gate-source voltage (dynamic AC (f > 1 Hz)) ±30 Drain current (continuous) at TC = 25 °C 38 Drain current (continuous) at TC = 100 °C 24 IDM (1) Drain current (pulsed) 152 A PTOT Total power dissipation at TC = 25 °C 300 W dv/dt(2) Peak diode recovery voltage slope 100 V/ns di/dt(2) Peak diode recovery current slope 1000 A/μs dv/dt(3) MOSFET dv/dt ruggedness 100 V/ns -55 to 150 °C Value Unit 0.42 °C/W 50 °C/W Value Unit Avalanche current, repetitive or not repetitive 7.5 A Single pulse avalanche energy 850 mJ VGS ID Tstg TJ Storage temperature Operating junction temperature V A 1. Pulse width is limited by safe operating area. 2. ISD ≤ 38 A, VDS peak < V(BR)DSS, VDD = 80% V(BR)DSS. 3. VDS ≤ 520 V. Table 2. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case Rthj-amb Thermal resistance junction-ambient Table 3. Avalanche characteristics Symbol IAR EAS (1) Parameter 1. Starting TJ = 25 °C, ID = IAR, VDD = 50 V. DS11149 - Rev 3 page 2/12 STW50N65DM2AG Electrical characteristics 2 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 4. Static Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage Min. VGS = 0 V, ID = 1 mA Typ. 650 Zero gate voltage drain current IGSS Gate-body leakage current VDS = 0 V, VGS = ±25 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 19 A VGS = 0 V, VDS = 650 V, TC = 125 Unit V VGS = 0 V, VDS = 650 V IDSS Max. 10 °C(1) 100 µA ±5 µA 4 5 V 70 87 mΩ Min. Typ. Max. Unit - 3200 - pF - 130 - pF - 3 - pF 3 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Test conditions VDS = 100 V, f = 1 MHz, VGS = 0 V Reverse transfer capacitance (1) Equivalent output capacitance VDS = 0 to 520 V, VGS = 0 V - 256 - pF RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 4 - Ω Qg Total gate charge - 69 - nC Qgs Gate-source charge - 18 - nC Qgd Gate-drain charge - 34 - nC Coss eq. VDD = 520 V, ID = 38 A, VGS = 0 to 10 V (see Figure 14. Test circuit for gate charge behavior) 1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. Table 6. Switching times Symbol td(on) tr td(off) tf DS11149 - Rev 3 Parameter Test conditions Min. Typ. Max. Unit Turn-on delay time VDD = 325 V, ID = 19 A, - 22.5 - ns Rise time RG = 4.7 Ω, VGS = 10 V - 21 - ns Turn-off delay time (see Figure 13. Test circuit for resistive load switching times and Figure 18. Switching time waveform) - 89 - ns - 10.5 - ns Fall time page 3/12 STW50N65DM2AG Electrical characteristics Table 7. Source-drain diode Symbol ISD Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 38 A ISDM (1) Source-drain current (pulsed) - 152 A VSD (2) Forward on voltage VGS = 0 V, ISD = 38 A - 1.6 V trr Reverse recovery time ISD = 38 A, di/dt = 100 A/µs, - 150 ns Qrr Reverse recovery charge VDD = 60 V - 0.96 µC Reverse recovery current (see Figure 15. Test circuit for inductive load switching and diode recovery times) - 12.8 A trr Reverse recovery time ISD = 38 A, di/dt = 100 A/µs, - 245 ns Qrr Reverse recovery charge VDD = 60 V, TJ = 150 °C - 2.7 µC IRRM Reverse recovery current (see Figure 15. Test circuit for inductive load switching and diode recovery times) - 22 A IRRM 1. Pulse width is limited by safe operating area. 2. Pulse test: pulse duration = 300 µs, duty cycle 1.5%. DS11149 - Rev 3 page 4/12 STW50N65DM2AG Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 2. Thermal impedance Figure 1. Safe operating area ID (A) K GIPG090715FQFIWSOA 10 2 TO247EZx8 10 µs 10 0 10 -1 10 -1 10 0 S( on ) Zth=k*Rthj-c 100 µs D 10 1 O lim per ite atio d by n in m th ax is . R ar e a is 10 -1 1 ms 10 ms T j = 150 °C T c = 25 °C single pulse 10 1 10 2 V DS (V) 10 -2 10 -3 10 -5 Figure 3. Output characteristics ID (A) 10 -2 ID (A) GIPG090715FQFIWOCH 10 -1 tp (s) GIPG090715FQFIWTCH V DS = 15 V 100 V GS = 8 V 80 80 V GS = 7 V 60 60 40 40 V GS = 6 V 20 0 0 4 8 12 16 20 V DS (V) Figure 5. Gate charge vs gate-source voltage V GS (V) 12 10 -3 Figure 4. Transfer characteristics V GS = 9,10 V 100 10 -4 GIPG090715FQFIWQVG V DS (V) V DD = 520V I D = 38 A V DS 600 0 3 4 5 6 7 8 9 V GS (V) Figure 6. Static drain-source on-resistance R DS(on) (Ω) GIPG090715FQFIWRID V GS = 10 V 0.085 10 500 8 400 6 300 4 200 2 100 0.065 0 Q g (nC) 0.060 0 0.080 0.075 0 0 DS11149 - Rev 3 10 20 30 40 50 60 70 0.070 5 10 15 20 25 30 35 I D (A) page 5/12 STW50N65DM2AG Electrical characteristics (curves) Figure 8. Normalized gate threshold voltage vs temperature Figure 7. Capacitance variations C (pF) GIPG090715FQFIWCVR V GS(th) (norm.) 10 4 GIPG090715FQFIWVTH I D = 250 µA 1.1 C ISS 1.0 10 3 0.9 C OSS 10 2 0.8 10 1 C RSS f = 1 MHz 10 10 -1 0 10 0 10 1 V DS (V) 10 2 Figure 9. Normalized on-resistance vs temperature R DS(on) (norm.) GIPG090715FQFIWRON V GS = 10 V 2.2 0.7 0.6 -75 -25 25 75 125 T j (°C) Figure 10. Normalized V(BR)DSS vs temperature V (BR)DSS (norm.) GIPG090715FQFIWBDV I D = 1 mA 1.12 1.08 1.8 1.04 1.4 1.00 1.0 0.96 0.6 0.2 -75 0.92 -25 25 75 125 T j (°C) Figure 11. Output capacitance stored energy E OSS (µJ) GIPG090715FQFIWEOS 0.88 -75 -25 25 75 125 T j (°C) Figure 12. Source-drain diode forward characteristics V SD (V) GIPG090715FQFIWSDF T j = -50 °C 24 1.0 20 T j = 25 °C 16 0.8 T j = 150 °C 12 8 0.6 4 0 0 DS11149 - Rev 3 100 200 300 400 500 600 V DS (V) 0.4 0 5 10 15 20 25 30 35 I SD (A) page 6/12 STW50N65DM2AG Test circuits 3 Test circuits Figure 13. Test circuit for resistive load switching times Figure 14. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 15. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A L A B B 3.3 µF D G + VD 100 µH fast diode B Figure 16. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 18. Switching time waveform Figure 17. Unclamped inductive waveform ton V(BR)DSS td(on) VD toff td(off) tr tf 90% 90% IDM VDD 10% 0 ID VDD AM01472v1 VGS 0 VDS 10% 90% 10% AM01473v1 DS11149 - Rev 3 page 7/12 STW50N65DM2AG Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 4.1 TO-247 package information Figure 19. TO-247 package outline 0075325_9 DS11149 - Rev 3 page 8/12 STW50N65DM2AG TO-247 package information Table 8. TO-247 package mechanical data Dim. mm Min. Max. A 4.85 5.15 A1 2.20 2.60 b 1.0 1.40 b1 2.0 2.40 b2 3.0 3.40 c 0.40 0.80 D 19.85 20.15 E 15.45 15.75 e 5.30 L 14.20 14.80 L1 3.70 4.30 L2 DS11149 - Rev 3 Typ. 5.45 5.60 18.50 ØP 3.55 3.65 ØR 4.50 5.50 S 5.30 5.50 5.70 page 9/12 STW50N65DM2AG Revision history Table 9. Document revision history Date Revision 09-Jul-2015 1 Changes Initial release. Modified Table 2: "Absolute maximum ratings", Table 4: "Avalanche characteristics" and Table 8: "Source-drain diode". 20-Dec-2017 2 Modified Figure 2: "Safe operating area". Minor text changes. 31-Aug-2020 DS11149 - Rev 3 3 Updated Table 1. Absolute maximum ratings. Minor text changes. page 10/12 STW50N65DM2AG Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4.1 TO-247 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 DS11149 - Rev 3 page 11/12 STW50N65DM2AG IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2020 STMicroelectronics – All rights reserved DS11149 - Rev 3 page 12/12