STW7N95K3

STF7N95K3 STP7N95K3, STW7N95K3 N-channel 950 V, 1.1 Ω, 7.2 A, TO-220, TO-220FP, TO-247 Zener-protected SuperMESH3™ Power MOSFET Features ■ Type VDSS RDS(on) max ID Pw STF7N95K3 950 V < 1.35 Ω 7.2 A 35 W STP7N95K3 950 V < 1.35 Ω 7.2 A 150 W STW7N95K3 950 V < 1.35 Ω 7.2 A 150 W 3 TO-247 100% avalanche tested 3 ■ Extremely large avalanche performance ■ Gate charge minimized ■ Very low intrinsic capacitances ■ Zener-protected 1 2 TO-220 3 1 2 TO-220FP Application ■ 2 1 Figure 1. Internal schematic diagram Switching applications Description The new SuperMESH3™ series is obtained through the combination of a further fine tuning of ST's well established strip-based PowerMESH™ layout with a new optimized vertical structure. In addition to pushing on-resistance significantly down, special attention has been taken to ensure a very good dynamic performances coupled with a very large avalanche capability for the most demanding application. Table 1. Device summary Order codes Marking Package Packaging STF7N95K3 7N95K3 TO-220FP Tube STP7N95K3 7N95K3 TO-220 Tube STW7N95K3 7N95K3 TO-247 Tube January 2009 Rev 1 1/15 www.st.com 15 Contents STF7N95K3, STP7N95K3, STW7N95K3 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2/15 .............................................. 9 STF7N95K3, STP7N95K3, STW7N95K3 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Value Symbol Parameter Unit TO-220, TO-247 TO-220FP VGS Gate-source voltage ± 30 V (1) A A ID Drain current (continuous) at TC = 25 °C 7.2 7.2 ID Drain current (continuous) at TC = 100 °C 4.5 4.5 (1) IDM (2) PTOT Drain current (pulsed) 28.8 28.8 Total dissipation at TC = 25 °C 150 35 IAR Max current during repetitive or single pulse avalanche (pulse width limited by TJMAX) EAS Single pulse avalanche energy (3) Derating factor dv/dt (4) VISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t=1 s;TC=25 °C) Tj Tstg Operating junction temperature Storage temperature A W 9 A 220 mJ 1.12 Peak diode recovery voltage slope (1) 0.24 6 W/°C V/ns 2000 V -55 to 150 °C TO-220 TO-247 TO-220FP Unit 1. Limited by package 2. Pulse width limited by safe operating area 3. Starting Tj = 25 °C, ID = IAR, VDD = 50 V 4. ISD ≤ 7.2 A, di/dt = 100 A/µs, VPeak < V(BR)DSS Table 3. Symbol Thermal data Parameter Rthj-case Thermal resistance junction-case max Rthj-amb Thermal resistance junction-ambient max Tl Maximum lead temperature for soldering purpose 0.83 62.5 50 300 3.57 °C/W 62.5 °C/W °C 3/15 Electrical characteristics 2 STF7N95K3, STP7N95K3, STW7N95K3 Electrical characteristics (Tcase = 25 °C unless otherwise specified) Table 4. Symbol V(BR)DSS On /off states Parameter Drain-source breakdown voltage Test conditions ID = 1 mA, VGS = 0 Min. Typ. Max. Unit 950 V IDSS VDS = Max rating Zero gate voltage drain current (VGS = 0) VDS = Max rating, TC=125 °C 1 50 µA µA IGSS Gate-body leakage current (VDS = 0) 10 µA 4 5 V 1.1 1.35 Ω Typ. Max. Unit VGS = ± 20 V VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA RDS(on) Static drain-source on resistance Table 5. Symbol 3 VGS = 10 V, ID = 3.6 A Dynamic Parameter Test conditions gfs (1) Forward transconductance VDS = 15 V, ID = 3.6 A Ciss Coss Crss Input capacitance Output capacitance Reverse transfer capacitance VDS = 100 V, f = 1 MHz, VGS = 0 Co(tr)(2) Equivalent capacitance time related Co(er)(3) Min. 5 S 1031 79 0.9 pF pF pF VDS = 0 to 760 V, VGS = 0 60 pF Equivalent capacitance energy related VDS = 0 to 760 V, VGS = 0 36 pF RG Gate input resistance f=1 MHz Gate DC Bias=0 Test signal level = 20 mV open drain 2.4 Ω Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VDD = 760 V, ID = 7.2 A, VGS = 10 V (see Figure 20) 34 6 20 nC nC nC 1. Pulsed: pulse duration = 300 µs, duty cycle 1.5% 2. Coss eq. time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS 3. Coss eq. energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS 4/15 STF7N95K3, STP7N95K3, STW7N95K3 Table 6. Switching times Symbol Parameter td(on) tr td(off) tf Table 7. ISD Source-drain current Source-drain current (pulsed) VSD (2) trr Qrr IRRM trr Qrr IRRM Min. Typ. Max Unit 14 9 36 23 VDD = 475 V, ID = 3.6 A, RG = 4.7 Ω, VGS = 10 V (see Figure 19) ns ns ns ns Source drain diode Parameter ISDM Test conditions Turn-on delay time Rise time Turn-off-delay time Fall time Symbol (1) Electrical characteristics Test conditions Min. Typ. Max. Unit 7.2 28.8 A A 1.6 V Forward on voltage ISD = 7.2 A, VGS = 0 Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 7.2 A, di/dt = 100A/µs VDD = 60 V (see Figure 24) 450 6 28 ns µC A Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 7.2 A, di/dt = 100 A/µs VDD = 60 V, Tj = 150 °C (see Figure 24) 550 8 28 ns µC A 1. Pulse width limited by safe operating area 2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5% Table 8. Symbol BVGSO(1) Gate-source Zener diode Parameter Gate-source breakdown voltage Test conditions Igs=± 1mA (open drain) Min. Typ. Max. Unit 30 V 1. The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components 5/15 Electrical characteristics STF7N95K3, STP7N95K3, STW7N95K3 2.1 Electrical characteristics (curves) Figure 2. Safe operating area for TO-220 Figure 3. Thermal impedance for TO-220 Figure 5. Thermal impedance for TO-220FP Figure 7. Thermal impedance for TO-247 AM01576v1 ID (A) Tj=150°C Tc=25°C Single pulse 100 is 10 D S( on ) O Li per m at ite io d ni by n m this ax a R rea 10µs 100µs 1ms 1 0.1 0.1 Figure 4. 10ms 10 1 100 VDS(V) Safe operating area for TO-220FP AM01577v1 ID (A) on ) 10µs D S( O Li per m at ite io d ni by n m this ax a R rea is 10 1 100µs 1ms 10ms Tj=150°C Tc=25°C Single pulse 0.1 0.01 0.1 Figure 6. 1 10 100 VDS(V) Safe operating area for TO-247 AM01578v1 ID (A) 10 n) S( o Lim era ite tion d by in th m is ax ar RD ea is 10µs 0.1 0.1 6/15 1ms Op 1 100µs 1 Tj=150°C Tc=25°C Single pulse 10 100 10ms VDS(V) STF7N95K3, STP7N95K3, STW7N95K3 Figure 8. Electrical characteristics Output characteristics Figure 9. AM01579v1 ID (A) VGS=10V 12 Transfer characteristics AM01580v1 ID (A) 9 VDS=15V 8 10 7 7V 8 6 5 6 4 4 3 6V 2 2 1 0 0 10 5 15 20 5V 25 VDS(V) Figure 10. Normalized BVDSS vs temperature AM01581v1 BVDSS (norm) 0 0 1.00 1.3 0.90 1.2 0.80 1.1 50 0 1.0 1.5 TJ(°C) 100 6 8 10 VGS(V) AM01586v1 RDS(on) (Ω) 1.10 -50 4 Figure 11. Static drain-source on resistance 1.4 0.70 2 ID = 3.6 A VGS =10 V 2 2.5 3 3.5 4 4.5 5 ID(A) Figure 12. Gate charge vs gate-source voltage Figure 13. Capacitance variations AM01583v1 VGS (V) VDD=760 V VGS=10 V ID=7.2 A 12 C (pF) AM01584v1 1000 Ciss 700 600 10 500 8 100 Coss 400 6 300 4 200 2 10 Crss 1 100 0 0 10 20 30 40 0 Qg(nC) 0.1 0.1 1 10 100 VDS(V) 7/15 Electrical characteristics STF7N95K3, STP7N95K3, STW7N95K3 Figure 14. Output capacitance stored energy AM03244v1 ECoss (µJ) Figure 15. Normalized on resistance vs temperature AM01582v1 RDS(on) (norm) 3.0 14 12 2.5 10 2.0 8 1.5 6 1.0 4 0.5 2 0 0 0 400 200 600 -50 VDS(V) 800 Figure 16. Source-drain diode forward characteristics 50 100 TJ(°C) Figure 17. Normalized gate threshold voltage vs temperature AM01587v1 VSD (V) 0 TJ=-50°C 0.9 AM01585v1 VGS(th) (norm) 1.2 1.1 1.0 TJ=25°C 0.8 0.9 0.8 0.7 0.7 TJ=150°C 0.6 0.6 0.5 0.5 1 0.4 2 3 4 6 5 7 8 ISD(A) Figure 18. Maximum avalanche energy vs temperature AM01588v1 EAS (mJ) ID=9 A 220 200 180 160 140 120 100 80 60 40 20 0 0 8/15 20 40 60 80 100 120 140 TJ(°C) -50 0 50 100 150 TJ(°C) STF7N95K3, STP7N95K3, STW7N95K3 3 Test circuits Test circuits Figure 19. Switching times test circuit for resistive load Figure 20. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 µF 2200 RL µF VGS IG=CONST VDD 100Ω Vi=20V=VGMAX VD RG 2200 µF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 AM01469v1 Figure 21. Test circuit for inductive load Figure 22. Unclamped inductive load test switching and diode recovery times circuit A A D.U.T. FAST DIODE B B L A D G VD L=100µH S 3.3 µF B 25 Ω 1000 µF D VDD 2200 µF 3.3 µF VDD ID G RG S Vi D.U.T. Pw AM01470v1 Figure 23. Unclamped inductive waveform AM01471v1 Figure 24. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 0 10% AM01473v1 9/15 Package mechanical data 4 STF7N95K3, STP7N95K3, STW7N95K3 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 10/15 STF7N95K3, STP7N95K3, STW7N95K3 Package mechanical data TO-220 mechanical data mm inch Dim Min A b b1 c D D1 E e e1 F H1 J1 L L1 L20 L30 ∅P Q Typ 4.40 0.61 1.14 0.49 15.25 Max Min 4.60 0.88 1.70 0.70 15.75 0.173 0.024 0.044 0.019 0.6 10.40 2.70 5.15 1.32 6.60 2.72 14 3.93 0.393 0.094 0.194 0.048 0.244 0.094 0.511 0.137 1.27 10 2.40 4.95 1.23 6.20 2.40 13 3.50 Max 0.181 0.034 0.066 0.027 0.62 0.050 16.40 28.90 3.75 2.65 Typ 0.409 0.106 0.202 0.051 0.256 0.107 0.551 0.154 0.645 1.137 3.85 2.95 0.147 0.104 0.151 0.116 11/15 Package mechanical data STF7N95K3, STP7N95K3, STW7N95K3 TO-220FP mechanical data mm Dim. Min. Typ. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 1 F1 1.15 1.70 F2 1.15 1.5 G 4.95 5.2 G1 2.4 2.7 H 10 10.4 L2 16 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Dia 3 3.2 L7 E A B D Dia L5 L6 F1 F2 F G H G1 L4 L2 L3 7012510_Rev_J 12/15 STF7N95K3, STP7N95K3, STW7N95K3 Package mechanical data TO-247 Mechanical data mm. Dim. A Min. 4.85 A1 2.20 2.60 b 1.0 1.40 b1 2.0 2.40 b2 3.0 3.40 c 0.40 0.80 D 19.85 20.15 E 15.45 15.75 e Typ Max. 5.15 5.45 L 14.20 L1 3.70 L2 14.80 4.30 18.50 øP 3.55 3.65 øR 4.50 5.50 S 5.50 13/15 Revision history 5 STF7N95K3, STP7N95K3, STW7N95K3 Revision history Table 9. 14/15 Document revision history Date Revision 27-Jan-2009 1 Changes First release STF7N95K3, STP7N95K3, STW7N95K3 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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