STW88N65M5-4
N-channel 650 V, 0.024 Ω typ., 84 A, MDmesh™ M5
Power MOSFET in a TO247-4 package
Datasheet — production data
Features
Order code
VDS
@Tjmax.
RDS(on) max.
ID
STW88N65M5-4
710 V
0.029 Ω
84 A
• Higher VDS rating
• Higher dv/dt capability
2
4
3
• Excellent switching performance thanks to the
extra driving source pin
1
• Easy to drive
TO247-4
• 100% avalanche tested
Figure 1. Internal schematic diagram
Applications
• High efficiency switching applications:
– Servers
– PV inverters
– Telecom infrastructure
– Multi kW battery chargers
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Description
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This device is an N-channel Power MOSFET
based on MDmesh™ M5 innovative vertical
process technology combined with the wellknown PowerMESH™ horizontal layout. The
resulting product offers extremely low onresistance, making it particularly suitable for
applications requiring high power and superior
efficiency.
Table 1. Device summary
Order code
Marking
Package
Packing
STW88N65M5-4
88N65M5
TO247-4
Tube
October 2015
This is information on a product in full production.
Doc ID 027754 Rev 1
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www.st.com
Contents
STW88N65M5-4
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
............................ 6
3
Test circuits
4
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.1
5
2/13
.............................................. 9
TO247-4 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Doc ID 027754 Rev 1
STW88N65M5-4
1
Electrical ratings
Electrical ratings
Table 2. Absolute maximum ratings
Symbol
Value
Unit
Gate- source voltage
±25
V
Drain current (continuous) at TC = 25 °C
84
Drain current (continuous) at TC = 100 °C
50.5
IDM (1)
Drain current (pulsed)
336
A
PTOT
Total dissipation at TC = 25 °C
450
W
IAR
Max. current during repetitive or single pulse
avalanche (pulse width limited by Tjmax)
15
A
EAS
Single pulse avalanche energy
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
2000
mJ
15
V/ns
VGS
ID
Parameter
dv/dt (2) Peak diode recovery voltage slope
Tstg
Tj
Storage temperature
A
- 55 to 150
°C
Max. operating junction temperature
150
1. Pulse width limited by safe operating area.
2. ISD ≤ 84 A, di/dt = 400 A/µs, peak VDS < V(BR)DSS, VDD = 400 V.
Table 3. Thermal data
Symbol
Parameter
Rthj-case Thermal resistance junction-case max.
Rthj-amb Thermal resistance junction-ambient max.
Doc ID 027754 Rev 1
Value
Unit
0.28
°C/W
50
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Electrical characteristics
2
STW88N65M5-4
Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 4. Static
Symbol
V(BR)DSS
Parameter
Test conditions
Drain-source
breakdown voltage
IDSS
Zero gate voltage
drain current
IGSS
Gate-body leakage
current
ID = 1 mA, VGS = 0 V
Min.
Typ.
Max.
Unit
650
V
VGS = 0 V, VDS = 650 V
1
VGS = 0 V, VDS = 650 V,
TC = 125 °C
100
VDS = 0 V, VGS = ± 25 V
± 100
nA
4
5
V
0.024
0.029
Ω
Min.
Typ.
Max.
Unit
-
8825
-
-
223
-
-
11
-
-
778
-
VGS(th)
Gate threshold voltage VDS = VGS, ID = 250 µA
RDS(on)
Static drain-source onVGS = 10 V, ID = 42 A
resistance
µA
3
Table 5. Dynamic
Symbol
Parameter
Ciss
Input capacitance
Coss
Output capacitance
Crss
Reverse transfer
capacitance
Co(tr)(1)
Equivalent
capacitance time
related
Co(er)(2)
Equivalent
capacitance energy
related
Test conditions
VDS = 100 V, f = 1 MHz,
VGS = 0 V
VGS = 0 V, VDS = 0 to 520 V
RG
Intrinsic gate
resistance
Qg
Total gate charge
Qgs
Gate-source charge
Qgd
Gate-drain charge
pF
pF
-
202
-
f = 1 MHz open drain
-
1.79
-
VDD = 520 V, ID = 42 A,
VGS = 10 V
(see Figure 16)
-
204
-
-
51
-
-
84
-
Ω
nC
1. Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0
to 80% VDSS.
2. Co(er) is a constant capacitance value that gives the same stored energy as Coss while V DS is rising from 0
to 80% VDSS.
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STW88N65M5-4
Electrical characteristics
Table 6. Switching times
Symbol
td(V)
Parameter
Voltage delay time
tr(V)
Voltage rise time
tf(i)
Current fall time
tc(off)
Test conditions
VDD = 400 V, ID = 56 A
RG = 7.2 Ω VGS = 10 V
(see Figure 17 and 20)
Crossing time
Min.
Typ.
Max. Unit
-
150
-
-
19
-
-
24
-
-
45
-
Min.
Typ.
ns
Table 7. Source-drain diode
Symbol
ISD
ISDM(1)
VSD
(2)
Parameter
Test conditions
Max. Unit
Source-drain current
-
84
A
Source-drain current (pulsed)
-
336
A
-
1.5
V
Forward on voltage
ISD = 84 A, VGS = 0
trr
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
trr
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
ISD = 84 A,
di/dt = 100 A/µs
VDD = 100 V (see Figure 17)
ISD = 84 A,
di/dt = 100 A/µs
VDD = 100 V, Tj = 150 °C
(see Figure 17)
-
544
ns
-
14
µC
-
50
A
-
660
ns
-
20
µC
-
60
A
1. Pulse width limited by safe operating area.
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%.
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Electrical characteristics
2.1
STW88N65M5-4
Electrical characteristics (curves)
Figure 2. Safe operating area
Figure 3. Thermal impedance
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Figure 4. Output characteristics
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Figure 5. Transfer characteristics
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Figure 6. Gate charge vs gate-source voltage
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Figure 7. Static drain-source on-resistance
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Doc ID 027754 Rev 1
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STW88N65M5-4
Electrical characteristics
Figure 8. Capacitance variations
Figure 9. Output capacitance stored energy
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Figure 10. Normalized gate threshold voltage vs
temperature
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Figure 11. Normalized on-resistance vs
temperature
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Figure 12. Source-drain diode forward
characteristics
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Figure 13. Normalized V(BR)DSS vs temperature
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7-&
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13
Electrical characteristics
STW88N65M5-4
Figure 14. Switching losses vs gate resistance
(1)
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STW88N65M5-4
3
Test circuits
Test circuits
Figure 15. Switching times test circuit for
resistive load
Figure 16. Gate charge test circuit
VDD
12V
47kΩ
1kΩ
100nF
3.3
mF
2200
RL
mF
IG=CONST
VDD
VGS
RG
100Ω
Vi=20V=VGMAX
VD
2200
mF
D.U.T.
PW
D.U.T.
VG
2.7kΩ
47kΩ
GND1
(driver signal)
GND2
(power)
1kΩ
PW
GND1
AM15855v1
Figure 17. Test circuit for inductive load
switching and diode recovery times
A
A
AM15856v1
Figure 18. Unclamped inductive load test circuit
A
D
G
GND2
L
D.U.T.
FAST
DIODE
B
B
L=100mH
S
B
D
25 W
3.3
mF
VD
1000
mF
2200
mF
VDD
3.3
mF
VDD
ID
G
S
RG
Vi
GND2
GND1
D.U.T.
Pw
GND1
AM15857v1
Figure 19. Unclamped inductive waveform
V(BR)DSS
GND2
AM15858v1
Figure 20. Switching time waveform
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Package information
4
STW88N65M5-4
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
4.1
TO247-4 package information
Figure 21. TO247-4 package outline
B$
10/13
Doc ID 027754 Rev 1
STW88N65M5-4
Package information
Table 8. TO247-4 package mechanical data
mm
Dim.
Min.
Typ.
Max.
A
4.90
5.00
5.10
A1
2.31
2.41
2.51
A2
1.90
2.00
2.10
b
1.16
b1
1.15
b2
0
0.20
c
0.59
0.66
c1
0.58
0.60
0.62
D
20.90
21.00
21.10
D1
16.25
16.55
16.85
D2
1.05
1.20
1.35
D3
24.97
25.12
25.27
E
15.70
15.80
15.90
E1
13.10
13.30
13.50
E2
4.90
5.00
5.10
E3
2.40
2.50
2.60
e
2.44
2.54
2.64
e1
4.98
5.08
5.18
L
19.80
19.92
20.10
P
3.50
3.60
3.70
1.29
1.20
P1
1.25
7.40
P2
2.40
Q
5.60
S
2.50
2.60
6.00
6.15
T
9.80
10.20
U
6.00
6.40
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Revision history
5
STW88N65M5-4
Revision history
Table 9. Document revision history
12/13
Date
Revision
21-Oct-2015
1
Changes
First release.
Doc ID 027754 Rev 1
STW88N65M5-4
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