STW8NC80Z

N-CHANNEL 800V - 1.3 Ω - 6.7A TO-247 Zener-Protected PowerMESH™III MOSFET TYPE STW8NC80Z n n n n n STW8NC80Z VDSS 800 V RDS(on) < 1.5 Ω ID 6.7 A TYPICAL RDS(on) = 1.3 Ω EXTREMELY HIGH dv/dt CAPABILITY GATETO-SOURCE ZENER DIODES 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED TO-247 DESCRIPTION The third generation of MESH OVERLAY ™ Power MOSFETs for very high voltage exhibits unsurpassed on-resistance per unit area while integrating back-to-back Zener diodes between gate and source. Such arrangement gives extra ESD capability with higher ruggedness performance as requested by a large variety of single-switch applications. APPLICATIONS n SINGLE-ENDED SMPS IN MONITORS, COMPUTER AND INDUSTRIAL APPLICATION n WELDING EQUIPMENT INTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID ID IDM (q ) PTOT IGS VESD(G-S) dv/dt (1) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuos) at TC = 25°C Drain Current (continuos) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Gate-source Current Gate source ESD(HBM-C=100pF, R=15KΩ) Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature Value 800 800 ±25 6.7 4.2 27 160 1.28 ±50 3 3 –65 to 150 150 Unit V V V A A A W W/°C mA KV V/ns °C °C (•)Pulse width limited by safe operating area (1)ISD ≤6.7A, di/dt ≤100A/µs, VDD ≤ V (BR)DSS, Tj ≤ T JMAX. December 2001 1/8 STW8NC80Z THERMAL DATA Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Maximum Lead Temperature For Soldering Purpose 0.78 30 300 °C/W °C/W °C AVALANCHE CHARACTERISTICS Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) Max Value 6.7 275 Unit A mJ ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS Parameter Drain-source Breakdown Voltage Test Conditions ID = 250 µA, VGS = 0 ID = 1 mA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 °C VGS = ±20V Min. 800 0.9 1 50 ±10 Typ. Max. Unit V V/°C µA µA µA ∆BVDSS/∆TJ Breakdown Voltage Temp. Coefficient IDSS IGSS Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) ON (1) Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS, ID = 250 µA VGS = 10 V, ID = 3.3 A Min. 3 Typ. 4 1.3 Max. 5 1.5 Unit V Ω DYNAMIC Symbol gfs (1) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS > ID(on) x RDS(on)max, ID =3.3 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 6 2350 164 17 Max. Unit S pF pF pF 2/8 STW8NC80Z ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON (RESISTIVE LOAD) Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 400V, ID = 3A RG = 4.7Ω VGS = 10V (see test circuit, Figure 3) VDD = 640V, ID = 6 A, VGS = 10V Min. Typ. 33 12 43 12 15 58 Max. Unit ns ns nC nC nC SWITCHING OFF (INDUCTIVE LOAD) Symbol tr(Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 640V, ID = 6 A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 5) Min. Typ. 13 13 20 Max. Unit ns ns ns SOURCE DRAIN DIODE Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 6 A, VGS = 0 ISD = 6 A, di/dt = 100A/µs, VDD = 100V, Tj = 150°C (see test circuit, Figure 5) 680 6 18 Test Conditions Min. Typ. Max. 6.7 24 1.6 Unit A A V ns µC A GATE-SOURCE ZENER DIODE Symbol BVGSO αT Rz Parameter Gate-Source Breakdown Voltage Voltage Thermal Coefficient Dynamic Resistance Test Conditions Igs=± 1mA (Open Drain) T=25°C Note(3) ID = 20 mA, VGS = 0 Min. 25 1.3 90 Typ. Max. Unit V 10-4/°C Ω Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. ∆VBV = αT (25°-T) BVGSO(25°) PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to souce. In this respect the 25V Zener voltage is appropiate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. 3/8 STW8NC80Z Safe Operating Area Thermal Impedance Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance 4/8 STW8NC80Z Gate Charge vs Gate-source Voltage Capacitance Variations Normalized Gate Threshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STW8NC80Z Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STW8NC80Z TO-247 MECHANICAL DATA mm MIN. A D E F F3 F4 G H L L3 L4 L5 M 2 15.3 19.7 14.2 34.6 5.5 3 0.079 4.7 2.2 0.4 1 2 3 10.9 15.9 20.3 14.8 0.602 0.776 0.559 1.362 0.217 0.118 TYP. MAX. 5.3 2.6 0.8 1.4 2.4 3.4 MIN. 0.185 0.087 0.016 0.039 0.079 0.118 0.429 0.626 0.779 0.582 inch TYP. MAX. 0.209 0.102 0.031 0.055 0.094 0.134 DIM. P025P 7/8 STW8NC80Z Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics © 2000 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 8/8