STWA20N95K5

STWA20N95K5 N-channel 950 V, 0.275 Ω typ., 17.5 A MDmesh™ K5 Power MOSFET in a TO-247 long leads package Datasheet - production data Features PTOT Order code VDS RDS(on) max. ID STWA20N95K5 950 V 0.330 Ω 17.5 A      250 W Industry’s lowest RDS(on) x area Industry’s best FoM (figure of merit) Ultra-low gate charge 100% avalanche tested Zener-protected Applications Figure 1: Internal schematic diagram  Switching applications Description D(2) This very high voltage N-channel Power MOSFET is designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. G(1) S(3) AM01476v1_No_tab Table 1: Device summary Order code Marking Package Packing STWA20N95K5 20N95K5 TO-247 long leads Tube January 2017 DocID025573 Rev 2 This is information on a product in full production. 1/13 www.st.com Contents STWA20N95K5 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 9 4 Package information ..................................................................... 10 4.1 5 2/13 TO-247 long leads package information ......................................... 10 Revision history ............................................................................ 12 DocID025573 Rev 2 STWA20N95K5 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter VGS Value Unit Gate-source voltage ±30 V ID Drain current (continuous) at TC = 25 °C 17.5 A ID Drain current (continuous) at TC = 100 °C 11 A ID(1) Drain current (pulsed) 70 A PTOT Total dissipation at TC = 25 °C 250 W ESD kV Gate-source human body model (R= 1.5 kΩ, C = 100 pF) 2 dv/dt (2) Peak diode recovery voltage slope 6 dv/dt (3) MOSFET dv/dt ruggedness 50 Tj Operating junction temperature range Tstg Storage temperature range V/ns -55 to 150 °C Value Unit Notes: (1)Pulse (2)I SD (3)V width limited by safe operating area. ≤ 17.5 A, di/dt ≤ 100 A/μs; VDS peak ≤ V(BR)DSS DS ≤ 760 V Table 3: Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case 0.5 °C/W Rthj-amb Thermal resistance junction-ambient 50 °C/W Value Unit 6 A 200 mJ Table 4: Avalanche characteristics Symbol Parameter IAR Avalanche current, repetitive or not repetitive (pulse width limited by Tjmax.) EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) DocID025573 Rev 2 3/13 Electrical characteristics 2 STWA20N95K5 Electrical characteristics TC = 25 °C unless otherwise specified Table 5: On/off-state Symbol Parameter V(BR)DSS Drain-source breakdown voltage Test conditions Min. VGS = 0 V, ID = 1 mA 950 Typ. Max. Unit V VGS = 0 V, VDS = 950 V 1 µA IDSS Zero-gate voltage drain current VGS = 0 V, VDS = 950 V TC = 125 °C(1) 50 µA IGSS Gate body leakage current VDS = 0 V, VGS = ±20 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA 4 5 V RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 9 A 0.275 0.330 Ω Min. Typ. Max. Unit - 1550 - pF - 140 - pF - 1 - pF - 65 - pF 178 - pF 3 Notes: (1)Defined by design, not subject to production test Table 6: Dynamic Symbol Ciss Parameter Test conditions Input capacitance VDS = 100 V, f = 1 MHz, VGS = 0 V Coss Output capacitance Crss Reverse transfer capacitance Co(er)(1) Equivalent capacitance energy related Co(tr)(2) Equivalent capacitance time related VGS = 0 V, VDS = 0 to 760 V Rg Intrinsic gate resistance f = 1 MHz , ID = 0 A - 3.5 - Ω Qg Total gate charge - 48 - nC Qgs Gate-source charge - 9 - nC Qgd Gate-drain charge VDD = 760 V, ID = 17.5 A VGS= 10 V (see Figure 16: "Test circuit for gate charge behavior") - 32.5 - nC Notes: (1)C o(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS. (2)C o(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 4/13 DocID025573 Rev 2 STWA20N95K5 Electrical characteristics Table 7: Switching times Symbol Parameter Turn-on delay time td(on) tr Rise time Turn-off delay time td(off) tf Test conditions Min. Typ. Max. Unit VDD= 475 V, ID = 9 A, RG = 4.7 Ω VGS = 10 V (see Figure 15: "Test circuit for resistive load switching times" and Figure 20: "Switching time waveform") - 18 - ns - 9 - ns - 65 - ns - 18 - ns Min. Typ. Max. Unit Fall time Table 8: Source-drain diode Symbol Parameter Test conditions Source-drain current - 17.5 A ISDM(1) Source-drain current (pulsed) - 70 A VSD(2) Forward on voltage ISD = 17.5 A, VGS = 0 V - 1.5 V ISD = 17.5 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 17: "Test circuit for inductive load switching and diode recovery times") - 513 ns - 12 µC - 46 A ISD = 17.5 A, di/dt = 100 A/µs VDD = 60 V, Tj = 150 °C (see Figure 17: "Test circuit for inductive load switching and diode recovery times") - 670 ns - 15 µC ISD trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current - 44 A Test conditions Min. Typ. Max. Unit IGS = ± 1 mA, ID = 0 A 30 - - V Notes: (1)Pulse width limited by safe operating area (2)Pulsed: pulse duration = 300 µs, duty cycle 1.5% Table 9: Gate-source Zener diode Symbol V(BR) GSO Parameter Gate-source breakdown voltage The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry. DocID025573 Rev 2 5/13 Electrical characteristics 2.1 STWA20N95K5 Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance 6/13 DocID025573 Rev 2 STWA20N95K5 Electrical characteristics Figure 8: Capacitance variation Figure 9: Output capacitance stored energy Figure 10: Normalized gate threshold voltage vs temperature Figure 12: Maximum avalanche energy vs starting TJ Figure 11: Normalized on-resistance vs temperature Figure 13: Normalized V(BR)DSS vs temperature DocID025573 Rev 2 7/13 Electrical characteristics STWA20N95K5 Figure 14: Source-drain diode forward characteristics 8/13 DocID025573 Rev 2 STWA20N95K5 3 Test circuits Test circuits Figure 15: Test circuit for resistive load switching times Figure 16: Test circuit for gate charge behavior VDD RL IG= CONST VGS + pulse width 2200 μF 100 Ω D.U.T. 2.7 kΩ VG 47 kΩ 1 kΩ AM01469v10 Figure 17: Test circuit for inductive load switching and diode recovery times Figure 18: Unclamped inductive load test circuit Figure 19: Unclamped inductive waveform DocID025573 Rev 2 Figure 20: Switching time waveform 9/13 Package information 4 STWA20N95K5 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 TO-247 long leads package information Figure 21: TO-247 long leads package outline 10/13 DocID025573 Rev 2 STWA20N95K5 Package information Table 10: TO-247 long leads package mechanical data mm Dim. Min. Typ. Max. A 4.90 5.00 5.10 A1 2.31 2.41 2.51 A2 1.90 2.00 2.10 b 1.16 1.26 b2 3.25 b3 2.25 c 0.59 0.66 D 20.90 21.00 21.10 E 15.70 15.80 15.90 E2 4.90 5.00 5.10 E3 2.40 2.50 2.60 e 5.34 5.44 5.54 L 19.80 19.92 20.10 P 3.50 3.60 Q 5.60 S 6.05 L1 4.30 DocID025573 Rev 2 3.70 6.00 6.15 6.25 11/13 Revision history 5 STWA20N95K5 Revision history Table 11: Document revision history Date Revision 21-Nov-2013 1 First release. 2 Datasheet promoted from preliminary to production data. Modified: title. Updated: features, applications and description in cover page. Minor text changes in Section 1: "Electrical ratings" and Section 2: "Electrical characteristics". Updated Section 2.1: "Electrical characteristics (curves)". Updated Section 4.1: "TO-247 long leads package information". 16-Jan-2017 12/13 Changes DocID025573 Rev 2 STWA20N95K5 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved DocID025573 Rev 2 13/13