STW57N65M5,
STWA57N65M5
N-channel 650 V, 0.056 Ω typ., 42 A MDmesh™ V Power MOSFETs
in TO-247 and TO-247 long leads packages
Datasheet - production data
Features
Order codes
VDS @ TJmax
RDS(on) max
ID
710 V
0.063 Ω
42 A
STW57N65M5
STWA57N65M5
• Worldwide best RDS(on)*area amongst the
silicon based devices
3
2
1
• Higher VDSS rating, high dv/dt capability
TO-247
TO-247 long leads
• Excellent switching performance
• Easy to drive, 100% avalanche tested
Figure 1. Internal schematic diagram
Applications
• Switching applications
'
Description
*
6
$0Y
These devices are N-channel MDmesh™ V
Power MOSFETs based on an innovative
proprietary vertical process technology, which is
combined with STMicroelectronics’ well-known
PowerMESH™ horizontal layout structure. The
resulting product has extremely low onresistance, which is unmatched among siliconbased Power MOSFETs, making it especially
suitable for applications which require superior
power density and outstanding efficiency.
Table 1. Device summary
Order codes
Marking
Packages
STW57N65M5
TO-247
57N65M5
STWA57N65M5
December 2013
This is information on a product in full production.
Packaging
Tube
TO-247 long leads
DocID024050 Rev 2
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www.st.com
Contents
STW57N65M5, STWA57N65M5
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
............................ 6
3
Test circuits
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
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STW57N65M5, STWA57N65M5
1
Electrical ratings
Electrical ratings
Table 2. Absolute maximum ratings
Symbol
VGS
Parameter
Gate- source voltage
Value
Unit
± 25
V
ID
Drain current (continuous) at TC = 25 °C
42
A
ID
Drain current (continuous) at TC = 100 °C
26.5
A
IDM (1)
Drain current (pulsed)
168
A
PTOT
Total dissipation at TC = 25 °C
250
W
11
A
IAR
Max current during repetitive or single pulse avalanche
(pulse width limited by TJMAX)
EAS
Single pulse avalanche energy
(starting Tj = 25°C, ID = IAR, VDD = 50V)
960
mJ
Peak diode recovery voltage slope
15
V/ns
MOSFET dv/dt ruggedness
50
V/ns
-55 to 150
°C
150
°C
Value
Unit
0.50
°C/W
50
°C/W
dv/dt (2)
dv/dt
(3)
Tstg
Tj
Storage temperature
Max. operating junction temperature
1. Pulse width limited by safe operating area.
2. ISD ≤ 42 A, di/dt ≤ 400 A/μs, VDS(peak) < V(BR)DSS, VDD = 400 V
3. VDS ≤ 520 V
Table 3. Thermal data
Symbol
Parameter
Rthj-case
Thermal resistance junction-case max
Rthj-amb
Thermal resistance junction-ambient max
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Electrical characteristics
2
STW57N65M5, STWA57N65M5
Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 4. On /off states
Symbol
V(BR)DSS
Parameter
Drain-source
breakdown voltage
Test conditions
ID = 1 mA, VGS = 0
Min.
Typ.
Max.
Unit
650
V
IDSS
Zero gate voltage
VDS = 650 V
drain current (VGS = 0) VDS = 650 V, TC=125 °C
1
100
μA
μA
IGSS
Gate-body leakage
current (VDS = 0)
±100
nA
4
5
V
0.056
0.063
Ω
Min.
Typ.
Max.
Unit
-
4200
-
pF
-
115
pF
-
9
pF
-
93
-
pF
-
303
-
pF
f = 1 MHz, ID=0
-
1.3
-
Ω
VDD = 520 V, ID = 21 A,
VGS = 10 V
(see Figure 17 and 20)
-
98
-
nC
-
23
nC
-
40
nC
VGS = ± 25 V
VGS(th)
Gate threshold voltage VDS = VGS, ID = 250 μA
RDS(on
Static drain-source onVGS = 10 V, ID = 21 A
resistance
3
Table 5. Dynamic
Symbol
Parameter
Ciss
Input capacitance
Coss
Output capacitance
Crss
Reverse transfer
capacitance
Co(er)(1)
Equivalent output
capacitance energy
related
Co(tr)(2)
Equivalent output
capacitance time
related
Test conditions
VDS = 100 V, f = 1 MHz,
VGS = 0
VGS = 0, VDS = 0 to 520 V
RG
Intrinsic gate
resistance
Qg
Total gate charge
Qgs
Gate-source charge
Qgd
Gate-drain charge
1. Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0
to 80% VDSS
2. Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0
to 80% VDSS
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STW57N65M5, STWA57N65M5
Electrical characteristics
Table 6. Switching times
Symbol
td(V)
Parameter
Voltage delay time
tr(V)
Voltage rise time
tf(i)
Current fall time
tc(off)
Test conditions
VDD = 400 V, ID = 28 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 17 and 20)
Crossing time
Min.
Typ.
Max. Unit
-
73
-
ns
-
15
-
ns
-
12
-
ns
-
19
-
ns
Min.
Typ.
Table 7. Source drain diode
Symbol
Parameter
ISD
ISDM (1)
Source-drain current
Source-drain current (pulsed)
VSD (2)
Forward on voltage
trr
Test conditions
ISD = 42 A, VGS = 0
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
trr
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
ISD = 42 A, di/dt = 100 A/μs
VDD = 100 V (see Figure 17)
ISD = 42 A, di/dt = 100 A/μs
VDD = 100 V, Tj = 150 °C
(see Figure 17)
Max. Unit
-
42
168
A
A
-
1.5
V
-
418
ns
-
8
μC
-
40
A
-
528
ns
-
12
μC
-
44
A
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%
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16
Electrical characteristics
2.1
STW57N65M5, STWA57N65M5
Electrical characteristics (curves)
Figure 2. Safe operating area
Figure 3. Thermal impedance
AM14705v1
ID
(A)
100
s
ai
re n)
s a DS(o
i
th R
in ax
n
io by m
t
a
er ted
Op imi
L
10
10µs
100µs
1ms
10ms
Tj=150°C
Tc=25°C
1
Single
pulse
0.1
10
1
0.1
VDS(V)
100
Figure 4. Output characteristics
Figure 5. Transfer characteristics
AM14706v1
ID
(A)
VGS= 9, 10 V
100
AM14707v1
ID
(A)
VDS= 25 V
100
VGS= 8 V
80
80
VGS= 7 V
60
60
40
40
VGS= 6 V
20
0
4
0
16
12
8
20
0
VDS(V)
Figure 6. Gate charge vs gate-source voltage
AM14708v1
VGS
(V)
VDS
(V)
500
VDD=520V
10
ID=21A
VDS
8
400
6
300
4
200
2
100
3
4
5
6
7
8
9 VGS(V)
Figure 7. Static drain-source on-resistance
AM14709v1
RDS(on)
(Ω)
0.062
VGS=10V
0.060
0.058
0.056
0
0
6/16
20
40
60
80
0
100 Qg(nC)
0.054
0.052
0.05
DocID024050 Rev 2
0
10
20
30
ID(A)
STW57N65M5, STWA57N65M5
Electrical characteristics
Figure 8. Capacitance variations
Figure 9. Output capacitance stored energy
AM14710v1
C
(pF)
AM14711v1
Eoss
(µJ)
18
16
10000
Ciss
14
1000
12
10
100
8
Coss
6
10
4
Crss
2
1
0.1
1
100
10
Figure 10. Normalized gate threshold voltage vs
temperature
AM04972v1
VGS(th)
(norm)
0
0
VDS(V)
100
400
200 300
500
600
VDS(V)
Figure 11. Normalized on-resistance vs
temperature
AM05501v2
RDS(on)
(norm)
ID=250µA
2.1
1.10
ID= 21 A
1.9
VGS= 10 V
1.7
1.00
1.5
1.3
0.90
1.1
0.9
0.80
0.7
0.70
-50
-25
0
25
50
75 100
TJ(°C)
Figure 12. Source-drain diode forward
characteristics
AM04974v1
VSD
(V)
0.5
-50 -25
0
25
50
75 100 125 TJ(°C)
Figure 13. Normalized VDS vs temperature
AM10399v1
VDS
(norm)
TJ=-50°C
1.08
1.2
ID = 1mA
1.06
1.0
1.04
0.8
1.02
TJ=25°C
0.6
TJ=150°C
1.00
0.98
0.4
0.96
0.2
0
0.94
0
10
20
30
40
50 ISD(A)
0.92
-50 -25
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0
25
50
75 100
TJ(°C)
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16
Electrical characteristics
STW57N65M5, STWA57N65M5
Figure 14. Switching losses vs gate
resistance (1)
AM14712v1
E (μJ)
800
Eon
VDD=400V
VGS=10V
ID=28A
600
Eoff
400
200
0
0
10
20
30
40
RG(Ω)
1. Eon including reverse recovery of a SiC diode
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STW57N65M5, STWA57N65M5
3
Test circuits
Test circuits
Figure 15. Switching times test circuit for
resistive load
Figure 16. Gate charge test circuit
VDD
12V
47kΩ
1kΩ
100nF
3.3
μF
2200
RL
μF
IG=CONST
VDD
VGS
100Ω
Vi=20V=VGMAX
VD
RG
2200
μF
D.U.T.
D.U.T.
VG
2.7kΩ
PW
47kΩ
1kΩ
PW
AM01468v1
Figure 17. Test circuit for inductive load
switching and diode recovery times
A
A
AM01469v1
Figure 18. Unclamped inductive load test circuit
L
A
D
G
D.U.T.
FAST
DIODE
B
B
VD
L=100μH
S
3.3
μF
B
25 Ω
1000
μF
D
VDD
2200
μF
3.3
μF
VDD
ID
G
RG
S
Vi
D.U.T.
Pw
AM01470v1
AM01471v1
Figure 19. Unclamped inductive waveform
V(BR)DSS
Figure 20. Switching time waveform
Concept waveform for Inductive Load Turn-off
Id
VD
90%Vds
90%Id
Tdelay-off
-off
IDM
Vgs
90%Vgs
on
ID
Vgs(I(t))
))
VDD
VDD
10%Id
10%Vds
Vds
Trise
AM01472v1
DocID024050 Rev 2
Tfall
Tcross --over
AM05540v2
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Package mechanical data
4
STW57N65M5, STWA57N65M5
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
10/16
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STW57N65M5, STWA57N65M5
Package mechanical data
Table 8. TO-247 mechanical data
mm.
Dim.
Min.
Typ.
Max.
A
4.85
5.15
A1
2.20
2.60
b
1.0
1.40
b1
2.0
2.40
b2
3.0
3.40
c
0.40
0.80
D
19.85
20.15
E
15.45
15.75
e
5.30
L
14.20
14.80
L1
3.70
4.30
5.45
L2
5.60
18.50
∅P
3.55
3.65
∅R
4.50
5.50
S
5.30
5.50
DocID024050 Rev 2
5.70
11/16
16
Package mechanical data
STW57N65M5, STWA57N65M5
Figure 21. TO-247 drawing
0075325_G
12/16
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STW57N65M5, STWA57N65M5
Package mechanical data
Table 9. TO-247 long leads mechanical data
mm
Dim.
Min.
Typ.
Max.
A
4.90
5.15
D
1.85
2.10
E
0.55
0.67
F
1.07
1.32
F1
1.90
2.38
F2
2.87
3.38
G
10.90 BSC
H
15.77
16.02
L
20.82
21.07
L1
4.16
4.47
L2
5.49
5.74
L3
20.05
20.30
L4
3.68
3.93
L5
6.04
6.29
M
2.25
2.55
V
10°
V1
3°
V3
20°
Dia.
3.55
3.66
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16
Package mechanical data
STW57N65M5, STWA57N65M5
Figure 22. TO-247 long leads drawing
7395426_G
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STW57N65M5, STWA57N65M5
5
Revision history
Revision history
Table 10. Document revision history
Date
Revision
17-Dec-2012
1
First release.
2
– Modified: Figure 1
– Added: MOSFET dv/dt ruggedness parameter in Table 2 and
note 3
– Modified: test conditions Co(er) and Co(tr) in Table 5
– Updated: the entire Section 2.1: Electrical characteristics (curves)
except Figure 14: Switching losses vs gate resistance
– Updated: Section 4: Package mechanical data
– Minor text changes
13-Dec-2013
Changes
DocID024050 Rev 2
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STW57N65M5, STWA57N65M5
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