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STWA63N65DM2

STWA63N65DM2

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    TO-247-3

  • 描述:

    MOSFET N-CH 650V 60A TO247

  • 数据手册
  • 价格&库存
STWA63N65DM2 数据手册
STWA63N65DM2 Datasheet N-channel 650 V, 0.042 Ω typ., 60 A MDmesh™ DM2 Power MOSFET in a TO-247 long leads package Features • • • • • • D(2) Order code VDS RDS(on) max. ID PTOT STWA63N65DM2 650 V 0.050 Ω 60 A 446 W Fast-recovery body diode Extremely low gate charge and input capacitance Low on-resistance 100% avalanche tested Extremely high dv/dt ruggedness Zener-protected Applications G(1) • Switching applications Description S(3) AM01476v1_No_tab This high-voltage N-channel Power MOSFET is part of the MDmesh™ DM2 fast recovery diode series. It offers very low recovery charge (Qrr) and time (trr) combined with low RDS(on), rendering it suitable for the most demanding high-efficiency converters and ideal for bridge topologies and ZVS phase-shift converters. Product status link STWA63N65DM2 Product summary Order code STWA63N65DM2 Marking 63N65DM2 Package TO-247 long leads Packing Tube DS12555 - Rev 1 - April 2018 For further information contact your local STMicroelectronics sales office. www.st.com STWA63N65DM2 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Value Unit Gate-source voltage ±25 V Drain current (continuous) at Tcase = 25 °C 60 Drain current (continuous) at Tcase = 100 °C 38 IDM (1) Drain current (pulsed) 240 A PTOT Total dissipation at Tcase = 25 °C 446 W dv/dt(2) Peak diode recovery voltage slope 50 dv/dt(3) MOSFET dv/dt ruggedness 50 Tstg Storage temperature range VGS ID Tj Parameter Operating junction temperature range A V/ns -55 to 150 °C 1. Pulse width is limited by safe operating area. 2. ISD ≤ 60 A, di/dt=800 A/μs, VDS peak < V(BR)DSS, VDD = 80% V(BR)DSS 3. VDS ≤ 520 V Table 2. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case Rthj-amb Thermal resistance junction-ambient Value Unit 0.28 °C/W 50 Table 3. Avalanche characteristics Symbol IAR EAS (1) Parameter Avalanche current, repetitive or non-repetitive Single pulse avalanche energy Value Unit 8 A 1100 mJ 1. Starting Tj = 25 °C, ID = IAR, VDD = 50 V. DS12555 - Rev 1 page 2/12 STWA63N65DM2 Electrical characteristics 2 Electrical characteristics (Tcase = 25 °C unless otherwise specified) Table 4. Static Symbol V(BR)DSS Parameter Drain-source breakdown voltage Test conditions VGS = 0 V, ID = 1 mA Min. Typ. Max. 650 Unit V VGS = 0 V, VDS = 650 V 10 VGS = 0 V, VDS = 650 V, Tcase = 125 °C(1) 100 ±5 µA 4 5 V 0.042 0.050 Ω Unit IDSS Zero gate voltage drain current IGSS Gate-body leakage current VDS = 0 V, VGS = ±25 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source onresistance VGS = 10 V, ID = 30 A 3 µA 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. - 5500 - - 210 - Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance - 3 - Equivalent output capacitance VDS = 0 to 520 V, VGS = 0 V - 456 - pF - 3.3 - Ω - 120 - - 27 - - 58 - Coss eq. (1) RG Intrinsic gate resistance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge VDS = 100 V, f = 1 MHz, VGS = 0 V f = 1 MHz, ID = 0 A VDD = 520 V, ID = 60 A, VGS = 0 to 10 V (see Figure 14. Test circuit for gate charge behavior) pF nC 1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. Table 6. Switching times Symbol td(on) tr td(off) tf DS12555 - Rev 1 Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions VDD = 325 V, ID = 30 A RG = 4.7 Ω, VGS = 10 V (see Figure 13. Test circuit for resistive load switching times and Figure 18. Switching time waveform) Min. Typ. Max. - 33 - - 13.5 - - 114 - - 11.5 - Unit ns page 3/12 STWA63N65DM2 Electrical characteristics Table 7. Source-drain diode Symbol ISD ISDM (1) (2) Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 60 A Source-drain current (pulsed) - 240 A 1.6 V Forward on voltage VGS = 0 V, ISD = 60 A - trr Reverse recovery time - 154 ns Qrr Reverse recovery charge - 0.94 µC IRRM Reverse recovery current ISD = 60 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 15. Test circuit for inductive load switching and diode recovery times) - 12.2 A ISD = 60 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C (see Figure 15. Test circuit for inductive load switching and diode recovery times) - 288 ns - 3.65 µC - 25.4 A VSD trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current 1. Pulse width is limited by safe operating area. 2. Pulse test: pulse duration = 300 µs, duty cycle 1.5% DS12555 - Rev 1 page 4/12 STWA63N65DM2 Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance GIPG270715FQF9WSOA AM09125v1 K ea d=0.5 ) on S( O is pe lim rat ite ion d in by t R his ar 0.2 D 0.1 0.05 10 -1 0.02 0.01 Zth =k *Rthj-c d=t p /t Single pulse tp t -2 10 -4 10 Figure 3. Output characteristics ID (A) 10 -2 10 -1 t p (s) Figure 4. Transfer characteristics ID (A) GIPG270715FQF9WOCH V GS = 9, 10 V V GS = 8 V 160 10 -3 GIPG270715FQF9WTCH 160 VDS = 15 V V GS = 7 V 120 120 80 80 V GS = 6 V 40 40 V GS = 5 V 0 0 4 8 12 16 V DS (V) Figure 5. Gate charge vs gate-source voltage VGS (V) 12 GIPG270715FQF9WQVG VDS (V) VDD= 520 V, ID= 60 A VDS 600 10 500 8 400 6 300 4 200 2 100 0 3 4 5 6 7 8 9 VGS (V) Figure 6. Static drain-source on-resistance R DS(on) (Ω) GIPG270715FQF9WRID V GS = 10 V 0.05 0.046 0.042 0 0 DS12555 - Rev 1 20 40 60 0 80 100 120 140 Q g (nC) 0.038 0.034 0.030 0 10 20 30 40 50 I D (A) page 5/12 STWA63N65DM2 Electrical characteristics (curves) Figure 7. Capacitance variations C (pF) Figure 8. Normalized gate threshold voltage vs temperature GIPG270715FQF9WCVR V GS(th) (norm.) 10 4 C ISS 10 3 GIPG270715FQF9WVTH I D = 250 µA 1.1 1.0 C OSS 10 2 f = 1 MHz 10 1 C RSS 0.9 0.8 0.7 10 0 10 -1 10 0 10 1 V DS (V) 10 2 Figure 9. Normalized on-resistance vs temperature R DS(on) (norm.) GIPG270715FQF9WRON V GS = 10 V 2.2 0.6 -75 -25 25 75 125 T j (°C) Figure 10. Normalized V(BR)DSS vs temperature V (BR)DSS (norm.) GIPG270715FQF9WBDV I D = 1 mA 1.12 1.08 1.8 1.04 1.4 1.00 1.0 0.96 0.6 0.2 -75 0.92 -25 25 75 125 T j (°C) Figure 11. Output capacitance stored energy E OSS (µJ) GIPG270715FQF9WEOS 36 0.88 -75 -25 125 T j (°C) Figure 12. Source- drain diode forward characteristics V SD (V) GIPG270715FQF9WSDF T j = -50 °C 1.0 24 T j = 25 °C 0.8 18 T j = 150 °C 0.6 12 0.4 6 DS12555 - Rev 1 75 1.2 30 0 0 25 100 200 300 400 500 600 V DS (V) 0.2 0 10 20 30 40 50 I SD (A) page 6/12 STWA63N65DM2 Test circuits 3 Test circuits Figure 13. Test circuit for resistive load switching times Figure 14. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 15. Test circuit for inductive load switching and diode recovery times Figure 16. Unclamped inductive load test circuit L D G A D.U.T. S 25 Ω A A 100 µH fast diode B B B VD 3.3 µF D G + RG 1000 + µF 2200 + µF 3.3 µF VDD ID VDD D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform V(BR)DSS ton VD td(on) IDM toff td(off) tr 90% tf 90% 10% ID VDD 10% 0 VDD VGS 0 VDS 90% 10% AM01472v1 AM01473v1 DS12555 - Rev 1 page 7/12 STWA63N65DM2 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 TO-247 long leads package information Figure 19. TO-247 long leads package outline 8463846_2_F DS12555 - Rev 1 page 8/12 STWA63N65DM2 TO-247 long leads package information Table 8. TO-247 long leads package mechanical data Dim. mm Min. Typ. Max. A 4.90 5.00 5.10 A1 2.31 2.41 2.51 A2 1.90 2.00 2.10 b 1.16 1.26 b2 3.25 b3 2.25 c 0.59 0.66 D 20.90 21.00 21.10 E 15.70 15.80 15.90 E2 4.90 5.00 5.10 E3 2.40 2.50 2.60 e 5.34 5.44 5.54 L 19.80 19.92 20.10 L1 DS12555 - Rev 1 4.30 P 3.50 Q 5.60 S 6.05 3.60 3.70 6.00 6.15 6.25 page 9/12 STWA63N65DM2 Revision history Table 9. Document revision history DS12555 - Rev 1 Date Revision 16-Apr-2018 1 Changes Initial release. The document status is production data. page 10/12 STWA63N65DM2 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4.1 TO-247 long leads package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 DS12555 - Rev 1 page 11/12 STWA63N65DM2 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved DS12555 - Rev 1 page 12/12
STWA63N65DM2 价格&库存

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STWA63N65DM2
  •  国内价格
  • 1+109.59303
  • 2+75.35051
  • 5+71.19733

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STWA63N65DM2
  •  国内价格 香港价格
  • 600+64.46243600+8.02497

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STWA63N65DM2
    •  国内价格 香港价格
    • 1+73.640101+9.16750
    • 5+72.781605+9.06063
    • 25+71.9231025+8.95375
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    • 250+70.11071250+8.72813

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