STWA65N65DM2AG

STWA65N65DM2AG Datasheet Automotive-grade N-channel 650 V, 42 mΩ typ., 60 A MDmesh DM2 Power MOSFET in a TO-247 long leads package Features • • • • • • • D(2, TAB) G(1) Order code VDS RDS(on) max. ID PTOT STWA65N65DM2AG 650 V 50 mΩ 60 A 446 W AEC-Q101 qualified Fast-recovery body diode Extremely low gate charge and input capacitance Low on-resistance 100% avalanche tested Extremely high dv/dt ruggedness Zener-protected Applications S(3) AM01476v1_tab • Switching applications Description This high-voltage N-channel Power MOSFET is part of the MDmesh DM2 fastrecovery diode series. It offers very low recovery charge (Qrr) and time (trr) combined with low RDS(on), rendering it suitable for the most demanding high-efficiency converters and ideal for bridge topologies and ZVS phase-shift converters. Product status link STWA65N65DM2AG Product summary Order code STWA65N65DM2AG Marking 65N65DM2 Package TO-247 long leads Packing Tube DS12757 - Rev 3 - May 2020 For further information contact your local STMicroelectronics sales office. www.st.com STWA65N65DM2AG Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Value Unit Gate-source voltage ±25 V Drain current (continuous) at Tcase = 25 °C 60 Drain current (continuous) at Tcase = 100 °C 38 IDM (1) Drain current (pulsed) 240 A PTOT Total power dissipation at Tcase = 25 °C 446 W dv/dt(2) Peak diode recovery voltage slope 100 V/ns (2) VGS ID Parameter A Peak diode recovery current slope 1000 A/µs dv/dt(3) MOSFET dv/dt ruggedness 100 V/ns Tstg Storage temperature range -55 to 150 °C di/dt Tj Operating junction temperature range 1. Pulse width is limited by safe operating area. 2. ISD ≤ 60 A, VDS peak < V(BR)DSS, VDD = 80% V(BR)DSS. 3. VDS ≤ 520 V. Table 2. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case Rthj-amb Thermal resistance junction-ambient Value Unit 0.28 °C/W 50 Table 3. Avalanche characteristics Symbol IAR EAS (1) Parameter Avalanche current, repetitive or not repetitive Single pulse avalanche energy Value Unit 8 A 1100 mJ 1. starting Tj = 25 °C, ID = IAR, VDD = 50 V. DS12757 - Rev 3 page 2/12 STWA65N65DM2AG Electrical characteristics 2 Electrical characteristics (Tcase = 25 °C unless otherwise specified). Table 4. Static Symbol V(BR)DSS Parameter Drain-source breakdown voltage Test conditions VGS = 0 V, ID = 1 mA Min. Typ. Max. 650 Unit V VGS = 0 V, VDS = 650 V 10 VGS = 0 V, VDS = 650 V, Tcase = 125 °C (1) 100 ±5 µA 4 5 V 42 50 mΩ Min. Typ. Max. Unit - 5500 - - 210 - Reverse transfer capacitance - 3 - Equivalent output capacitance VDS = 0 to 520 V, VGS = 0 V - 456 - pF - 3.3 - Ω - 120 - - 27 - - 58 - IDSS Zero gate voltage drain current IGSS Gate-body leakage current VDS = 0 V, VGS = ±25 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source onresistance VGS = 10 V, ID = 30 A 3 µA 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Coss eq. (1) RG Intrinsic gate resistance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions VDS = 100 V, f = 1 MHz, VGS = 0 V f = 1 MHz, ID = 0 A VDD = 520 V, ID = 60 A, VGS = 0 to 10 V (see Figure 14. Test circuit for gate charge behavior) pF nC 1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. Table 6. Switching times Symbol td(on) tr td(off) tf DS12757 - Rev 3 Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions VDD = 325 V, ID = 30 A RG = 4.7 Ω, VGS = 10 V (see Figure 13. Test circuit for resistive load switching times and Figure 18. Switching time waveform) Min. Typ. Max. - 33 - - 13.5 - - 114 - - 11.5 - Unit ns page 3/12 STWA65N65DM2AG Electrical characteristics Table 7. Source-drain diode Symbol ISD Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 60 A ISDM (1) Source-drain current (pulsed) - 240 A VSD (2) Forward on voltage VGS = 0 V, ISD = 60 A - 1.6 V trr Reverse recovery time - 154 ns Qrr Reverse recovery charge - 0.94 µC IRRM Reverse recovery current ISD = 60 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 15. Test circuit for inductive load switching and diode recovery times) - 12.2 A ISD = 60 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C (see Figure 15. Test circuit for inductive load switching and diode recovery times) - 288 ns - 3.65 µC - 25.4 A trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current 1. Pulse width is limited by safe operating area. 2. Pulse test: pulse duration = 300 µs, duty cycle 1.5%. DS12757 - Rev 3 page 4/12 STWA65N65DM2AG Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance GIPG270715FQF9WSOA AM09125v1 K on ) 0.2 D S( O is pe lim rat ite ion d in by t R his ar ea d=0.5 0.1 0.05 10 -1 0.02 0.01 Zth =k *Rthj-c d=t p /t Single pulse tp t -2 10 -4 10 Figure 3. Output characteristics ID (A) 10 V GS = 8 V -2 10 -1 t p (s) Figure 4. Transfer characteristics ID (A) GIPG270715FQF9WOCH V GS = 9, 10 V 160 10 -3 GIPG270715FQF9WTCH 160 VDS = 15 V V GS = 7 V 120 120 80 80 V GS = 6 V 40 40 V GS = 5 V 0 0 4 8 12 16 V DS (V) Figure 5. Gate charge vs gate-source voltage VGS (V) 12 GIPG270715FQF9WQVG VDS (V) VDD= 520 V, ID= 60 A 0 3 RDS(on) (mΩ) 48 10 500 46 8 400 44 6 300 42 4 200 40 2 100 38 0 0 DS12757 - Rev 3 20 40 60 0 80 100 120 140 Q g (nC) 5 6 7 8 9 VGS (V) Figure 6. Static drain-source on-resistance 600 VDS 4 36 0 GADG040920181500RID VGS = 10 V 10 20 30 40 50 ID (A) page 5/12 STWA65N65DM2AG Electrical characteristics (curves) Figure 7. Capacitance variations C (pF) GIPG270715FQF9WCVR 10 4 Figure 8. Normalized gate threshold voltage vs temperature V GS(th) (norm.) C ISS GIPG270715FQF9WVTH I D = 250 µA 1.1 1.0 10 3 C OSS 10 2 0.9 0.8 f = 1 MHz 10 1 C RSS 0.7 10 10 -1 0 10 0 10 1 V DS (V) 10 2 Figure 9. Normalized on-resistance vs temperature R DS(on) (norm.) GIPG270715FQF9WRON V GS = 10 V 2.2 0.6 -75 -25 25 75 125 T j (°C) Figure 10. Normalized V(BR)DSS vs temperature V (BR)DSS (norm.) GIPG270715FQF9WBDV I D = 1 mA 1.12 1.08 1.8 1.04 1.4 1.00 1.0 0.96 0.6 0.2 -75 0.92 -25 25 75 125 T j (°C) Figure 11. Output capacitance stored energy E OSS (µJ) GIPG270715FQF9WEOS 36 0.88 -75 -25 125 T j (°C) Figure 12. Source- drain diode forward characteristics V SD (V) GIPG270715FQF9WSDF T j = -50 °C 1.0 24 T j = 25 °C 0.8 18 T j = 150 °C 0.6 12 0.4 6 DS12757 - Rev 3 75 1.2 30 0 0 25 100 200 300 400 500 600 V DS (V) 0.2 0 10 20 30 40 50 I SD (A) page 6/12 STWA65N65DM2AG Test circuits 3 Test circuits Figure 13. Test circuit for resistive load switching times Figure 14. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 15. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A L A B B 3.3 µF D G + VD 100 µH fast diode B Figure 16. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 18. Switching time waveform Figure 17. Unclamped inductive waveform ton V(BR)DSS td(on) VD toff td(off) tr tf 90% 90% IDM VDD 10% 0 ID VDD AM01472v1 VGS 0 VDS 10% 90% 10% AM01473v1 DS12757 - Rev 3 page 7/12 STWA65N65DM2AG Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 4.1 TO-247 long leads package information Figure 19. TO-247 long leads package outline 8463846_2_F DS12757 - Rev 3 page 8/12 STWA65N65DM2AG TO-247 long leads package information Table 8. TO-247 long leads package mechanical data Dim. mm Min. Typ. Max. A 4.90 5.00 5.10 A1 2.31 2.41 2.51 A2 1.90 2.00 2.10 b 1.16 1.26 b2 3.25 b3 2.25 c 0.59 0.66 D 20.90 21.00 21.10 E 15.70 15.80 15.90 E2 4.90 5.00 5.10 E3 2.40 2.50 2.60 e 5.34 5.44 5.54 L 19.80 19.92 20.10 L1 DS12757 - Rev 3 4.30 P 3.50 Q 5.60 S 6.05 3.60 3.70 6.00 6.15 6.25 page 9/12 STWA65N65DM2AG Revision history Table 9. Document revision history Date Revision 04-Sep-2018 1 Changes Initial release. Modified Table 1. Absolute maximum ratings, Table 3. Avalanche characteristics and Table 7. Source-drain diode. 03-Oct-2018 2 Updated Figure 1. Safe operating area. Minor text changes. 25-May-2020 DS12757 - Rev 3 3 Updated Table 1. Absolute maximum ratings. page 10/12 STWA65N65DM2AG Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4.1 TO-247 long leads package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 DS12757 - Rev 3 page 11/12 STWA65N65DM2AG IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. 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Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2020 STMicroelectronics – All rights reserved DS12757 - Rev 3 page 12/12