STY34NB50

® STY34NB50 N - CHANNEL 500V - 0.11Ω - 34 A - Max247 PowerMESH™ MOSFET TYPE ST Y34NB50 s s s s s s s V DSS 500 V R DS(on) < 0.13 Ω ID 34 A TYPICAL RDS(on) = 0.11 Ω EXTREMELY HIGH dv/dt CAPABILITY ± 30V GATE TO SOURCE VOLTAGE RATING 100% AVALANCHE TESTED LOW INTRINSIC CAPACITANCE GATE CHARGE MINIMIZED REDUCED VOLTAGE SPREAD 1 2 3 DESCRIPTION Using the latest high voltage MESH OVERLAY™ process, SGS-Thomson has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s SWITCH MODE POWER SUPPLY (SMPS) s DC-AC CONVERTER FOR WELDING EQUIPMENT AND UNINTERRUPTABLE POWER SUPPLY AND MOTOR DRIVE ABSOLUTE MAXIMUM RATINGS Symbol V DS VDGR V GS ID ID I DM ( • ) P t ot Parameter Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 k Ω) Gate-source Voltage Drain Current (continuous) at T c = 25 C Drain Current (continuous) at T c = 100 o C Drain Current (pulsed) Total Dissipation at T c = 25 C Derating Factor dv/dt (1) T stg Tj June 1998 Peak Diode Recovery voltage slope St orage Temperature Max. Operating Junction T emperature o o Max247™ INTERNAL SCHEMATIC DIAGRAM Value 500 500 ± 30 34 21.4 136 450 3.61 4.5 -65 to 150 150 ( 1) ISD ≤34 A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX Uni t V V V A A A W W/ o C V/ ns o o C C 1/8 (•) Pulse width limited by safe operating area STY34NB50 THERMAL DATA R t hj-ca se R t hj- amb R thc- si nk Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Thermal Resistance Case-sink Maximum Lead Temperature For Soldering Purpose Max Max Typ 0.277 30 0.1 300 o o C/W C/W o C/W o C AVALANCHE CHARACTERISTICS Symb ol I AR E AS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by T j max) Single Pulse Avalanche Energy (starting Tj = 25 oC, I D = I AR , V DD = 50 V) Max Valu e 34 1000 Unit A mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symb ol V (BR)DSS I DSS Parameter Drain-source Breakdown Voltage Test Cond ition s I D = 250 µA VGS = 0 Min. 500 10 100 ± 100 Typ . Max. Un it V µA µA nA V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating o C Gate-body Leakage Current (V DS = 0) V GS = ± 3 0 V Tc = 125 I GSS ON (∗) Symb ol V GS(th) R DS( on) ID(o n) Parameter Gate T hreshold Voltage V DS = VGS Static Drain-source O n Resistance On State Drain Current V GS = 10 V Test Cond ition s ID = 250 µ A ID = 17 A 34 Min. 3 Typ . 4 0.11 Max. 5 0.13 Un it V Ω A V DS > I D(on) x R DS(on) max V GS = 10 V DYNAMIC Symb ol g fs ( ∗ ) C iss C oss C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Cond ition s V DS > I D(on) x R DS(on) max V DS = 25 V f = 1 MHz I D = 17 A VGS = 0 Min. 18 Typ . 20 7000 950 80 9100 1235 104 Max. Un it S pF pF pF 2/8 STY34NB50 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symb ol t d(on) tr Qg Q gs Q gd Parameter Turn-on T ime Rise Time Total G ate Charge Gate-Source Charge Gate-Drain Charge Test Cond ition s V DD = 250 V I D = 17 A V GS = 10 V R G = 4.7 Ω (see test circuit, figure 3) V DD = 400 V ID = 34 A V GS = 10 V Min. Typ . 46 32 159 35 67 Max. 64 45 223 Un it ns ns nC nC nC SWITCHING OFF Symb ol t r(Vof f) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over T ime Test Cond ition s V DD = 400 V ID = 34 A VGS = 10 V R G = 4.7 Ω (see test circuit, figure 5) Min. Typ . 56 53 120 Max. 78 74 168 Un it ns ns ns SOURCE DRAIN DIODE Symb ol I SD I SDM (• ) V SD ( ∗ ) t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward O n Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 34 A V GS = 0 950 12 25 di/dt = 100 A/µ s I SD = 34 A o T j = 150 C V DD = 100 V (see test circuit, figure 5) Test Cond ition s Min. Typ . Max. 34 136 1.6 Un it A A V ns µC A ( ∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % ( •) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance 3/8 STY34NB50 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STY34NB50 Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STY34NB50 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STY34NB50 Max247 MECHANICAL DATA mm MIN. A A1 b b1 b2 c D e E L L1 4.70 2.20 1.00 2.00 3.00 0.40 19.70 5.35 15.30 14.20 3.70 TYP. MAX. 5.30 2.60 1.40 2.40 3.40 0.80 20.30 5.55 15.90 15.20 4.30 MIN. inch TYP. MAX. DIM. P025Q 7/8 STY34NB50 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical compone nts in life support devices or systems without express written approval of STMicroelectronics. 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