T1235T-8G-TR

T1235T-8G 12 A Snubberless™ Triac Datasheet -production data Description Available in SMD, the T1235T-8G Triac can be used for the on/off or phase angle control function in general purpose AC switching where high commutation capability is required. This device can be used without a snubber RC circuit when the limits defined are respected. A2 A1 A2 D²PAK package is UL94-V0 flammability resin compliance. G Package environmentally friendly Ecopack®2 graded (RoHS and Halogen Free compliance). D²PAK Snubberless™ is a trademark of STMicroelectronics. Features      High static dV/dt High dynamic turn-off commutation (dl/dt)c 150 °C maximum Tj Three quadrants Surge capability VDSM, VRSM = 900 V Figure 1: Functional diagram A2 A2: Anode2 Benefits A1: Anode1  G: Gate    High immunity to turn-on thanks to high static dV/dt Better turn-off in high temperature environments thanks to (dI/dt)c Increase of thermal margin due to extended working Tj up to 150 °C Good thermal resistance due to non-insulated tab Applications        General purpose AC line load switching Motor control circuits Home appliances Heating Lighting Inrush current limiting circuits Overvoltage crowbar protection December 2017 G A1 Table 1: Device summary Symbol Value Unit IT(RMS) 12 A VDRM/VRRM 800 V VDSM/VRSM 900 V IGT 35 mA DocID031279 Rev 1 This is information on a product in full production. 1/10 www.st.com Characteristics 1 T1235T-8G Characteristics Table 2: Absolute maximum ratings (limiting values) Symbol IT(RMS) ITSM I2 t dl/dt Parameter 12 Non repetitive surge peak on-state current, Tj initial = 25 °C tp = 16.7 ms 95 tp = 20 ms 90 I2t value for fusing Tj initial = 25 °C 54 A2s Critical rate of rise of on-state current, IG = 2 x IGT, tr ≤ 100 ns f = 100 Hz 100 A/µs Tj = 150 °C 600 V Tj = 125 °C 800 V tp = 10 ms 900 V Tj = 150 °C 4 A Tj = 150 °C 1 W Storage junction temperature range -40 to +150 °C Operating junction temperature range -40 to +150 °C VDSM/VRSM Non Repetitive peak off-state voltage Tstg Tj A Tc = 124 °C Repetitive peak off-state voltage PG(AV) Unit RMS on-state current (full sine wave) VDRM/VRRM IGM Value Peak gate current tp = 20 µs Average gate power dissipation A Table 3: Electrical characteristics (Tj = 25 °C, unless otherwise specified) Symbol Test conditions Value Unit VD = 12 V, RL = 33 Ω I - II - III Min. 1.75 mA VD = 12 V, RL = 33 Ω I - II - III Max. 35 mA VGT VD = 12 V, RL = 33 Ω I - II - III Max. 1.3 V VGD VD = VDRM, RL = 3.3 kΩ, Tj = 150 °C I - II - III Min. 0.2 V IG = 1.2 x IGT I - III Max. 60 mA IG = 1.2 x IGT II Max. 80 mA Max. 40 mA IGT IL IH(1) dV/dt (1) (dl/dt)c(1) IT = 500 mA, gate open VD = 536 V, gate open Tj = 125 °C Min. 2000 V/µs VD = 402 V, gate open Tj = 150 °C Min. 1000 V/µs Tj = 125 °C Min. 12 A/ms Tj = 150 °C Min. 6 A/ms Without snubber, (dV/dt)c > 20 V/µs Notes: (1)For 2/10 Quadrants; Tj both polarities of A2 referenced to A1. DocID031279 Rev 1 T1235T-8G Characteristics Table 4: Static characteristics Symbol Test conditions Tj Value Unit Max. 1.6 V 150 °C Max. 0.85 V 150 °C Max. 50 mΩ VTM(1) IT = 17 A, tp = 380 µs 25 °C VTO(1) Threshold on-state voltage RD(1) Dynamic resistance 25 °C VDRM = VRRM = 800 V IDRM/IRRM VDRM = VRRM = 600 V 5 µA 1 mA 3.1 mA Max. 125°C 150 °C Max. Notes: (1)For both polarities of A2 referenced to A1. Table 5: Thermal resistance Symbol Rth(j-c) Parameter Junction to case (AC) D²PAK DocID031279 Rev 1 Max. Value Unit 1.6 °C/W 3/10 Characteristics 1.1 T1235T-8G Characteristics (curves) Figure 3: On-state RMS current versus case temperature Figure 2: Maximum power dissipation versus onstate RMS current IT(RMS)(A) P(W) 18 16 α = 180° 16 α = 180° 14 12 12 10 8 8 6 4 4 180° 2 Tc(°C) 0 IT(RMS)(A) 0 0 0 2 4 6 8 10 25 50 75 100 125 150 12 Figure 4: On-state RMS current versus ambient temperature (free air convection) Figure 5: Relative variation of thermal impedance versus pulse duration IT(RMS)(A) K = [Zth/Rth] 4.0 1.0E+00 α = 180 3.5 Zth(j-c) D2PAK 3.0 Scu = 1 cm2 Epoxy PCB FR4 copper thickness = 35 µm 2.5 2.0 1.0E-01 1.5 1.0 0.5 tp(s) Ta(°C) 0.0 0 25 50 75 100 125 150 Figure 6: Relative variation of gate trigger voltage and current versus junction temperature (typical values) IGT,VGT[Tj] / IGT,VGT[Tj = 25 °C] 1.0E-02 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1.0E+03 Figure 7: Relative variation of holding current and latching current versus junction temperature (typical values) IH,IL [Tj] / IH,IL [Tj = 25 °C] 2.0 2.0 IGT Q1-Q2 1.5 1.5 1.0 1.0 VGT Q1-Q2-Q3 IL 0.5 0.5 IGT Q3 Tj (°C) 0.0 -50 4/10 IH Tj (°C) 0.0 -25 0 25 50 75 100 125 150 -50 DocID031279 Rev 1 -25 0 25 50 75 100 125 150 T1235T-8G Characteristics Figure 9: Non repetitive surge peak on-state current for a sinusoidal pulse with width tp < 10 ms Figure 8: Surge peak on-state current versus number of cycles ITSM (A) ITSM(A) 100 10000 Tj initial=25°C dI/dt limitation: 100A/µs t=20ms O ne c yc le Non repetitive Tj initial = 25 °C 1000 50 100 Repetitive Tc = 124°C t p (ms) Number of cycles 10 0.01 0 1 10 100 1000 1.00 10.00 Figure 11: Relative variation of critical rate of decrease of main current versus junction temperature Figure 10: On-state characteristics (maximum values) (dl/dt)c [Tj] / (dl/dt)c [Tj = 150 °C] ITM(A) 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 100 Tj = 25 °C Tj = 150 °C 10 Tj max. Vto = 0.85 V Rd = 50 mΩ VTM(V) 1 0 0.10 1 2 3 4 5 Tj(°C) 25 50 75 100 125 150 Figure 13: Relative variation of leakage current versus junction temperature for different values of blocking voltage Figure 12: Relative variation of static dV/dt immunity versus junction temperature IDRM, IRRM at [Tj] / IDRM, IRRM at [Tj max.]* dV/dt [Tj] / dV/dt [Tj = 150 °C] 1.0E+00 6 VD = VR = 402 V 5 4 1.0E-01 VDRM = VRRM = 800 V 3 VDRM = VRRM = 600 V 2 1.0E-02 1 *[Tj max = 125 °C; VDRM, VRRM = 800 V] [Tj max = 150 °C; V DRM, V RRM = 600 V] T (°C) j Tj(°C) 0 25 50 75 100 125 150 1.0E-03 25 DocID031279 Rev 1 50 75 100 125 5/10 150 Package information 2 T1235T-8G Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.    2.1 ECOPACK®2 compliant Lead-free package leads finishing Molding compound resin is halogen-free and meets UL standard level V0 D²PAK package information Figure 14: D²PAK package outline 6/10 DocID031279 Rev 1 Package information T1235T-8G Table 6: D²PAK package mechanical data Dimensions Ref. Inches(1) Millimeters Min. Typ. Max. Min. Typ. Max. A 4.30 4.60 0.1693 0.1811 A1 2.49 2.69 0.0980 0.1059 A2 0.03 0.23 0.0012 0.0091 A3 0.0098 0.25 b 0.70 0.93 0.0276 0.0366 b2 1.25 1.7 0.0492 0.0669 c 0.45 0.60 0.0177 0.0236 c2 1.21 1.36 0.0476 0.0535 D 8.95 9.35 0.3524 0.3681 D1 7.50 8.00 0.2953 0.3150 D2 1.30 1.70 0.0512 0.0669 e 2.54 E 10.00 10.28 0.3937 0.4047 E1 8.30 8.70 0.3268 0.3425 E2 6.85 7.25 0.2697 0.2854 G 4.88 5.28 0.1921 0.2079 H 15 15.85 0.5906 0.6240 L 1.78 2.28 0.0701 0.0898 L2 1.27 1.40 0.0500 0.0551 L3 1.40 1.75 0.0551 R V2 0.1 0.40 0° 0.0689 0.0157 8° 0° 8° Notes: (1)Dimensions in inches are given for reference only DocID031279 Rev 1 7/10 Package information T1235T-8G Figure 15: D²PAK recommended footprint (dimensions are in mm) Figure 16: D²PAK stencil definitions (dimensions are in mm) 8/10 DocID031279 Rev 1 Ordering information T1235T-8G 3 Ordering information Figure 17: Ordering information scheme T 12 35 T - 8 G - TR Snubberless™ TRIAC RMS current 12 = 12 A IGT current 35 = 35 mA Specific application T = increased (dl/dt) and dV/dt producing reduced ITSM Voltage 8 = 800 V Package G = D²PAK Packing Blank = Tube -TR = Tape and reel Table 7: Ordering information Order code T1235T-8G-TR T1235T-8G 4 Marking Package Weight T1235T-8G D²PAK 1.38 g Base qty. Delivery mode 1000 Tape and reel 50 Tube Revision history Table 8: Document revision history Date Revision 19-Dec-2017 1 Changes Initial release. DocID031279 Rev 1 9/10 T1235T-8G IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved 10/10 DocID031279 Rev 1