T835H-8G
Datasheet
8 A - 800 V - 150 °C 8H Triac in D2PAK
Features
A2
G
A1
A2
A1
•
•
•
8 A medium current Triac
800 V symmetrical blocking voltage
150 °C maximum junction temperature Tj
•
•
•
•
•
Three triggering quadrants
High noise immunity - static dV/dt
Robust dynamic turn-off commutation - (dl/dt)c
ECOPACK2 compliant component
Molding resin UL94-V0 flammability certified
Applications
A2
•
•
•
•
•
•
G
D²PAK
General purpose AC line load control
AC induction and universal motor control
Lighting and automation I/O control
Water heater, room heater and coffee machine
Home automation smart AC plug
Inrush current limiter in AC DC rectifiers
Description
Product status link
T835H-8G
Product summary
IT(RMS)
8A
VDRM/VRRM
800 V
VDSM/VRSM
900 V
IGT
35 mA
Tj max.
150 °C
Specifically designed to operate at 800 V and 150 °C, the T835H-8G Triac housed in
D2PAK provides an enhanced thermal management: this 8 A Triac is the right choice
for a compact drive of AC loads and enables the heatsink size reduction.
D2PAK package is ideal for compact SMD designs on surface mount boards or
insulated metal substrate boards.
Based on the ST high temperature Snubberless technology, it offers higher specified
turn off commutation and noise immunity levels up to the Tj max.
The T835H-8G safely optimizes the control of the hardest universal motors, heaters
and inductive loads for industrial control and home appliances.
Snubberless is a trademark of STMicroelectronics.
DS13570 - Rev 2 - December 2020
For further information contact your local STMicroelectronics sales office.
www.st.com
T835H-8G
Characteristics
1
Characteristics
Table 1. Absolute maximum ratings (limiting values)
Symbol
IT(RMS)
ITSM
I2t
dl/dt
Parameter
8
Non repetitive surge peak on-state current (full cycle,
Tj initial = 25 °C)
t = 16.7 ms
84
t = 20 ms
80
I2t value for fusing
tp = 10 ms
42
A2s
Critical rate of rise of on-state current, IG = 2 x IGT, tr
≤ 100 ns, f = 100 Hz
Tj = 25 °C
100
A/µs
800
V
900
V
4
A
5
W
1
W
Storage temperature range
-40 to +150
°C
Operating junction temperature range
-40 to +150
°C
VDSM/VRSM
Non Repetitive peak off-state voltage
IGM
Peak gate current
PGM
Maximum gate power dissipation
Tj
A
Tc = 139 °C
Repetitive peak off-state voltage
Tstg
Unit
RMS on-state current (full sine wave)
VDRM/VRRM
PG(AV)
Value
tp = 10 ms, Tj = 25 °C
tp = 20 µs, Tj = 150 °C
Tj = 150 °C
Average gate power dissipation
A
Table 2. Electrical characteristics (Tj = 25 °C, unless otherwise specified)
Symbol
Test conditions
Quadrants
Value
Unit
Min.
5
mA
Max.
35
mA
IGT
VD = 12 V, RL = 30 Ω
I - II - III
VGT
VD = 12 V, RL = 30 Ω
I - II - III
Max.
1.3
V
VGD
VD = VDRM, RL = 3.3 kΩ
I - II - III
Min.
0.15
V
I - III
Max.
50
mA
II
Max.
80
mA
Max.
35
mA
IL
IH
(1)
dV/dt (1)
(dl/dt)c (1)
IG = 1.2 x IGT
Tj = 150 °C
IT = 500 mA, gate open
VD = VR = 536 V, gate open
Tj = 150 °C
Min.
2000
V/µs
Without snubber network
Tj = 150 °C
Min.
8
A/ms
1. For both polarities of A2 referenced to A1.
DS13570 - Rev 2
page 2/12
T835H-8G
Characteristics
Table 3. Static characteristics
Symbol
VTM
(1)
VTO (1)
(1)
RD
IDRM/IRRM
Tj
Test conditions
Value
Unit
ITM = 11 A, tp = 380 µs
25 °C
Max.
1.50
V
Threshold voltage
150 °C
Max.
0.83
V
Dynamic resistance
150 °C
Max.
45
mΩ
1.5
µA
3.5
mA
1.3
mA
Value
Unit
Max.
1.2
°C/W
Typ.
45
°C/W
25 °C
VD = VR = VDRM = VRRM
150°C
VD = VR = 400 V, peak voltage
150 °C
Max.
Max.
1. For both polarities of A2 referenced to A1.
Table 4. Thermal resistance
Symbol
Rth(j-c)
Rth(j-a)
Parameter
Junction to case (AC)
Junction to ambient (SCU
(1)
=2
cm2)
1. Scu : copper pad surface under tab, 35 μm copper thickness on FR4 PCB.
DS13570 - Rev 2
page 3/12
T835H-8G
Characteristics (curves)
1.1
Characteristics (curves)
Figure 1. Maximum power dissipation versus on-state
RMS current (full cycle)
Figure 2. On-state RMS current versus case temperature
(full cycle)
P(W)
IT(RMS)(A)
9
10
8
α = 180°
8
7
α = 180°
6
6
5
4
4
3
2
2
180°
α
0
0
4
2
1
α
IT(RMS)(A)
Tc(°C)
0
4
6
0
8
25
50
75
100
125
150
Figure 3. On-state RMS current versus ambient
temperature (free air convection)
Figure 4. On-state characteristics (maximum values)
IT(RMS)(A)
100
ITM(A)
Tj max.
Vto = 0.83 V
Rd = 45 mΩ
3.5
α = 180°
3
2.5
Tj = 25 °C
10
2
Tj = 150 °C
1.5
1
0.5
Ta(°C)
0
0
25
50
75
100
125
150
Figure 5. Relative variation of thermal impedance versus
pulse duration
1.0E+00
VTM(V)
1
0
1
1.5
2
2.5
3
3.5
4
4.5
Figure 6. Recommended maximum case-to-ambient
thermal resistance versus ambient temperature for
different peak off-state voltages
K = [Zth/Rth]
70
Zth(j-c)
0.5
Rth(c-a) (°C/W) (for heatsink sizing to avoid thermal runaway)
VD = V R
=400 V
VD = V R
= 600 V
60
VD = V R
= 800 V
50
1.0E-01
Zth(j-a)
40
30
1.0E-02
20
10
tp(s)
1.0E-03
1.0E-03
DS13570 - Rev 2
1.0E-02
1.0E-01
1.0E+00
Ta (°C)
1.0E+01
1.0E+02
1.0E+03
0
20
40
60
80
100
120
140
page 4/12
T835H-8G
Characteristics (curves)
Figure 7. Thermal resistance junction to ambient versus
copper surface under tab
Figure 8. Relative variation of leakage current versus
junction temperature for different values of blocking
voltage
Rth(j-a) (°C/W)
80
Epoxy printed circuit board FR4, eCu = 35 µm
1.0E+00
D²PAK
IDRM/IRRM [Tj, VDRM/VRRM] / IDRM/IRRM [Tj max.,800 V]
70
1.0E-01
60
VD = VR = 800 V
50
1.0E-02
40
VD = VR = 600 V
30
1.0E-03
20
SCu (cm²)
10
1.0E-04
0
0
5
10
15
20
25
30
35
40
Tj(°C)
1.0E-05
25
Figure 9. Relative variation of gate trigger voltage and
current versus junction temperature (typical values)
75
100
125
150
Figure 10. Relative variation of holding current and
latching current versus junction temperature (typical
values)
IGT,VGT[Tj] / IGT,VGT[Tj = 25 °C]
IH,IL [Tj] / IH,IL [Tj = 25 °C]
2
1.6
IGT Q3
1.5
50
IGT Q1-Q2
1.2
VGT
1
0.8
IL
0.5
IH
0.4
Tj (°C)
Tj (°C)
0
-50
-25
0
25
50
75
100
125
150
0
-50
Figure 11. Surge peak on-state current versus number of
cycles
-25
0
25
50
75
100
125
150
Figure 12. Non repetitive surge peak on-state current for a
sinusoidal pulse with width tp < 10 ms
ITSM(A)
ITSM(A)
1000
90
Tj initial = 25 °C
80
t =20ms
70
Non repetitive
Tj initial = 25 °C
60
dl/dt limitation: 100 A/µs
One cycle
I
TSM
50
100
40
30
Repetitive
Tc = 139°C
20
10
Number of cycles
0
1
DS13570 - Rev 2
10
100
1000
10
0.01
t (ms)
p
0.10
1.00
10.00
page 5/12
T835H-8G
Characteristics (curves)
Figure 13. Relative variation of static dV/dt immunity
versus junction temperature
4
dV/dt [Tj] / dV/dt [Tj = 150 °C]
Figure 14. Relative variation of critical rate of decrease of
main current versus junction temperature
14
VD = VR = 536 V
3
(dl/dt)c [Tj] / (dl/dt)c [Tj = 150 °C]
12
10
8
2
6
4
1
2
Tj(°C)
0
25
DS13570 - Rev 2
Tj(°C)
0
50
75
100
125
150
25
50
75
100
125
150
page 6/12
T835H-8G
Package information
2
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.
2.1
D²PAK package information
•
•
•
ECOPACK2 compliant
Lead-free package leads finishing
Molding compound resin is halogen-free and meets UL94 flammability standard level V0
Figure 15. D²PAK package outline
A
E
E1
E2
H
D
D1
L2
c2
2
3
D2
L3
1
b2
b
e
Max resin gate protrusion: 0.5 mm (1)
G
A1
A2
A3
L
R
Gauge Plane
V2
c
(1) Resin gate is accepted in each of position shown on the drawing, or their symmetrical.
DS13570 - Rev 2
page 7/12
T835H-8G
D²PAK package information
Table 5. D²PAK package mechanical data
Dimensions
Inches(1)
Millimeters
Ref.
Min.
Typ.
Max.
Min.
Typ.
Max.
A
4.30
4.60
0.1693
0.1811
A1
2.49
2.69
0.0980
0.1059
A2
0.03
0.23
0.0012
0.0091
A3
0.25
0.0098
b
0.70
0.93
0.0276
0.0366
b2
1.25
1.7
0.0492
0.0669
c
0.45
0.60
0.0177
0.0236
c2
1.21
1.36
0.0476
0.0535
D
8.95
9.35
0.3524
0.3681
D1
7.50
8.00
0.2953
0.3150
D2
1.30
1.70
0.0512
0.0669
e
2.54
E
10.00
10.28
0.3937
0.4047
E1
8.30
8.70
0.3268
0.3425
E2
6.85
7.25
0.2697
0.2854
G
4.88
5.28
0.1921
0.2079
H
15
15.85
0.5906
0.6240
L
1.78
2.28
0.0701
0.0898
L2
1.19
1.40
0.0468
0.0551
L3
1.40
1.75
0.0551
0.0689
R
V2(2)
0.10000
0.40
0°
0.0157
8°
0°
8°
1. Dimensions in inches are given for reference only
2. Degrees
DS13570 - Rev 2
page 8/12
T835H-8G
D²PAK package information
Figure 16. D²PAK recommended footprint (dimensions are in mm)
16.90
10.30
5.08
1.30
8.90
3.70
Figure 17. D²PAK stencil definitions (dimensions are in mm)
DS13570 - Rev 2
page 9/12
T835H-8G
Ordering information
3
Ordering information
Figure 18. Ordering information scheme
T
8 35
H -
8
G - TR
Series
T = Triac
RMS current
8=8A
Gate triggering current
35 = 35 mA
High temperature
H = High noise immunity and robust commutations
Voltage
8 = 800 V
Package
G = D²PAK
Packing
TR = Tape and reel
Blank = Tube
Table 6. Ordering information
Order code
T835H-8G-TR
T835H-8G
DS13570 - Rev 2
Marking
Package
Weight
T835H-8G
D2PAK
1.6 g
Base qty.
Delivery mode
1000
Tape and reel 13”
50
Tube
page 10/12
T835H-8G
Revision history
Table 7. Document revision history
DS13570 - Rev 2
Date
Version
Changes
20-Nov-2020
1
Initial release.
11-Dec-2020
2
Updated general description. Inserted STPOWER logo.
page 11/12
T835H-8G
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products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2020 STMicroelectronics – All rights reserved
DS13570 - Rev 2
page 12/12
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