TCPP02-M18

TCPP02-M18 Datasheet USB Type-C™ protection for source application Features • • • • • • Externally programmable VBUS over current protection (OCP) Integrated charge pump and gate driver for external N-channel MOSFET VBUS current sense and amplifier with analog output Integrated discharge on VBUS and VCONN Over temperature protection Over voltage protection (OVP) on CC lines against short-to-VBUS • VCONN OCP (100 mW max), OVP (6 V max) • ESD protection for CC1, CC2, compliant with IEC 61000-4-2 Level 4 (±8 kV contact discharge, ±15 kV air discharge) Compliant with PPS (programmable power supply) Product labels • • • • • I2C communication, with two I2C addresses available Junction temperature from -40 °C to 125 °C Compliant with USB-C power delivery standard 3.1, standard power range (SPR), up to 100 W ECOPACK2 compliant Applications Product status link TCPP02-M18 Expansion board X-NUCLEO-SRC1M1 Software example code X-CUBE-TCPP I2C address 0110 10x (LSB = ‘x’) ST reference design STEVAL-2STPD01 • • • USB-C chargers, adapters, power sharing adapters, battery charger Wall plugs, car charger, PoE to USB-C adapter, power bank Desktop, monitor, docking, USB hub, dual-port charger Description The TCPP02-M18 is a MCU companion chip enabling cost-effective USB-C source solution. It provides protections and functionalities to safely comply with the USB-C specification. On provider path, TCPP02-M18 drives external N-channel MOSFET to ensure overcurrent protection on VBUS pin, as well as a discharge path. It features an analog current sense and amplifier with an output accessible for a MCU ADC, thus minimizing system cost. The TCPP02-M18 features 24 V tolerant ESD protection as per IEC61000-4-2 level 4 on USB Type-C™ connector communication channel pins (CC). Also, it provides overvoltage protection on CC1 and CC2 pins when these pins are subjected to short circuit with the VBUS pin that may happen when removing the USB Type-C™ cable from its receptacle. TCPP02-M18 embeds I2C slave registers with two possible addresses, ideal for dual-port chargers or multiple port applications. DS13787 - Rev 4 - May 2022 For further information contact your local STMicroelectronics sales office. www.st.com TCPP02-M18 Pinout and functions 1 Pinout and functions Figure 1. QFN-18L 3.5 x 3.5 x 0.55 mm (top view) Table 1. Pinout and functions DS13787 - Rev 4 Name Pin # Type EN 1 Input CC1 2 VCC_VCONN 3 CC2 4 IANA 5 Output VBUS current analog measurement. GATE 6 Output Gate driver provider: gate pin of external N-channel MOSFET. SRC 7 Input Gate driver provider: source pin of external N-channel MOSFET. VBUSc 8 Input VBUS connector side. Isense 9 Input VBUS current measurement. GND 10 GND Ground. CC2c 11 CBIAS 12 CC1c 13 GND 14 GND Ground. I2C_ADD 15 Input Least significant bit on I2C address. Connected to GND or 1.8 V / 3.3 V. SDA 16 Input / Output Serial data line on I2C bus. SCL 17 Input / Output Serial clock line on I2C bus. FLGn 18 Output GND EP GND Description Enable pin. Input / Output Configuration channel 1 pin on USB-C controller side. Power Power supply for VCONN power pin. Connect to 3.3 V or 5.5 V. Input / Output Configuration channel 2 pin on USB-C controller side. Input / Output Configuration channel 2 pin on USB-C connector side. Output ESD capacitor. Input / Output Configuration channel 1 pin on USB-C connector side. Open-drain output flag (active low). Floating when not connected. Ground exposed pad. page 2/27 TCPP02-M18 Block diagram 2 Block diagram Figure 2. TCPP02-M18 functional block diagram Figure 3. Internal block diagram DS13787 - Rev 4 page 3/27 TCPP02-M18 Typical USB-C source application block diagram 3 Typical USB-C source application block diagram Figure 4. Typical application example Please refer to X-NUCLEO-SRC1M1 documentation (databrief, quick start guide, user manual, schematic and BOM) for detailed application usage of TCPP02-M18 and selection of external components. External components are described in External components description. Please refer to TA0357 for an overview of USB Type-C™ and power delivery technologies. Please refer to AN5225 for more informations related to USB Type-C™ power delivery using STM32xx Series MCUs and STM32xxx series MPUs. For more information on EMI filtering and ESD protection of USB datalines, please refer to AN4871: USB Type-C™ protection and filtering. DS13787 - Rev 4 page 4/27 TCPP02-M18 Electrical specification 4 Electrical specification 4.1 Parameter conditions Unless otherwise specified: • • • 4.2 All voltages are referenced to GND The minimum and maximum values are guaranteed in the worst conditions of operating temperature, supply voltage and frequencies, by tests in production on 100 % of the devices Typical values are given only as design guidelines and are not tested Absolute maximum ratings Stresses above the absolute maximum ratings listed in the tables below, may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Table 2. Absolute maximum ratings (across junction temperature range) Symbol Parameter VPOWER Voltage for power pins VIN Voltage for input pins VOUT Pin name Voltage for output pins VI/O Voltage for input, output pins Rthj-a Junction to ambient thermal resistance Value Unit VCC_VCONN 7 VDC EN, I2C_ADD 7 VBUSc, Isense, SRC 24 IANA, FLGn 7 CBIAS, GATE 24 SDA,SCL, CC1,CC2 7 CC1c,CC2c 24 VDC VDC VDC 150 °C/W TJ Junction temperature range -40 to +125 °C TSTG Storage temperature range -55 to +150 °C Table 3. ESD ratings (across junction temperature range) Symbol Description Pins System level ESD robustness on USB Type-C™ connector VESD_c CC1c, CC2c IEC61000-4-2 Level 4, contact discharge IEC61000-4-2 Level 4, air discharge VHBM Value Unit 8 kV side(1) 15 VESD ratings human body model (JESD22-A114D, level 2) All pins 2 kV 1. Internal ESD protection functionality is associated with external capacitor connected on pin CBIAS. Note: for more information on IEC61000-4-2 standard testing, please refer to AN3353. 4.3 Recommended operating conditions Table 4. Recommended operating condition, across junction temperature range DS13787 - Rev 4 Pin name Min. VCC_VCONN, CC1, CC2 EN, IANA, I2C_ADD, SDA, SCL, FLGn Typ. Max. Unit 2.7 5.5 V 1.7 3.6 V page 5/27 TCPP02-M18 Power supply (VCC_VCONN, VBUSc) 4.4 Pin name Min. CC1c, CC2c, VBUSc, ISENSE, SRC 0 Typ. Max. Unit 22 V Power supply (VCC_VCONN, VBUSc) Table 5. Electrical characteristics – Power supply (VCC_VCONN, VBUSc) across Tj Symbol Parameter ICC_VCONN Vcc supply current Ienable Supply current of EN pin TDIS_VBUSc VBUSc discharge time(1) Test condition across TOP Value Min. Typ. Unit Max. Normal mode 2.7 mA Low power mode 1 µA Low power mode 1.7 V - 2.7 V 3 µA Low power mode 2.7 V - 3.6 V 10 µA 220 ms 1. Equivalent discharge resistor is 2.5 kΩ typical. 4.5 VBUS OCP Table 6. Electrical characteristics for VBUS (OCP, gate driver, current monitoring) across Tj Symbol VGS VTH_OCP_VBUS Parameter Test condition across TOP Value Typ. Max. Gate to source voltage consumer VBUSc = 5 V - 20 V 4.5 5 5.5 V VBUS OCP threshold voltage 35 42 45 mV 3 8 µs 42 45 V/V 1.7 1.95 V 1 3 ms Across sense resistor Rs TOFF_OCP_VBUS VBUS OCP response time Iana_gain VIANA TON 4.6 Unit Min. Current sensing gain 39 IANA pin typical voltage during OCP event on VBUS line VBUS turn-on time CC lines OVP and ESD Table 7. Electrical characteristics: CC lines OVP (CC refers to CC1 and CC2) across Tj Symbol RON_CC ON resistance of CC OVP FET CON_CC Equivalent ON capacitance of CCx line in normal mode VTH_CC CC OVP threshold voltage TOVP_CC OVP response time on the CC pins BWCCx DS13787 - Rev 4 Parameter Bandwidth on CCx pins Test condition across TOP Value Min. Typ. Max. Normal mode 0.7 1.5 Unit Ω Low power mode 8 17 28 0 - 1.2 V, f = 400 kHz 40 60 100 pF 5.5 5.75 6 V 60 100 ns at -3dB and 0 - 1.2 V 10 MHz page 6/27 TCPP02-M18 VCONN OCP, discharge 4.7 VCONN OCP, discharge Table 8. Electrical characteristics VCONN switch (OCP, discharge) across Tj Symbol RON_VCONN IVCONN Test condition across TOP ON resistance of VCONN FET Current thru VCONN FET max operating current Value Min. Typ. Max. 2.1 3 Unit 5.5 Ω 40 mA VCONN = 3.0 V - 5.5 V Rdis-vconn VCONN discharge resistor 2.5 4 5 kΩ OCPTH_VCONN OCP threshold on VCONN 40 47 55 mA 0.9 2 µs TOCP_VCONN 4.8 Parameter VCONN OCP response time I2C slave Table 9. Electrical characteristics I2C adressing across Tj Symbol I2C speed DS13787 - Rev 4 Parameter Test condition across TOP Value Min. Typ. Max. 1 Unit Mbps page 7/27 TCPP02-M18 Typical electrical characteristics curves 5 Typical electrical characteristics curves Figure 5. CC line (CC1 or CC2) OVP response time Note: DS13787 - Rev 4 Test conditions for Figure 5: TCPP02-M18 in normal mode VCC_VCONN = +5 V, ENABLE = 3.3 V, VBUS = 0 V. page 8/27 TCPP02-M18 Functional description 6 Functional description 6.1 Overview The TCPP02-M18 is a cost effective solution to protect microcontrollers featuring built-in USB-C power delivery (UCPD) controller or other low voltage power delivery controller. Please refer to TA0357 for an overview of USB Type-C™ and power delivery technologies. Please refer to AN5225 for more informations related to USB Type-C™ power delivery using STM32xx Series MCUs and STM32xxx series MPUs. 6.2 Power modes The TCPP02-M18 embeds three distinct power modes controlled by the UCPD controller via the I2C bus. Figure 6. Power modes process Start-up No DC current on ENABLE No DC current on VCC_VCONN Hibernate: • No power source I2C command Unattached State Low power: • PD communication impracticable Low DC current on ENABLE No DC current on VCC_VCONN I2C command Attached State DS13787 - Rev 4 Normal: • Full performances Normal DC current on ENABLE Normal DC current on VCC_VCONN page 9/27 TCPP02-M18 Power modes Table 10. Power mode versus power supply VCC_VCONN ENABLE IDC VCC_VCONN IDC ENABLE Mode 0 µA(1)(2) OFF (reset) Comments Gate driver OFF / CC switches OFF X 0V 0 µA(2) FLGn inactive I2C inactive / I2C registers reset X X 3.3 V ±10% 5 V ±10% 1.8 V ±5% 3.3 V ±10% 1.8 V ±5% 3.3 V ±10% 1.8 V ±5% 3.3 V ±10% 0 µA(2) 0 µA(1)(2) Hibernate < 10 µA (1)(2) Low power I2C active Default state at start-up High ohmic CC => PD communication not possible 0 µA(2) (3) OVP protection by clamping I2C active Full performance mode 2.7 mA < 30 µA(1)(2) Normal I2C active FLGn indicates failures 1. Dynamic current of I2C interface have to be added to the values indicated when the I2C bus is used. 2. ESD leakage current have to be added to the values indicated. 3. For pin EN voltage between 1.7 V and 3.6 V. Table 11. TCPP02-M18 states versus power modes DS13787 - Rev 4 OCP VBUS VCONN VBUS Dis. Comment OFF OFF OFF OFF TCPP not powered VBUS connect ON OFF OFF OFF Default state at start-up OFF VBUS connect ON OFF OFF OFF Signaling only Controlled by I2C Failure flags ON ON ON Power mode CC switches OVP CC Gate driver provider FLGn OFF OFF NA OFF VBUS connect Hibernate OFF NA OFF Low power High ohmic 5V clamp Normal Full perf. Active OVP I2C IANA Controlled by PD communication I2C active page 10/27 TCPP02-M18 I2C registers 6.3 I2C registers The I2C address used by TCPP02-M18 is 0110 10x, with LSB = ‘x’. The LSB bit of the I2C address is set when connecting TCPP02-M18 pin I2C_ADD to GND (for LSB = ‘0’) or to 1.8 V or 3.3 V (for LSB = ’1’). Figure 7. I2C registers I2C address : 0110 10x, x=LSB VCONND=1: • VCONN discharge ON VCONND=0: • VCONN discharge OFF VCONN DISCHARGE (VCONND) VBUS DISCHARGE (VBUSD) Reading register n°1 (address = 1) Flags are set to '1' when active VCONN DISCHARGE Acknowledge Reading register n°2 (address = 2) Flags are set to '1' when active 0 => TCPP03 1 => TCPP02 Writing register (address = 0) Bit 7 DS13787 - Rev 4 VBUSD=1: • VBUS discharge ON VBUSD=0: • VBUS discharge OFF PM2 PM1 Power Mode 0 0 Hibernate 1 0 Low power 0 1 Normal 1 1 Not Used GDP=1: • Switch load closed GDP=0: • Switch load opened PM2 Power Mode 2 PM1 Power Mode 1 1 VBUS DISCHARGE Acknowledge PM2 Acknowledge PM1 Acknowledge 0 at start-up else acknowledge 0 FLGn VBUS_OK FLGn OVP_CC Bit 6 Bit 5 Bit 4 FLGn OTP Bit 3 Gate Driver Provider (GDP) Gate Driver Provider Acknowledge Not used Bit 2 VCONN switch V2 V1 VC2 VC1 0 0 Open Open 1 0 Close Open 0 1 Open Close 1 1 Open Open V2 VCONN2 Acknowledge V1 VCONN1 Acknowledge FLGn FLGn OCP_VBUS OCP_VCONN Bit 1 Bit 0 page 11/27 TCPP02-M18 Protection features 7 Protection features TCPP02-M18 embeds protection features for source applications, as required by: • • • 7.1 USB-C specification USB power delivery specification 3.1 International electrotechnical commission (IEC) FLGn pin description FLGn pin is an open-drain output flag in steady state, it must be left floating when not connected. In normal mode, FLGn indicates an error (OVP, OCP or OTP): I2C registers must be read to identify the error. Recovery for each error type is described in each section of below paragraphs. 7.2 How to protect against ESD (electrostatic discharge) applied on the USB TypeC™ connector? Electrostatic discharges can be conducted by the USB Type-C™ connector and damage the electronic circuitry of the application. The international electrotechnical commission modelize the ESD surge waveform in the specification IEC61000-4-2. The TCPP02-M18 integrates ESD protection for CC1 and CC2 lines up to +8 kV contact discharge, associated with an external 100 nF - 50 V capacitor on CBIAS pin. Please refer to AN4871 USB Type-C™ protection and filtering to apply a required protection to comply with the IEC61000-4-2 specification. For more information on IEC61000-4-2 standard testing, please refer to the STMicroelectronics application note AN3353. 7.3 VBUS management Until now, it was common to find the protection circuit inside a controller dedicated to USB-C power delivery. However, by supporting USB-C PD with an embedded module inside an MCU and a companion Type-C port protection device, you can lower your bill of material and facilitate the transition , without requiring an expensive USB-C PD ASIC controller. One of the reasons the MCU and TCPP02-M18 bundle is such a compelling financial proposition is that the latter device integrates the VBUS gate drivers, which enables the use of cheaper and smaller N-MOSFETs, instead of the P-MOSFETs usually used by ASIC controllers. 7.4 VBUS current sense (IANA pin) The IANA output pin is active only in normal mode. The IANA output can be connected directly to the STM32 ADC input because it is internally biased by EN pin. The IANA output voltage level is about 1.7 V at the OCP tripping level allowing connection to 1.8 V MCU I/O pin. DS13787 - Rev 4 page 12/27 TCPP02-M18 VBUS analog current measurement and OCP 7.5 VBUS analog current measurement and OCP VBUS OCP threshold is set by external serial resistor on VBUS. The gain for the analog reading is set to 42 V/V. The OCP threshold is set to 0.042 V across Rs. The OCP VBUS is biased by VCC_VCONN and works only in normal mode. Equivalent block diagram in TCPP02-M18 for VBUS analog current measurement and OCP is given here after: Figure 8. Equivalent block diagram in TCPP02-M18 =external resistance R SR =Sexternal resistance High side amplifier OCP Analog IANA reading + 42 V/V DIR + 1.8 V FLT_OCP - Provider path RS VBUSc VBUSc ISENSE (+) (-) OCP VBUS VCC_VCONN Table 12. Recommended values Typical current VBUS OCP threshold Rs - Sense resistor (normalized values) 0.5 A 0.9 A 47 mΩ 1.5 A 1.9 A 22 mΩ 3.0 A 4.2 A 10 mΩ 5.0 A 6.0 A 7 mΩ The OCP is biased continuously: inrush current magnitude is controlled by the user through an external capacitor. Please refer to the X-NUCLEO-SRC1M1 user manual for more informations on external capacitor to control the insrush current magnitude. If an OCP event occurs: • VCONN switches, CC switches and gate drivers are shutting down • • During up to 40 µs typ., this OCP alarm is held (no recovery is possible) After this delay, CC switches are turned ON but VCONN switches and gate drivers are held OFF The system can be restarted only with a recovery word send by the MCU via the I2C bus. • The FLGn signal stays low while the recovery word has not been sent The recovery word is described in next paragraph DS13787 - Rev 4 page 13/27 TCPP02-M18 VBUS analog current measurement and OCP Figure 9. Typical chronograms of TCPP02-M18 VBUS OCP Over current VBUS current Gate driver OFF ON NORMAL OCP switch closed SYSTEM ON TCPP ALARM HOLDING OCP switch open System OFF ALARM HOLDING System is waiting recovery word up to 40 us Note: • • In case of VBUS OCP event, the TCPP02-M18 switches OFF all active functions except CC switches: – VCONN switches – – VBUS gate driver VCONN and VBUS discharge paths are activated It is signaled to the user by several ways: – – • I2C corresponding state bits are cleared (i.e. VCONN1_ACK = 0, VCONN2_ACK = 0…) I2C relevant OCP flag is set (FLGn_OCP_VBUS is the OCP event coming from VBUS switch for example) – Failure flag pin (FLGn) is active (i.e. in LowZ state) After a delay of up to 40 µs, to recover, the below bit sequence has to be written and after recovery, the user can resume a start-up procedure: Table 13. VBUS OCP recovery bit sequence table DS13787 - Rev 4 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 0 0 PM2 PM1 1 0 0 0 page 14/27 TCPP02-M18 VCONN OCP 7.6 VCONN OCP • • • At start-up, a soft start sets the tripping current to about 590 mA during 512 µs min. (1ms max.) After this delay, the soft start is ended and the normal OCP threshold occurs (50 mA). If an OCP event occurs: – VCONN switches, CC switches and gate drivers are shutting down – – During up to 40 µs typical, this OCP alarm is held (no recovery is possible) After this delay, CC switches are turned ON but VCONN switches and gate drivers are held OFF. The system can be restarted only with a recovery word send by the MCU via the I2C bus. The FLGn signal stays low as long as the recovery word has not been sent – Figure 10. VCONN OCP chronograms Inrush current Over current VCONN current VCONN switch State OFF ON Soft start NORMAL ALARM HOLDING SYSTEM ON SYSTEM ON System OFF OCP threshold is set to 590 mA OCP threshold is set to 47mA typ. OCP switch open 512 µs (typ.) ALARM HOLDING OCP switch open System is waiting recovery word (CC switches ON) up to 40 µs typ To recover, the below bit sequence has to be written and after recovery, the user can resume a start-up procedure: Table 14. VBUS OCP recovery bit sequence table Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 0 0 PM2 PM1 1 0 0 0 7.7 VCONN CC line OVP 7.7.1 CC lines short to VBUS USB Type-C™ standard specifies a pitch of 0.5 mm between connector pins (see figure 3-1 USB Type-C™ receptacle interface dimensions in USB Type-C cable and connector specification). VBUS pin being adjacent to the CC pins, when removing the USB Type-C™ plug from the connector, VBUS can be shorted to CC lines and apply a voltage higher than specified for CC lines. Over voltage protection is needed on the CC lines because VBUS typical voltage can be as high as 20 V when CC pins are usually 5 V tolerant I/Os on low voltage USB-PHY controllers. TCPP02-M18 integrate this protection against CC lines short to VBUS thanks to an overvoltage protection (integrated FET). When the voltage on the CC line goes above VTH_CC, the OVP on CC line turns-on in less than 60ns (TOVP_CC typical value) and FLGn pin goes to '0' state. When the OVP event disappears, the OVP on the CC line is turned-off and the FLGn pin goes back to 'Hi-Z' state. DS13787 - Rev 4 page 15/27 TCPP02-M18 VBUS discharge 7.8 VBUS discharge VBUS discharge is activated via I2C bus and controlled via firmware by the USB-C power delivery controller. The VBUS discharge feature integrated in TCPP02-M18 allows to discharge 10 µF in less than 220 ms (TDIS_VBUS). This discharge time is in line with USB-C specification, extracted below for VBUS discharge: Table 15. Common source electrical parameters from USB-C specification 7.9 Parameter Description Min. Typ. Max. Units tSafe0V Time to reach vSafe0V max. - - 650 ms tSafe5V Time to reach vSafe5V max. - - 275 ms VCONN discharge VCONN discharge is activated via I2C bus and controlled via firmware by the USB-C power delivery controller. The VCONN discharge feature integrated in TCPP02-M18 allows to discharge VCONN in RDIS_VCONN < 5.5 kΩ, as per USB-C specification table extracted below: Table 16. VCONN source characteristics from USB-C power delivery specification Minimum Rdch Note: 7.10 30 Ω Maximum Notes 6120 Ω Discharge resistance applied in UnattachedWait.SRC between the CC pin being discharged and GND. • VCONN discharge is activated and stopped via I2C commands from USB-PD controller • To avoid short-circuit, VCONN discharge cannot be activated if VCONN switch are closed • The CCxc pin discharged is the last one acting as VCONN OTP (over temperature protection) Above 150°C typ., the OTP triggers the FLGn pin. OVP and OCP on VCONN, CC lines, VBUS are shut down. Auto recovery is ensured when the temperature goes back below OTP threshold. DS13787 - Rev 4 page 16/27 TCPP02-M18 Application example 8 Application example 8.1 X-NUCLEO-SRC1M1 The X-NUCLEO-SRC1M1 expansion board allows evaluating the features of the TCPP02-M18 for the USB Type-C™ and the protections for VBUS and CC lines suitable for source applications. Please refer to X-NUCLEO-SRC1M1 documentation (databrief, quick start guide, user manual, schematic and BOM) for detailed application usage of TCPP02-M18 and selection of external components. 8.2 STEVAL-2STPD01 The STEVAL-2STPD01 is an evaluation kit composed of an expansion board containing two Type-C ports and integrating two STPD01PUR programmable buck converters for USB Power Delivery, and the NUCLEO-G071RB STM32 Nucleo-64 development board. The expansion board has been specifically developed to be stacked on the NUCLEO-G071RB development board using the capability of its microcontroller to manage two UCPD peripherals at the same time. It also embeds the TCPP02-M18 USB Type-C port protection for Source applications and the L7983PU50R synchronous step-down switching regulator. Please refer to STEVAL-2STPD01documentation (databrief, quick start guide, user manual, schematic) for detailed USB-C PD with power sharing using TCPP02-M18. 8.3 PCB routing When routing the TCPP02-M18, please respect the following recommendation: • • DS13787 - Rev 4 Place the circuit as close as possible to the USB-C connector in order to maximize the efficiency of the ESD protection for CC lines Place the ESD capacitor as close as possible to the TCPP02-M18 page 17/27 TCPP02-M18 USB Type-C™ port protection (TCPP) comparison table 9 USB Type-C™ port protection (TCPP) comparison table Table 17. Device comparison table Part number Expansion board TCPP01-M12 TCPP02-M18 SW expansion board USB Type-C™ application Package X-NUCLEO-SNK1M1 Sink, UFP, consumer QFN-12L X-NUCLEO-SRC1M1 Source, DFP, provider QFN-18L X-CUBE-TCPP TCPP03-M20 X-NUCLEO-DRP1M1 DRP, dual role power DRD, dual role data QFN-20L Sink requiring current sense and OCP DS13787 - Rev 4 page 18/27 TCPP02-M18 Package information 10 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 10.1 QFN18L 3.5x3.5 mm package information Figure 11. QFN18L 3.5x3.5 mm package outline DS13787 - Rev 4 page 19/27 TCPP02-M18 QFN18L 3.5x3.5 mm package information Table 18. QFN18L 3.5x3.5 mm mechanical data Dimensions Millimeters Ref. Min. Typ. Max. A 0.51 0.55 0.60 A1 0.00 0.02 0.05 b 0.18 0.25 0.30 D D2 3.50 1.99 E E2 2.14 2.24 3.50 1.99 e 2.14 2.24 0.50 L 0.30 K 0.20 0.40 aaa 0.05 bbb 0.10 ccc 0.10 ddd 0.05 eee 0.08 0.50 Figure 12. recommended footprint (dimensions are in mm) DS13787 - Rev 4 page 20/27 TCPP02-M18 QFN18L 3.5x3.5 mm package information Figure 13. Tape and reel outline 2.0 Ø 1.5 1.75 4.0 0.30 B0 16.0 8.5 Ø 1.5 0.25 A0 8.0 K0 All dimensions are typical values in mm Ø 1.5 User direction of unreeling Table 19. Tape and reel mechanical data Dimensions Millimeters Ref. Min. Typ. Max. A0 3.76 3.81 3.86 B0 3.76 3.81 3.86 K0 0.71 0.76 0.81 Figure 15. Tape and reel orientation Figure 14. Package orientation in reel DS13787 - Rev 4 page 21/27 TCPP02-M18 QFN18L 3.5x3.5 mm package information Figure 17. Inner box dimensions (mm) Figure 16. Reel dimensions (mm) Figure 18. Marking DS13787 - Rev 4 page 22/27 TCPP02-M18 Ordering information 11 Ordering information Table 20. Ordering information DS13787 - Rev 4 Order code Marking Package Weight Base qty. Delivery mode TCPP02-M18 TCPP2 QFN-18L 3.5 x 3.5 x 0.55 mm 21.7 mg 3000 Tape and reel page 23/27 TCPP02-M18 Revision history Table 21. Document revision history DS13787 - Rev 4 Date Revision Changes 30-Aug-2021 1 Initial release. 04-Oct-2021 2 Updated Features, Table 6, Table 7 and Table 20. 09-May-2022 3 Added Section 8.1 and Section 8.2 . Updated Figure 4. 17-May-2022 4 Updated cover image and added Figure 18. page 24/27 TCPP02-M18 IMPORTANT NOTICE – READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgment. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2022 STMicroelectronics – All rights reserved DS13787 - Rev 4 page 25/27 TCPP02-M18 Contents Contents 1 Pinout and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 3 Typical USB-C source application block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4 Electrical specification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4.1 Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4.2 Absolute maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4.4 Power supply (VCC_VCONN, VBUSc). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4.5 VBUS OCP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4.6 CC lines OVP and ESD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4.7 VCONN OCP, discharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4.8 I2C slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 Typical electrical characteristics curves. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 7 6.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6.2 Power modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6.3 I2C registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 7.1 FLGn pin description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7.2 How to protect against ESD (electrostatic discharge) applied on the USB Type-C™ connector? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7.3 VBUS management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7.4 VBUS current sense (IANA pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7.5 VBUS analog current measurement and OCP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7.6 VCONN OCP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7.7 VCONN CC line OVP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7.7.1 8 CC lines short to VBUS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7.8 VBUS discharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7.9 VCONN discharge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7.10 OTP (over temperature protection) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Application example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 8.1 X-NUCLEO-SRC1M1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 8.2 STEVAL-2STPD01 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 8.3 PCB routing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 DS13787 - Rev 4 page 26/27 TCPP02-M18 Contents 9 USB Type-C™ port protection (TCPP) comparison table . . . . . . . . . . . . . . . . . . . . . . . . . . .18 10 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 10.1 11 QFN18L 3.5x3.5 mm package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 DS13787 - Rev 4 page 27/27