TDA2005R

TDA2005 20 W bridge/stereo amplifier for car radio Datasheet  production data Features ■ High output power: – Po = 10 + 10 W @ RL = 2 , THD = 10 % – Po = 20 W @ RL = 4 , THD = 10 %. ■ Protection against: – Output DC and AC short circuit to ground – Overrating chip temperature – Load dump voltage surge – Fortuitous open ground – Very inductive loads ■ Multiwatt11 Loudspeaker protection during short circuit for one wire to ground Description The TDA2005 is a class B dual audio power amplifier in Multiwatt11 package specifically designed for car radio applications. Table 1. Power booster amplifiers can be easily designed using this device that provides a high current capability (up to 3.5 A) and can drive very low impedance loads (down to 1.6  in stereo applications) obtaining an output power of more than 20 W (bridge configuration). Device summary Order code Package Packing TDA2005R Multiwatt11 Tube September 2013 This is information on a product in full production. Doc ID 1451 Rev 6 1/25 www.st.com 1 Contents TDA2005 Contents 1 Schematic and pins connection diagrams . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.3 Bridge amplifier section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.4 2.3.1 Electrical characteristics (bridge application) . . . . . . . . . . . . . . . . . . . . . . 7 2.3.2 Bridge amplifier design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Stereo amplifier application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.4.1 Electrical characteristics (stereo application) . . . . . . . . . . . . . . . . . . . . . 11 3 Application suggestion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.1 Built-in protection systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.1.1 Load dump voltage surge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.1.2 Short circuit (AC and DC conditions) . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.1.3 Polarity inversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.1.4 Open ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.1.5 Inductive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.1.6 DC voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.1.7 Thermal shut-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.1.8 Loudspeaker protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 2/25 Doc ID 1451 Rev 6 TDA2005 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Electrical characteristics (bridge application) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Bridge amplifier design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 High gain vs. Rx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Electrical characteristics (stereo application) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Recommended values of the component of the bridge application circuit . . . . . . . . . . . . . 15 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Doc ID 1451 Rev 6 3/25 List of figures TDA2005 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. 4/25 Schematic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pins connection diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Test and application circuit (bridge amplifier) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 PC board and components layout of Figure 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Output offset voltage vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Distortion vs. output power (RL = 4 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Distortion vs. output power (RL = 3.2 ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Bridge configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Typical stereo application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Quiescent output voltage vs. supply voltage (stereo amplifier). . . . . . . . . . . . . . . . . . . . . . 12 Quiescent drain current vs. supply voltage (stereo amplifier) . . . . . . . . . . . . . . . . . . . . . . . 12 Distortion vs. output power (stereo amplifier) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Output power vs. supply voltage, RL = 2 and 4 (stereo amplifier). . . . . . . . . . . . . . . . . . 12 Output power vs. supply voltage, RL = 1.6 and 3.2 (stereo amplifier). . . . . . . . . . . . . . . 13 Distortion vs. frequency, RL = 2 and 4 (stereo amplifier) . . . . . . . . . . . . . . . . . . . . . . . . 13 Distortion vs. frequency, RL = 1.6 and 3.2 (stereo amplifier) . . . . . . . . . . . . . . . . . . . . . 13 Supply voltage rejection vs. C3 (stereo amplifier). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Supply voltage rejection vs. frequency (stereo amplifier) . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Supply voltage rejection vs. C2 and C3, GV = 390/1  (stereo amplifier) . . . . . . . . . . . . . 13 Supply voltage rejection vs. C2 and C3, GV = 1000/10  (stereo amplifier) . . . . . . . . . . . 14 Gain vs. input sensitivity RL = 4  (stereo amplifier) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Gain vs. input sensitivity RL = 2  (stereo amplifier) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Total power dissipation and efficiency vs. output power (bridge) . . . . . . . . . . . . . . . . . . . . 14 Total power dissipation and efficiency vs. output power (stereo) . . . . . . . . . . . . . . . . . . . . 14 Bridge amplifier without boostrap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 PC board and components layout of Figure 25 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Low cost bridge amplifier (GV = 42 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 PC board and components layout of Figure 27 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 10 + 10 W stereo amplifier with tone balance and loudness control. . . . . . . . . . . . . . . . . . 18 Tone control response (circuit of Figure 29) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 20 W bus amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Simple 20 W two way amplifier (FC = 2 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Bridge amplifier circuit suited for low-gain applications (GV = 34 dB) . . . . . . . . . . . . . . . . 20 Example of muting circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Suggested LC network circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Voltage gain bridge configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Maximum allowable power dissipation vs. ambient temperature . . . . . . . . . . . . . . . . . . . . 22 Output power and drain current vs. case temperature (RL = 4 ) . . . . . . . . . . . . . . . . . . . 22 Output power and drain current vs. case temperature (RL = 3.2 ) . . . . . . . . . . . . . . . . . . 22 Multiwatt11 mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Doc ID 1451 Rev 6 TDA2005 1 Schematic and pins connection diagrams Schematic and pins connection diagrams Figure 1. Schematic diagram Figure 2. Pins connection diagram (top view)   "//4342!0 /54054  63  /54054  "//4342!0  '.$  ).054  ).054   3622  ).054   ).054 4!"#/..%#4%$4/0). Doc ID 1451 Rev 6 '!0'03 5/25 Electrical specifications TDA2005 2 Electrical specifications 2.1 Absolute maximum ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit Peak supply voltage (50 ms) 40 DC supply voltage 28 Operating supply voltage 18 Output peak current (non repetitive t = 0.1 ms) 4.5 Output peak current (repetitive f 10 Hz) 3.5 Ptot Power dissipation at Tcase = 60 °C 20 W Tstg, Tj Storage and junction temperature -40 to 150 C VS Io(1) V A 1. The max. output current is internally limited. 2.2 Thermal data Table 3. 2.3 Thermal data Symbol Parameter Rth-j-case Thermal resistance junction-to-case max Value Unit 3 C/W Bridge amplifier section Figure 3. Test and application circuit (bridge amplifier) 6S —& K7 2 # ).054  —&  # 6 —& #  —&  #  6  n  #  # 6 2 7 6 2, —&   2 K7 n   6/25 # —& # 6  —& 2 K7 —& Doc ID 1451 Rev 6 # —& 6 # —& 7 2 2 7 2 7 '!0'03 TDA2005 Electrical specifications Figure 4. 2.3.1 PC board and components layout of Figure 3 Electrical characteristics (bridge application) Refer to the bridge application circuit Tamb = 25°C; Gv = 50dB; Rth(heatsink) = 4°C/W unless otherwise specified. Table 4. Symbol Electrical characteristics (bridge application) Parameter Test condition Min. Typ. Max. Unit VS Supply voltage - 8 - 18 V Vos Output offset voltage (between pin 8 and pin 10) VS = 14.4 V VS = 13.2 V - - 150 150 mV mV Total quiescent drain current VS = 14.4 V; RL = 4  VS = 13.2 V; RL = 3.2  - 75 70 150 150 mA mA Output power f = 1 kHz, THD = 10 % VS = 14.4 V; RL = 4  VS = 14.4 V; RL = 3.2  VS = 13.2 V; RL = 3.2  18 20 17 20 22 19 - W f = 1 kHz; VS = 14.4 V; RL = 4 ;Po = 50 mW to 15 W; - - 1 % f = 1 kHz; VS = 13.2 V; RL = 3.2 ;Po = 50m W to 13 W; - - 1 % f = 1 kHz RL = 4 ;Po = 2 W; RL = 3.2 ;Po = 2 W - 9 8 - mW Id Po THD Total harmonic distortion Vi Input sensitivity Ri Input resistance f = 1 kHz 70 - - k fL Low frequency roll off (-3 dB) RL = 3.2  - - 40 Hz fH High frequency roll off (-3 dB) RL = 3.2  20 - - KHz Gv Closed loop voltage gain f = 1 kHz - 50 - dB - 3 10 V 45 55 - dB eN SVR (1) Total Input noise voltage Rg = 10 Supply voltage rejection Vripple = 0.5 V; fripple =100 Hz Rg = 10 k; C4 = 10 F Doc ID 1451 Rev 6 7/25 Electrical specifications Table 4. TDA2005 Electrical characteristics (bridge application) (continued) Symbol Parameter  Test condition Efficiency SVR Tj VOSH Min. Typ. Max. Unit f = 1 kHz; VS = 14.4 V; RL = 4 ;Po = 20 W; RL = 3.2 ;Po = 22 W - 60 60 - f = 1 kHz; VS = 13.2 V; RL = 3.2 ;Po = 19 W - 58 - 30 36 - dB % Supply voltage rejection f = 100 Hz; Vripple = 0.5 V; Rg = 10 k; RL = 4  Thermal shut-down junction temperature f = 1 kHz; VS = 14.4V; RL = 4 ;Ptot = 13 W - 145 - °C Output voltage with one side of the speaker shorted to ground VS = 14.4 V; RL = 4  VS = 13.2 V; RL = 3.2  - - 2 V 1. Bandwidth filter: 22 Hz to 22 kHz. Figure 5. Output offset voltage vs. supply voltage 6OS M6 Figure 6. Distortion vs. output power (RL = 4 ) D  6S6 'VD" 2,7 FK(Z           Figure 7.     6S6  '!0'03 Distortion vs. output power (RL = 3.2 ) D  6S6 'VD" 2,7 FK(Z     8/25  0O7 '!0'03 Doc ID 1451 Rev 6  0O7 '!0'03 TDA2005 2.3.2 Electrical specifications Bridge amplifier design The following considerations can be useful when designing a bridge amplifier. Table 5. Bridge amplifier design Parameter Single ended Bridge Vo max Peak output voltage (before clipping) 1 ---  V s – 2V CEsat  2 V s – 2V CEsat Io max Peak Output current (before clipping) V s – 2V CEsat 1 --- ----------------------------------2 RL V s – 2V CEsat ----------------------------------RL Po max RMS output power (before clipping) 2  V s – 2V CEsat  1 --- -----------------------------------------2R L 4 2  V s – 2V CEsat  -----------------------------------------2R L Where: VCE sat = output transistors saturation voltage VS = allowable supply voltage RL = load impedance Voltage and current swings are twice for a bridge amplifier in comparison with single ended amplifier. In other words, with the same RL the bridge configuration can deliver an output power that is four times the output power of a single ended amplifier, while, with the same max output current the bridge configuration can deliver an output power that is four times the output power of a single ended amplifier, while, with the same max output current the bridge configuration can deliver an output power that is twice the output power of a single ended amplifier. Core must be taken when selecting VS and RL in order to avoid an output peak current above the absolute maximum rating. From the expression for IOmax, assuming VS = 14.4 V and VCE sat = 2 V, the minimum load that can be driven by TDA2005 in bridge configuration is: V s – 2V CEsat – 4- = 2.97 R Lmin = ----------------------------------- = 14.4 -------------------3.5 I Omax The voltage gain of the bridge configuration is given by (see Figure 36): R1 V R G v = ------0- = 1 + -------------------------+ ------3V1  R2  R4  R4  ---------------------  R 2 + R 4 Doc ID 1451 Rev 6 9/25 Electrical specifications TDA2005 For sufficiently high gains (40 to 50 dB) it is possible to put R2 = R4 and R3 = 2R1, simplifying the formula in: R1 G v = 4 ------R2 Table 6. High gain vs. Rx Gv (dB) R1 () R2 = R4 () R3 () 40 1000 39 2000 50 1000 12 2000 Figure 8. Bridge configuration 6O 6I   n n 2, 2 2 2 2 '!0'03 2.4 Stereo amplifier application Figure 9. Typical stereo application circuit 6S —& K7 2 # ).054,  —&  —& #   #  —& —&  # # n K7 —&  2 2 # 7 ).0542 —&   #  # —& 2 —& —&  # 2, 7 # n  K7 —& 2 2 #  10/25 Doc ID 1451 Rev 6 # —& 7 2, 7 2 '!0'03 TDA2005 2.4.1 Electrical specifications Electrical characteristics (stereo application) Refer to the stereo application circuit Tamb = 25 °C; Gv = 50 dB; Rth(heatsink) = 4°C/W unless otherwise specified Table 7. Electrical characteristics (stereo application) Symbol Parameter Test condition Min. Typ. Unit 18 V VS Supply voltage Vo Quiescent offset voltage VS = 14.4 V VS = 13.2 V 6.6 6 7.2 6.6 7.8 7.2 V V Id Total quiescent drain current VS = 14.4 V VS = 13.2 V - 65 62 120 120 mA mA f = 1 kHz; THD = 10 % VS = 14.4 V; RL = 4  VS = 14.4 V; RL = 3.2  VS = 14.4 V; RL = 2  VS = 14.4 V; RL = 1.6  6 7 9 10 6.5 8 10 11 - W f = 1 kHz; THD = 10 % VS = 13.2 V; RL =3.2  VS = 13.2 V; RL = 1.6  6 9 6.5 10 - W 1 % 1 % 1 % 1 % Po Output power (each channel) 8 Max. VS = 16 V; RL = 2  THD Total harmonic distortion f = 1 kHz; VS = 14.4 V; RL = 4 ;Po = 50 mW to 4 W; - f = 1 kHz; VS = 14.4 V; RL = 2 ;Po = 50 mW to 6 W; - f = 1 kHz; VS = 13.2 V; RL = 3.2 ;Po = 50 mW to 3W; - f = 1KHz; VS = 13.2V; RL = 1.6;Po = 40mW to 6W; - - CT Cross talk VS = 14.4 V; Vo = 4 VRMS; Rg = 5 k; RL = 4 ; f = 1 kHz f = 10 kHz Vi Input saturation voltage - Vi Input sensitivity f = 1 kHz; Po = 1W; RL = 4 ; RL = 3.2; Ri Input resistance fL fH Gv 12 0.2 0.3 0.2 0.3 60 45 300 - mW mW - mW - 6 5.5 - mV mV f = 1 kHz 70 200 - k Low frequency roll off (-3 dB) RL = 2  - - 50 Hz High frequency roll off (-3 dB) RL = 2  15 - - kHz Open loop voltage gain f = 1 kHz - 90 - Closed loop voltage gain f = 1 kHz 48 50 51 dB Doc ID 1451 Rev 6 11/25 Electrical specifications Table 7. TDA2005 Electrical characteristics (stereo application) (continued) Symbol Parameter Gv Test condition Min. Typ. Max. Unit Closed loop gain matching - - 0.5 - dB eN Total input noise voltage Rg = 10 k(1) - 1.5 5 V SVR Supply voltage rejection Vripple = 0.5 V; fripple =100 Hz Rg = 10 k; C3 = 10 F; 35 45 - dB f = 1 kHz; VS = 14.4 V; RL = 4 ;Po = 6.5 W; RL = 2;Po = 10 W; - 70 60 - % f = 1 kHz; VS = 13.2 V; RL = 3.2 ;Po = 6.5 W; RL = 1.6 ;Po = 100 W; - 70 60 - %  Efficiency 1. Bandwidth filter: 22 Hz to 22 kHz. Figure 10. Quiescent output voltage vs. supply voltage (stereo amplifier) 6O 6 Figure 11. Quiescent drain current vs. supply voltage (stereo amplifier) )D M!                 6S6  '!0'03      6S6 '!0'03 Figure 12. Distortion vs. output power (stereo Figure 13. Output power vs. supply voltage, amplifier) RL = 2 and 4 (stereo amplifier) D   0O 7 FK(Z 'VD" FK(Z 'VD"  6S62,7 D 6S62,7 2,7   6S62,7  6S62,7 2,7      12/25     0O7 '!0'03 Doc ID 1451 Rev 6      6S6 '!0'03 TDA2005 Electrical specifications Figure 14. Output power vs. supply voltage, Figure 15. Distortion vs. frequency, RL = 2 and RL = 1.6 and 3.2 (stereo amplifier) 4 (stereo amplifier) D  0O 7 FK(Z 'VD"  6S6 ' VD" 2,7 D    0O7 2, 7 2,7     0O7 2, 7       6S6 Figure 16. Distortion vs. frequency, RL = 1.6 and 3.2 (stereo amplifier) D    '!0'03  F(Z '!0'03 Figure 17. Supply voltage rejection vs. C3 (stereo amplifier) 362 D" 6S6 'VD" 6S6 FRIPPLEK(Z 6RIPPLE6 'VD" 2GK7   0O7 2,7         0O7 2,7     F(Z  '!0'03 Figure 18. Supply voltage rejection vs. frequency (stereo amplifier)   #—& '!0'03 Figure 19. Supply voltage rejection vs. C2 and C3, GV = 390/1  (stereo amplifier) 362 D" 362 D" 6S6 2,7 2GK7 'V7 FRIPPLE(Z 6S6 'VD" #—&   #—& #—& 2G     #—& 2GK7        F(Z '!0'03 Doc ID 1451 Rev 6      #—& '!0'03 13/25 Electrical specifications Figure 20. 362 D" TDA2005 Supply voltage rejection vs. C2 and Figure 21. Gain vs. input sensitivity RL = 4  C3, GV = 1000/10  (stereo amplifier) (stereo amplifier)  'V 'V D" 6S6 #—& 2,7 2GK7 'V7 FRIPPLE(Z #—& 636 FK(Z 2,7      #—&  0O7       0O7          #—&  Figure 22. Gain vs. input sensitivity RL = 2  (stereo amplifier) 'V 'V D" 636 FK(Z 2,7        0O7   0TOT H 6S6 2,7 FK(Z 'VD"   0O7                6IM6 0TOT 7  0TOT H 6S6 2,7 FK(Z 'VD"  14/25          0O7   '!0'03 H     Figure 24. Total power dissipation and efficiency vs. output power (stereo)  '!0'03 H     0TOT 7     6IM6 Figure 23. Total power dissipation and efficiency vs. output power (bridge)            '!0'03 '!0'03 Doc ID 1451 Rev 6       0O 7 '!0'03 TDA2005 3 Application suggestion Application suggestion The recommended values of the components are those shown on bridge application circuit of Figure 3. Different values can be used; the following table can help the designer. Table 8. Recommended values of the component of the bridge application circuit Component Recommended value C1 2.2 F Input DC decoupling - - C2 2.2 F Optimization of turn on Pop and turn on Delay High turn on delay High Turn on Pop, Higher low frequency cutoff Increase of Noise C3 0.1 F Supply bypass - Danger of oscillation C4 10 F Ripple rejection Increase of SVR, Increase of the Switchon Time Degradation of SVR C5, C7 100 F Bootstrapping - Increase of distortion at low frequency C6, C8 220 F Feedback input DC decoupling, low frequency cut-off - Danger of oscillation at high frequencies with inductive loads C9, C10 0.1 F Frequency stability - Danger of oscillation R1 120 k Optimization of the output symmetry Smaller Pomax Smaller Pomax R2 1 k - - - R3 2 k - - - R4, R5 12  Closed loop gain setting (see Bridge Amplifier Design(1)) - - R6, R7 1 Frequency stability Danger of oscillation at high frequencies with inductive loads - Purpose Larger than Smaller than r 1. The closed loop gain must be higher than 32 dB. Doc ID 1451 Rev 6 15/25 Application information 4 TDA2005 Application information Figure 25. Bridge amplifier without boostrap 6S —& # —& # ).054 —& #     —&    # n 2 K7 —&  # —& 2 7 # 2, —&   #  2 K7 n  # —&  # —& 7 2 2 7 Figure 26. PC board and components layout of Figure 25 16/25 Doc ID 1451 Rev 6 2 7 '!0'03 TDA2005 Application information Figure 27. Low cost bridge amplifier (GV = 42 dB) 6S —& # —& # —& #     —& # ).054 —&  2 7   # /54 n   7 2 —& # N& # 7 2 n —&  /54   2 7 # # —&  '!0'03 Figure 28. PC board and components layout of Figure 27 Doc ID 1451 Rev 6 17/25 Application information TDA2005 Figure 29. 10 + 10 W stereo amplifier with tone balance and loudness control 6S 6 —& K7 2  ).054, —&  K7 —& N& K7 0 K7 N& —&   —&  # N& 0 n K7  K7 K7 2 K7 —& 2 # 7 0 # —& 7 7 7 7 7 2  —& —&  ).0542 K7  N& K7 0 K7 N& —&   —& n K7  0 # —& 2 # K7 K7 2 —& 7  7 2 N&  —& '!0'03 Figure 30. Tone control response (circuit of Figure 29) D"   -)$  42%",%  "!33     18/25   Doc ID 1451 Rev 6  F(Z '!0'03 TDA2005 Application information Figure 31. 20 W bus amplifier 6S 6 K7 —& —&   K7 —& —&    —&  n —& K7  —& K7 —& 7 7 7 7 7 7 7 7 7 K7 K7 —& K7 7 K7 —& "#  7 - n —& K7 K7 K7 N& —&   —& -)+% —&   K7 P&  —&   —& —& 7 7 '!0'03 Figure 32. Simple 20 W two way amplifier (FC = 2 kHz) 6S 6 —&   —& K 7 2 N&   #  —&  # # n 2 —&  FCK(Z 7//&%2 2 # 7 ).054  N&  7 K7 7 2 —&  # 2 # —& K7 0  # —&  # n K7  2 —& 2 # 7   —& # —& 47%%4%2 7 2  # '!0'03 Doc ID 1451 Rev 6 19/25 Application information TDA2005 Figure 33. Bridge amplifier circuit suited for low-gain applications (GV = 34 dB) 6S —& K7 2 # ).054  —&  # —&  # —&    # n K7 2 # —& —&  2 7 # 7 #  —&  2 7 —&  # 2, 2  2 K7 n # —& #  —&  2 7 2 7 '!0'03 Figure 34. Example of muting circuit     n K 7 n K7 63 -UTE3WITCH '!0'03 4.1 Built-in protection systems 4.1.1 Load dump voltage surge The TDA2005 has a circuit which enables it to withstand voltage pulse train, on Pin 9, of the type shown in Figure 36. If the supply voltage peaks to more than 40 V, then an LC filter must be inserted between the supply and pin 9, in order to assure that the pulses at pin 9 will be held within the limits shown. A suggested LC network is shown in Figure 35. With this network, a train of pulses with amplitude up to 120 V and width of 2 ms can be applied at point A. This type of protection is ON when the supply voltage (pulse or DC) exceeds 18 V. For this reason the maximum operating supply voltage is 18 V. 20/25 Doc ID 1451 Rev 6 TDA2005 Application information Figure 35. Suggested LC network circuit ! &2/3500,9 ,).% ,M( 4/0). # —& 6 '!0'03 Figure 36. Voltage gain bridge configuration 636  TMS TMS  T T T 4.1.2 '!0'03 Short circuit (AC and DC conditions) The TDA2005 can withstand a permanent short-circuit on the output for a supply voltage up to 16 V. 4.1.3 Polarity inversion High current (up to 10 A) can be handled by the device with no damage for a longer period than the blow-out time of a quick 2 A fuse (normally connected in series with the supply). This feature is added to avoid destruction, if during fitting to the car, a mistake on the connection of the supply is made. 4.1.4 Open ground When the ratio is in the ON condition and the ground is accidentally opened, a standard audio amplifier will be damaged. On the TDA2005 protection diodes are included to avoid any damage. 4.1.5 Inductive load A protection diode is provided to allow use of the TDA2005 with inductive loads. 4.1.6 DC voltage The maximum operating DC voltage for the TDA2005 is 18 V. However the device can withstand a DC voltage up to 28 V with no damage. This could occur during winter if two batteries are series connected to crank the engine. Doc ID 1451 Rev 6 21/25 Application information 4.1.7 TDA2005 Thermal shut-down The presence of a thermal limiting circuit offers the following advantages: 1. an overload on the output (even if it is permanent), or an excessive ambient temperature can be easily withstood. 2. the heatsink can have a smaller factor of safety compared with that of a conventional circuit. There is no device damage in the case of excessive junction temperature : all that happens is that Po (and therefore Ptot) and Id are reduced. The maximum allowable power dissipation depends upon the size of the external heatsink (i.e. its thermal resistance); Figure 37 shows the power dissipation as a function of ambient temperature for different thermal resistance. 4.1.8 Loudspeaker protection The circuit offers loudspeaker protection during short circuit for one wire to ground. Figure 37. Maximum allowable power dissipation vs. ambient temperature Figure 38. Output power and drain current vs. case temperature (RL = 4 ) 0TOT 7 0O 7   )D ! 636 2,7 FK(Z )D    7  #  7 H   ).  #     + 7   0O 43 %!  2T   # ( TH )4%  2  &). TH ). 2         4AMB # '!0'03  Figure 39. Output power and drain current vs. case temperature (RL = 3.2 ) )D ! 0O 7 636 2,7 FK(Z   0O   )D      22/25     4CASE # '!0'03 Doc ID 1451 Rev 6     4CASE # '!0'03 TDA2005 5 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 40. Multiwatt11 mechanical data and package dimensions $)- INCH MM -). 490 -!8 -). 490 -!8 !  "   #   $   /54,).%!.$ -%#(!.)#!,$!4!  %    &     '       '       (            (  ,      ,  ,  ,       ,          ,    -       -      3     3     $IA      -ULTIWATT6ERTICAL ( '!0'03 Doc ID 1451 Rev 6 23/25 Revision history 6 TDA2005 Revision history Table 9. 24/25 Document revision history Date Revision Changes 09-Jun-1998 1 Initial release. 20-May-2000 2 Update logo. 10-Sep-2003 3 Update package drawing. 28-Jan-2010 4 Document reformatted. Updated Features, Description and Table 1: Device summary in cover page. 02-May-2012 5 Updated Table 1: Device summary on page 1. 17-Sep-2013 6 Updated Disclaimer. Doc ID 1451 Rev 6 TDA2005 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. 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The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2013 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com Doc ID 1451 Rev 6 25/25