TDA7266D

TDA7266D 5W+5W DUAL BRIDGE AMPLIFIER PRELIMINARY DATA ■ ■ ■ ■ WIDE SUPPLY VOLTAGE RANGE (3.5 - 12V) OUTPUT POWER 5+5W @THD = 10%, R L = 8Ω, VCC = 9.5V TECHNOLOGY BI20II SINGLE SUPPLY MINIMUM EXTERNAL COMPONENTS – NO SVR CAPACITOR – NO BOOTSTRAP – NO BOUCHEROT CELLS – INTERNALLY FIXED GAIN PowerSO20 Slug Down ORDERING NUMBER: TDA7266D ■ STAND-BY & MUTE FUNCTIONS ■ SHORT CIRCUIT PROTECTION ■ THERMAL OVERLOAD PROTECTION designed for LCD TV/Monitor, PC Motherboard, TV and Portable Audio applications. DESCRIPTION The TDA7266D is a dual bridge amplifier specially TEST AND APPLICATION CIRCUIT VCC +5V JP1 R1 47K R2 47K C3 0.22µF IN1 S-GND ST-BY 6 7 + 2 OUT1+ 5 OUT1- 19 OUT2+ 16 OUT2- C2 100nF C7 100nF 13 R3 10K 9 C4 10µF Vref C5 0.22µF IN2 MUTE C1 470µF 15 14 R4 10K 8 + + - C6 1µF 1 10 11 PW-GND 20 + D02AU1407 May 2003 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/13 TDA7266D ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit Vs Supply Voltage 20 V IO Output Peak Current (internally limited) 1.5 A Ptot Total Power Dissipation (Tamb = 70°C 25 W Top Operating Temperature 0 to 70 °C -40 to 150 °C Value Unit Tstg, Tj Storage and Junction Temperature THERMAL DATA Symbol Parameter Rth j-case Thermal Resistance Junction-case 2.1 °C/W Rth j-amb Thermal Resistance Junction-ambient (on recomended PCB) note1 15 °C/W Notes: 1. See Application note AN668, available on WEB FR4 with 15 via holes and ground layer. PIN CONNECTION PW GND 1 20 PW GND OUT1+ 2 19 OUT2+ N.C. 3 18 N.C. N.C. 4 17 N.C. OUT1- 5 16 OUT2- VCC 6 15 VCC IN1 7 14 IN2- MUTE 8 13 SGND ST BY 9 12 N.C. 10 11 PW GND PW GND D02AU1408 2/13 TDA7266D ELECTRICAL CHARACTERISTCS (Refer to test circuit) VCC = 9.5V, RL = 8Ω, f = 1KHz, Tamb = 25°C unless otherwise specified) Symbol VCC Iq Parameter Test Condition Supply Range Typ. Max. Unit 3.5 9.5 12 V 50 60 mA 120 mV Total Quiescent Current VOS Output Offset Voltage PO Output Power THD 10% Total Harmonic Distortion PO = 1W THD Min. 4.3 5 0.05 PO = 0.1W to 2W f = 100Hz to 15KHz SVR CT AMUTE Supply Voltage Rejection 46 60 dB Mute Attenuation 60 80 dB 150 °C 25 26 Voltage Gain Matching Ri Input Resistance VTMUTE Mute Threshold eN % Crosstalk Closed Loop Voltage Gain IST-BY 1 dB GV VTST-BY % 56 Thermal Threshold ∆GV 0.2 40 Tw f = 100Hz, VR =0.5V W dB 0.5 dB 25 30 for VCC > 6.4V; Vo = -30dB 2.3 2.9 4.1 V for VCC < 6.4V; Vo = -30dB VCC/2 -1 VCC/2 -0.75 VCC/2 -0.5 V 0.8 1.3 1.8 V 100 µA St-by Threshold St-by Current V6 = GND Total Output Voltage 27 A Curve 150 KΩ µV 3/13 TDA7266D APPLICATIVE SUGGESTIONS STAND-BY AND MUTE FUNCTIONS (A) Microprocessor Application In order to avoid annoying "Pop-Noise" during Turn-On/Off transients, it is necessary to guarantee the right Stby and mute signals sequence.It is quite simple to obtain this function using a microprocessor (Fig. 1 and 2). At first St-by signal (from µP) goes high and the voltage across the St-by terminal (Pin 9) starts to increase exponentially. The external RC network is intended to turn-on slowly the biasing circuits of the amplifier, this to avoid "POP" and "CLICK" on the outputs. When this voltage reaches the St-by threshold level, the amplifier is switched-on and the external capacitors in series to the input terminals (C1, C3) start to charge. It's necessary to mantain the mute signal low until the capacitors are fully charged, this to avoid that the device goes in play mode causing a loud "Pop Noise" on the speakers. A delay of 100-200ms between St-by and mute signals is suitable for a proper operation. Figure 1. Microprocessor Application VCC C1 0.22µF IN1 6 7 + 2 C5 470µF OUT1+ 5 OUT1- 19 OUT2+ 16 OUT2- 15 - ST-BY R1 10K 9 C2 10µF S-GND µP 13 Vref C3 0.22µF IN2 MUTE R2 10K 14 + + - 8 C4 1µF 1 10 PW-GND 11 - 20 + D02AU1409 4/13 C6 100nF TDA7266D Figure 2. Microprocessor Driving Signals +VS(V) +18 VIN (mV) VST-BY pin 9 1.8 1.3 0.8 VMUTE pin 8 4.1 2.9 2.3 Iq (mA) VOUT (V) OFF ST-BY PLAY MUTE MUTE ST-BY OFF D02AU1411 B) Low Cost Application In low cost applications where the mP is not present, the suggested circuit is shown in fig.3. The St-by and mute terminals are tied together and they are connected to the supply line via an external voltage divider. The device is switched-on/off from the supply line and the external capacitor C4 is intended to delay the St-by and mute threshold exceeding, avoiding "Popping" problems. So to avoid any popping or clicking sond, it is important to clock: a Correct Sequence: At turn-ON, the Stand-by must be removed at first, then the Mute must be released after a delay of about 100-200ms. On the contrary at turn-OFF the Mute must be activated as first and then the Stand-by. With the values suggested in the Application circuit the right operation is guaranteed. b Correct Threshold Voltages: In order to avoid that due to the spread in the internal thresholds (see the above limits) a wrong external voltage causes uncertain commutations for the two functions we suggest to use the following values: Mute for Vcc>6.4V : VT = 2.3V Mute for Vcc