TDA7376B

TDA7376B 2 x 35 W Power amplifier for car radio Datasheet - production data  Protections: – short circuit (out to ground, out to supply voltage, across the load) – overrating chip temperature with soft thermal limiter – load dump voltage – fortuitous open ground – loudspeaker dc current – ESD '!0'03 Multiwatt15 Description The TDA7376B is a new technology dual bridge audio amplifier in Multiwatt 15 package designed for car radio applications. Thanks to the fully complementary PNP/NPN output stage configuration the TDA7376B delivers a rail-to-rail voltage swing with no need of bootstrap capacitors. Features  High output power capability: – 2 x 40 W max./ 4  – 2 x 35 W/4  EIAJ – 2 x 25 W/4  (14.4 V, 1 kHz, 10 %) – 2 x 25 W/ 2 (14.4 V, 1 kHz, 10 %) Differential input pairs, that will accept either single ended or differential input signals, guarantee high noise immunity making the device suitable for both car radio and car boosters applications.  2  driving  Differential inputs  Minimum external components count  Internally fixed gain (26 db)  Mute function (cmos compatible)  Automute at minimum supply voltage detection  Standby function  No audible pop during mute and standby operations  Clipping detector with programmable distortion threshold The audio mute control, that attenuates the output signal of the audio amplifiers, suppresses pop On - Off transients and cuts any noises coming from previous stages. The standby control, that de-biases the amplifiers, reduces the cost of the power switch. The on-board programmable distortion detector allows compression facility whenever the amplifier is over driven, so limiting the distortion at any levels inside the presettable range. Table 1. Device summary Order code Package Packing TDA7376B Multiwatt15 Tube September 2013 This is information on a product in full production. DocID1507 Rev 6 1/15 www.st.com Contents TDA7376B Contents 1 Block and pin connection diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.2 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 Test and application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2/15 DocID1507 Rev 6 TDA7376B List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 DocID1507 Rev 6 3/15 3 List of figures TDA7376B List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. 4/15 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin connection diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Differential inputs test and application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Single ended inputs test and application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Application board reference circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Printed circuit board and components layout of the circuit of figure 5 . . . . . . . . . . . . . . . . . 8 Clip detector threshold vs. THD set. voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Quiescent current vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Output power vs. supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Output power vs. supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 EIAJ power vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 THD vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 THD vs. output power (RL = 4 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 THD vs. output power (RL = 2 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Dissipated power & efficiency vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 SVR vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 CMRR vs. frequency. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Crosstalk vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Multiwatt15 (vertical) mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . 13 DocID1507 Rev 6 TDA7376B Block and pin connection diagrams 1 Block and pin connection diagrams 1.1 Block diagram Figure 1. Block diagram 5LQ 7+' '(7(&7,21 5LQ ''287 3:$03 ,1 JP ,&0 7+' 6(77,1* 287 &20021 02'( JP 287 ,1 3:$03 5LQ 5LQ 3527(&7256 67'%< 9&& 5()(5(1&(6 9&& 9UHI 5LQ 5LQ 3:$03 ,1 JP ,&0 $8',2 087( 287 &20021 02'( JP 287 ,1 3:$03 5LQ 5LQ *1' DocID1507 Rev 6 *$3*36 5/15 14 Block and pin connection diagrams 1.2 TDA7376B Pin connection Figure 2. Pin connection diagram (top view)  287  287  9&&  ,1  ,1  ''287  7+'6(7  *1'  67%<  087(  ,1  ,1  9&&  287  287 *$3*36 6/15 DocID1507 Rev 6 TDA7376B Test and application circuits Figure 3. Differential inputs test and application circuit Nȍ Nȍ —3 —3 —) —)   ,1 —) 9&&   9&& 287     ,1 —)   ,1 —)  ,1     *1' ''287 9V —) 67'%< 087( —) —)WR—) 287 287 287 0ȍ 7+'6(7 Nȍ 9V *$3*36 Figure 4. Single ended inputs test and application circuit Nȍ Nȍ —3 —3 —) —) 67'%< 087( ,1 ,1   9&&   9&&     —) —) ,1 ,1 —)     *1'    ''287 287 9V —) —)WR—) —) 2 Test and application circuits 287 287 287 7+'6(7 0ȍ Nȍ 9V DocID1507 Rev 6 *$3*36 7/15 14 Test and application circuits TDA7376B Figure 5. Application board reference circuit 9 5Nȍ 6: & —) & —)WR—) &—) ,1 &—) ,1 &—) ,1 &—) ,1 67'%< 087(   9&&   9&&          *1'   287 287 9V &—) 5Nȍ &—) 6: 287 287 5 Nȍ 7+'6(7 ''287 5 Nȍ 5Nȍ *$3*36 ''287 Figure 6. Printed circuit board and components layout of the circuit of figure 5 8/15 DocID1507 Rev 6 TDA7376B Electrical specifications 3 Electrical specifications 3.1 Absolute maximum ratings Table 2. Absolute maximum ratings Symbol VOP Vs Vpeak IO Ptot Tstg, Tj Parameter Value Unit Operating supply voltage 18 V DC supply voltage 28 V Peak supply voltage (t = 50 ms) 50 V Output Peak Current (not repetitive t = 100 s) 8 A Output Peak Current (repetitive f > 10 Hz) 6 A Power Dissipation Tcase = 85 °C 36 W -40 to 150 C -40 to 105 °C Storage and junction temperature(1) Operative ambient temperature range Tamb 1. A suitable heatsink/dissipation system should be used to keep Tj inside specified limits. 3.2 Thermal data Table 3. Thermal data Symbol Parameter Rth j-case 3.3 Thermal Resistance Junction to case Value Unit 1.8 °C/W Max Electrical characteristics Refer to the test circuits figures 3 and 4, VS = 14.4 V; RL = 4 ; f = 1 kHz; Tamb = 25 °C, unless otherwise specified. Table 4. Electrical characteristics Symbol Parameter Test condition Min. Typ. Max. Unit VS Supply voltage range - 8 - 18 V Id Total quiescent drain current RL =  - - 200 mA VOS Output offset voltage - - - 120 mV PO Output power THD = 10%; THD = 10%; RL = 2  23 33 25 37 - W W PO max Max. output power(1) - 36 40 - W PO EIAJ power(1) VS = 13.7V 32 35 - W - 0.03 0.08 - % % THD EIAJ output Distortion PO = 0.5 to 10 W PO = 0.5 to 15 W DocID1507 Rev 6 9/15 14 Electrical specifications TDA7376B Table 4. Electrical characteristics (continued) Symbol Parameter Test condition Min. Typ. Max. Unit - 80 70 - dB dB CT Cross talk f = 1 kHz; Rg f = 10 kHz; Rg RIN Input Impedance differential input Single Ended input 45 40 - - k k GV Voltage gain differential input Single Ended input 25 25 26 26 27 27 dB dB GV Channel gain balance - - - 1 dB EIN Input Noise Voltage Rg = 600 ; "A" weighted Rg = 600 ; 22 Hz to 33 kHz - 3 4 6 V V SVR Supply Voltage Rejection f = 100 Hz; Vr = 1 Vrms; Rg = 0; f = 10 Hz; Vr = 1V rms; Rg = 0; 45 - 55 - dB dB BW Power bandwidth (-3dB) 75 - - kHz Common mode rejection ratio VCM = 1 Vrms input referred 60 - - dB ASB Standby Attenuation VSB = 1.5V; PO ref = 1W 80 90 - dB VSB IN Standby In threshold - - - 1.5 V Standby Out threshold - 3.5 - - V Isb Standby current consumption - - - 100 A AM Mute attenuation VM = 1.5 V; POref = 1 W - 85 VM IN Mute In threshold - - - 1.5 V Mute Out threshold - 3.5 - - V Mute pin current V6 = 0 to VS,; VS max. = 18V - - 100 A 3.5 - - % 1 - - mA - - 10 A CMRR VSB OUT VM OUT I6 DDL Distortion detection level(2) Output low, sinked current DDOUT Distortion detector output dc current (Vpin10 = 1.5V) Output high, leakage current (Vpin10 = VS, @ VSmax = 18V) dB 1. Saturated square wave output. 2. see figure 5 for THD setting.Figure 7. The TDA7376B is equipped with a programmable clipping distortion detector circuitry that allows to signal out the output stage saturation by providing a current sinking into an open collector output (DDout) when the total harmonic distortion of the output signal reaches the preset level. The desired threshold is fixed through an external divider that produces a proper voltage level across the THD set pin. Figure 7 shows the THD detection threshold versus the THD set voltage. Since it is essential that the THD set voltage be proportional to the supply voltage, Figure 7 shows its value as a fraction of VCC. The actual voltage can be computed by multiplying the fraction corresponding to the desired THD threshold by the application’s supply voltage. 10/15 DocID1507 Rev 6 TDA7376B 3.4 Electrical specifications Electrical characteristics curves Figure 7. Clip detector threshold vs. THD set. voltage Figure 8. Quiescent current vs. supply voltage 7+'   ,GP$  9V 9 5/ ȍ I N+]  5/ ȍ                 9V 9V 9V 9V 9V 9V 7+'6(79 3R:     9V9     '!0'03 I N+] 7+'  5/ ȍ         5/ ȍ 5/ ȍ                9V9       3R:    '!0'03 Figure 11. EIAJ power vs. supply voltage   3R:   5/ ȍ         Figure 10. Output power vs. supply voltage   I N+] 7+'    '!0'03 Figure 9. Output power vs. supply voltage       9V9     '!0'03 Figure 12. THD vs. frequency 7+'   I N+] 9L 9UPV 5/ ȍ  96 9 5/ ȍ 7 3R :        5/ ȍ               9V9      '!0'03 DocID1507 Rev 6  I+]   '!0'03 11/15 14 Electrical specifications TDA7376B Figure 13. THD vs. output power (RL = 4 )  7+' Figure 14. THD vs. output power (RL = 2 ) 7+'  9V 9 5/ ȫ 9V 9 5/ ȫ   I N+] I N+]   I N+] I N+]     3R :   Figure 15. Dissipated power & efficiency vs. output power  3WRW: (II                   9V 9 5/ ȍ I N+] Q  3WRW                  3R:  '!0'03 695G% 5L ȍ 5L ȍ 9V 9 5/ ȍ 9U 9UPV      '!0'03 Figure 17. CMRR vs. frequency  3R : Figure 16. SVR vs. frequency    '!0'03 I+]   '!0'03 Figure 18. Crosstalk vs. frequency &055G%  &WG%         9V 5/  9U 5/   9V 9 5/ ȍ 9L 9UPV   9 ȍ 9UPV       12/15  I+]    '!0'03 DocID1507 Rev 6  I+]   '!0'03 TDA7376B 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark Figure 19. Multiwatt15 (vertical) mechanical data and package dimensions $)- INCH MM -). 490 -!8 -). 490 -!8 !  "   #   $    %    &    '       '       (     ( , /54,).%!.$ -%#(!.)#!,$!4!         ,       ,    ,       ,        ,    -       -        3     3     $IA     -ULTIWATT6ERTICAL * '!0'03 DocID1507 Rev 6 13/15 14 Revision history 5 TDA7376B Revision history Table 5. Document revision history 14/15 Date Revision Changes 19-Aug-2000 4 Initial release. 20-Jun-2013 5 Updated Table 2: Absolute maximum ratings on page 9. 18-Sep-2013 6 Updated Disclaimer. DocID1507 Rev 6 TDA7376B Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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