TDA7433D

TDA7433 ® BASIC FUNCTION AUDIO PROCESSOR TWO STEREO AND ONE MONO INPUTS CONTROLLED MUTE FUNCTION (SOFTWARE AND HARDWARE) VOLUME CONTROL IN 1dB STEP FOUR SPEAKER ATTENUATORS: – Independent attenuation control – Independent mute function ALL FUNCTIONS PROGRAMMABLE VIA I2CBUS ) s ( ct u d o r P e DESCRIPTION The TDA7433 is a volume, tone (bass and treble) balance (Left/Right) processor for quality audio applications in car radio and Hi-Fi systems. Control is accomplished by serial bus microprocessor interface. The AC signal setting is obtained by resistor networks and switches combined with operational amplifiers. t c u d o r P e t e l o bs IN1_L IN2_L IN2_R IN1_R VS s b O Thanks to the advanced BIPOLAR/CMOS Technology, the external components have been reduced. 4.7K 100nF 2.7nF 100nF BINL 10 BOUTL TRL 9 11 16 SPKR ATT 6 3 VOL MUX O MONO IN/MUTE t e l o ORDERING NUMBER: TDA7433D ) (s BLOCK DIAGRAM SO20 SPKR ATT TREBLE BASS 14 18 4 S BUS DECODER + LATCHES MUX 2 VOL BASS 19 SPKR ATT TREBLE 15 LEFT FRONT LEFT REAR SCL SDA RIGHT FRONT 5 17 SPKR ATT SUPPLY 20 1 GND CREF 8 BINR 100nF 7 12 BOUTR TRR 100nF 13 RIGHT REAR D95AU354A 2.7nF 4.7K November 1999 1/10 TDA7433 ABSOLUTE MAXIMUM RATINGS Symbol VS Tamb Tstg Parameter Value Unit 10.2 V -40 to 85 °C -55 to +150 °C Operating Supply Voltage Operating Temperature Range Storage Temperature Range QUICK REFERENCE DATA Symbol Parameter VS Supply Voltage Min. Typ. Max. Unit 7 9 10.2 V VCL Max. Input Signal Handling THD Total Harmonic Distortion (V = 1Vrms f = 1kHZ) 1.3 0.05 S/N Signal to Noise Ratio 102 Sc Channel Separation f = 1kHz 100 Volume Control 1dB step -79 Bass Control 2dB step -18 -14 let Mute Attenuation o s b PIN CONNECTION (Top View) Vrms -37.5 100 (s) % t c u od r P e Treble Control 2dB step Speaker Attenuators 1.6 +32 dB dB dB +18 dB +14 dB 0 dB dB O ) s ( t c CREF 1 20 GND IN2_R 2 19 SDA IN2_L 3 18 SCL MONO IN/MUTE 4 17 VS IN1_R 5 16 OUT_LF IN1_L 6 15 OUT_RF BOUT_R 7 14 OUT_LR BIN_R 8 13 OUT_RR BOUT_L 9 12 TRR 10 11 TRL u d o e t e ol s b O Pr BIN_L D95AU355A THERMAL DATA Symbol Rth j-pins 2/10 Parameter Thermal Resistance Junction-pins Max. Value Unit 150 °C/W TDA7433 APPLICATION DIAGRAM 4.7K 100nF BINL 10 100nF IN1_L 6 IN2_L 3 2.7nF 100nF BOUTL TRL 9 11 16 SPKR ATT VOL MUX BASS SPKR ATT TREBLE LEFT FRONT ) s ( ct 14 100nF 100nF S BUS DECODER + LATCHES MONO/ MUTE 100nF 100nF VS 9V IN2_R 2 IN1_R 5 VS 100nF du 18 4 MUX 17 VOL SUPPLY 20 1 GND TREBLE s b O 8 )- CREF 10µF s ( t c BINR 100nF ro P e t e l o BASS 7 12 BOUTR TRR 100nF 19 SPKR ATT SPKR ATT 15 13 LEFT REAR SCL SDA RIGHT FRONT RIGHT REAR D95AU356A 2.7nF 4.7K u d o r P e t e l o s b O 3/10 TDA7433 ELECTRICAL CHARACTERISTICS (Tamb = 25°C, VS = 9V, RL = 10kΩ, Rg = 50Ω, all variable gains = 0dB, f = 1kHz, unless otherwise specified.) Symbol Parameter Test Condition Min. Typ. Max. Unit 70 100 130 kΩ INPUT SELECTOR RIN Input Resistance VCL Clipping Level SIN AMUTE d ≤ 0.3% 1.3 1.6 Vrms Input Separation 70 100 dB Input Mute Attenuation 70 95 dB Mute DC Step VDC MUTE AT AM INPUT (*) VIL 0.2 Input Low Voltage AM not selected Max. Gain Note 2 AMAX Max Attenuation Astep EA Step Resolution Attenuation Set Error G = +20 to -20dB ET Tracking Error G = -20 to -60dB G = -20 to -60dB VDC DC Steps BCUT AStep RB b O s ( t c Step Resolution Internal Feedback Resistance TREBLE CONTROL CRANGE )- Max. Bass cut u d o Control Range Step Resolution Astep SPEAKER ATTENUATORS CRANGE r P e Control Range t e l o Astep AMUTE bs EA O Step Resolution Output Mute Attenuation RL CL From 0 to -24dB From 0 to -24dB dB dB 1.5 +1.0 dB dB 2 2 dB dB 0.1 4 mV 0.5 10 mV dB 1 0 15.5 18 20 -20 -18 15.5 dB 1 2 3 dB 48 65 82 kΩ ±13 ±14 ±15 dB 1 2 3 dB 36 37.5 39 dB 0.5 70 1 90 1.5 dB dB Adjacent Attenuation Steps 0.1 Clipping Level Output Gain (fixed) d = 0.3% 2 Output Load Resistance AC - connected 3 DC connected to GND 5 Output Impedance VDC DC Voltage Level 3.7 1 dB 4 mV 2.5 4 Vrms dB kΩ Output Load Capacitance ROUT V 83 u d o r P e 0.4 33.5 Attenuation Set Error DC Steps VDC AUDIO OUTPUTS VCLIP GOUT 79 let so Max. Bass boost 75 -2 From 0dB to -79dB BRANGE 32 0.5 -1.0 Adjacent Attenuation Steps, Range from 0 to -79dB BASS CONTROL 30.5 mV ) s ( ct VOLUME CONTROL GMAX 10 10 nF 30 100 Ω 4.0 4.3 V (*) The mute function can be activated without using the I2C bus by grounding the AM input when AM is not selected. This causes the input multiplexer to select the reference voltage instead of an input signal. 4/10 TDA7433 ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter Test Condition Min. Typ. Max. Unit GENERAL VS IS PSRR eNO Supply Voltage 6 9 10.2 V Supply Current 5 8 11 mA Power Supply Rejection Ratio Output Noise 65 85 4 7.0 5.5 20Hz - 20kHz "A" - weighted BW = 200Hz - 20kHz, flat output muted S/N Signal to Noise Ratio all gains = 0dB; VO = 1Vrms 102 d Sc Distortion Channel Separation VOUT = 1Vrms 0.05 ET Total Tracking Error AV = 0 to -20dB AV = -20 to -60dB 70 Input Low Voltage VIH IIN Input High Voltage Input Current VO Output Voltage SDA Acknowledge 20 u d o r P e VIN = 0.4V t e l o IO = 1.6mA 0.15 0.15 % ) s ( ct 0 0 3 -5 µV µV µV dB 80 BUS INPUTS VIL dB dB 1 2 dB dB 1 V +5 V µA 0.4 V s b O SOFTWARE SPECIFICATION Interface Protocol The interface protocol comprises: – a start condition (S) – a chip address byte (the LSB bit determines read /write transmission) – a subaddress byte – a sequence of data (N-bytes + acknowledge) – a stop condition (P) ) (s t c u P e CHIP ADDRESS t e l o MSB s b O S 1 d o r 0 0 0 1 0 1 LSB SUBADDRESS MSB R/W ACK X DATA 1...DATA n LSB X X I MSB A3 A2 A1 A0 ACK LSB DATA ACK P ACK = Acknowledge S = Start P = Stop MAX CLOCK SPEED 500kbits/s Auto Increment If bit I in the subaddress byte is set to "1", the autoincrement of the subaddress is enabled. 5/10 TDA7433 SUBADDRESS (receive mode) MSB LSB X X X I A3 0 0 0 0 0 0 0 A2 0 0 0 0 1 1 1 A1 0 0 1 1 0 0 1 A0 0 1 0 1 0 1 0 FUNCTION Input selector Volume Bass, Treble Speaker attenuator LF Speaker attenuator LR Speaker attenuator RF Speaker attenuator RR I = Auto increment X = Not used ) s ( ct DATA BYTE SPECIFICATION X = not relevant; set to "1" during testing Input Selector MSB D6 D7 D5 D4 D3 D2 D1 LSB D0 0 0 0 0 1 0 0 1 1 X 0 1 0 1 X 0 1 ) (s 0 1 u d o r P e FUNCTION t e l o IN2 IN1 mono IN no input selected mute (low homic) non-symmetrical bass cut (note 1) symmetrical bass cut extended bass range standard bass range ±14dB s b O t c u For example to select the IN2 input the Data Byte is: X X X X X 0 1 0. An additional direct mute function is included in the Speaker Attenuators. Note 1: Bass cut for very low frequencies. d o r P e MSB bs t e l o D7 O 0 0 0 0 0 0 0 0 0 0 0 0 LSB D6 D5 D4 0 0 0 0 1 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 D3 D2 D1 VOLUME D0 0 0 0 0 0 0 0 0 1 0 1 0 +32dB +16dB 0dB -16dB -32dB -48dB -64dB 0dB -1dB -2dB 1 1 1 1 -15dB Note 2: It is not recommended to use a gain more than 20dB for system performance reason. In general, the max. gain should be limited by software to the maximum value, which is needed for the system. 6/10 TDA7433 Bass, Treble MSB D7 LSB D6 D5 D4 D4 Input Selector 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 0 0 1 1 1 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 D2 D1 D0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 1 1 0 0 1 1 1 1 0 0 1 1 0 0 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0 FUNCTION Treble Steps - 14dB -12dB -10dB -8dB -6dB -4dB -2dB 0dB 0dB +2dB +4dB +6dB +8dB +10dB +12dB +14dB Bass Steps -18dB -16dB -14dB -12dB -10dB -8dB -6dB -4dB -2dB normal 0dB range 0dB ±14dB +2dB +4dB +6dB +8dB +10dB +12dB +14dB +16dB +18dB ) s ( ct u d o r P e t e l o ) (s t c u d o r P e t e l o 1 0 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0 0 1 D3 s b O For example 12dB Treble and -8dB Bass give the following DATA BYTE: 0 0 1 1 1 0 0 s b O Speaker Attenuators MSB LSB D7 X X D6 X X D5 0 0 D4 0 0 X X X X X X X X X X X X X X X X 0 0 0 0 0 0 0 0 X X 1 SPEAKER ATTENUATOR LF,LR,RF,RR D2 0 0 D1 0 0 D0 0 1 1 1 1 1 1 1 1 1 D3 0 0 : 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0dB -1dB : -24dB -25.5dB -27dB -28.5dB -30dB -32dB -34.5dB -37.5dB X X X X X Speaker Mute 7/10 TDA7433 Functional Description The input selector is able to select 2 stereo inputs and 1 mono input (AM). The inputs are DC biased with 100kΩ resistors to the internal reference voltage of 3V. The mono input can be used additionally as hardware mute pin. If this pin is pulled to ground by an external transistor and AM is not selected, the input selector mutes the input (reference voltage selected). The AM part is considered to be switched OFF. If the output of the AM part is not high ohmic in this condition, a series resistor of about 20kΩ has to be foreseen. The volume control can be programmed from a gain of +32dB to an attenuation of -79dB in 1dB steps. The maximum gain should be kept as low as possible for system performance reason. It has to be limited by software to the absolute necessary system gain, depending on the signal source level and the power amplifier gain. The bass control acts in a range from +18dB to 18dB in 2dB steps. The filter response is deter- ) (s t c u d o r P e t e l o s b O 8/10 mined by the external filter components. An extensive simulation software is available in order to support the design of the bass filter response with different filter configurations. The extended bass boost range of +18dB allows the implementation of the software loudness function by additional bass and treble boost. The treble control acts in a range of ±14dB in 2dB steps. The external capacitor determines with the internal resistor of 50KΩ the corner frequency of the treble response. The four speaker attenuators can be controlled independently from 0 to -37.5dB, which allows the implementation of balance and fader a the four speaker system. The attenuation steps size is 1 db from 0 to -24dB and increases non linearly up to the maximum attenuation of 37.5dB. A special mute bit forces the speaker attenuator into the mute position. All 4 outputs are low distortion push pull outputs, able to drive a load of 3kΩ. ) s ( ct u d o r P e s b O t e l o TDA7433 mm inch OUTLINE AND MECHANICAL DATA DIM. MIN. TYP. MAX. MIN. TYP. MAX. A 2.35 2.65 0.093 0.104 A1 0.1 0.3 0.004 0.012 B 0.33 0.51 0.013 0.020 C 0.23 0.32 0.009 0.013 D 12.6 13 0.496 0.512 E 7.4 7.6 0.291 0.299 e 1.27 u d o 0.050 H 10 10.65 0.394 0.419 h 0.25 0.75 0.010 0.030 L 0.4 1.27 0.016 0.050 K ) s ( ct 0˚ (min.)8˚ (max.) ) (s r P e t e l o s b O t c u L od r P e bs O h x 45˚ A t e l o B SO20 e A1 K C H D 20 11 E 1 0 1 SO20MEC 9/10 TDA7433 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 10/10