TDA7460ND
Car radio signal processor
Not For New Design
Features
■
Device includes audio processor, stereo
decoder, noise blanker and multipath detector
■
High performance signal processor
■
No external components required
■
Fully programmable via I2C bus
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Low distortion
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Low noise
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SO20
Description
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The TDA7460ND is a high performance signal
processor specifically designed for car radio
applications.
)-
The device includes a complete audio processor
and a stereo decoder with noise blanker, stereo
blend and all signal processing functions
necessary for state-of-the-art as well as future car
radio systems.
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Switched-capacitors design technique allows to
obtain all these features without external
components or adjustments.
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This means that higher quality and reliability
walks alongside an overall cost saving.
The CSP is fully programmable by I2C bus
interface allowing to customize key device
parameters and especially filter characteristics.
The BICMOS process combined with the
optimized signal processing assure low noise and
low distortion performances.
Device summary
Order code
Package
Packing
TDA7460ND
SO20
Tube
TDA7460NDTR
SO20
Tape and reel
March 2009
Rev 4
This is information on a product still in production but not recommended for new designs.
1/49
www.st.com
1
Contents
TDA7460ND
Contents
1
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.2
Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.3
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.4
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.5
Audio processor part features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.6
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3.5.1
Input multiplexer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.5.2
Loudness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.5.3
Volume control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.5.4
Bass control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.5.5
Treble control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.5.6
Speaker control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.5.7
Mute functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
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Audio processor electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . 10
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Description of the audio processor part . . . . . . . . . . . . . . . . . . . . . . . . 14
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Programmable input matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.1.1
How to find the right input configuration . . . . . . . . . . . . . . . . . . . . . . . . 15
4.1.2
Input stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.1.3
AutoZero . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Mixing stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.2.1
Loudness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2.2
Soft mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.2.3
Soft step volume . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.2.4
Bass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.2.5
DC mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.2.6
Treble . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.2.7
Speaker attenuator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Stereo decoder part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
TDA7460ND
Contents
5.1
Stereo decoder feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.2
Stereo decoder electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.3
Noise blanker part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.4
Multipath detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.5
Description of stereo decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.6
Stereo decoder mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.5.2
Input stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.5.3
Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.5.4
De-emphasis and high cut . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.5.5
PLL and pilot tone detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.5.6
Fieldstrength control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.5.7
Level input and gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.5.8
Stereo blend control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.5.9
High cut control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
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Functional description of the noise blanker . . . . . . . . . . . . . . . . . . . . . . . 30
5.6.1
Trigger path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.6.2
Automatic noise controlled threshold adjustment (ATC) . . . . . . . . . . . . 31
5.6.3
Automatic threshold control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.6.4
Over deviation detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
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Functional description of the multipath detector . . . . . . . . . . . . . . . . . . . . 32
5.8
Test mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
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I2C bus interface description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
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6.1
Interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6.2
Auto increment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
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5.5.1
Data byte specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
8
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
3/49
List of tables
TDA7460ND
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Table 23.
Table 24.
Table 25.
Table 26.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Audio processor electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Input and source programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Stereo decoder electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Noise blanker electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Multipath detector electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Transmitted data (send mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Subaddress (receive mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Input selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Loudness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Mute, beep and mixing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Volume . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Bass and treble attenuation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Bass and treble filter characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Speaker attenuation (LF, LR, RF, RR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Stereo decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Noise blanker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Field strength control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Stereo decoder adjustment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
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TDA7460ND
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Input configuration tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Loudness attenuation @ fc = 400 Hz (second order) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Loudness center frequency @ Attn. = 15 dB (second order) . . . . . . . . . . . . . . . . . . . . . . . 17
Loudness @ attn. = 15 dB, fc = 400 Hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Soft mute timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Soft step timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Bass control @ fc = 80 Hz, Q = 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Bass center @ Gain = 14 dB, Q = 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Bass quality factors @ gain = 14 dB, fc = 80 Hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Bass normal and DC mode @ Gain = 14 dB, fc = 80 Hz . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Treble control @ fc = 17.5 KHz. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Treble center freq. @ gain = 14 dB. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Noise blanker diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Trigger threshold vs. VPEAK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Deviation controlled trigger adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Fieldstrength controlled trigger adjustment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Block diagram of the stereo decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Block diagram of the stereo decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Signals during stereo decoder's soft mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Internal stereo blend characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Relation between internal and external LEVEL voltage and setup of stereo blend . . . . . . 30
High cut characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Block diagram of the noise blanker. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Block diagram of the multipath detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Application example 1 (with phone input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Application example 2 (with multipath) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Interface protocol diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
SO20 mechanical data and package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
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Block diagram
TDA7460ND
1
Block diagram
Figure 1.
Block diagram
CDL
CDG
5
AM
CASS R
CASS L
SMUTE
CDR
4
3
11
8
MIXING
STAGE
LOUDNESS
SOFT
MUTE
OUT LR
VOLUME
TREBLE
OUT LF
BASS
OUT RR
OUT RF
1
2
PHONE
(MPIN)
7
PHONE GND
(MPOUT)
6
INPUT
MULTIPLEXER
+
AUTO ZERO
PHONE
I2C BUS
DIGITAL CONTROL
VS
15
SUPPLY
14
GND
DEMODULATOR
+ STEREO ADJUST
+ STEREO BLEND
PILOT
CANCELLATION
80KHz
LP
PIL
DET
PLL
MULTIPATHDETECTOR
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18
PULSE
FORMER
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S&H
NOISE
BLANKER
CREF
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25KHz
LP
20
P
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16
HIGH
CUT
CONTROL
D
A
10
LEVEL
OUT LR
OUT LF
OUT RR
OUT RF
SCL
SDA
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FM R
9
19
12
BEEP
FM L
MPX
17
D97AU629A
TDA7460ND
2
Pin description
Pin description
Figure 2.
Pin connection (top view)
CASS R
1
20
CREF
CASS L
2
19
OUT LF
OUT RF
CDR
3
18
CDGND
4
17
OUT LR
CDL
5
16
OUT RR
PHGND (MPOUT)
6
15
VS
PHONE (MPIN)
7
14
GND
AM
8
13
SDA
MPX
9
12
SCL
11
SMUTE
LEVEL
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D97AU628A
Table 2.
N.
Name
CASSR Cassette input right
2
CASSL
3
CDR
6
7
MPX
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LEVEL
Type
I
I
I
I
I
(1))
(1))
I
I
AM input
I
FM input (MPX)
I
Level input stereo decoder
I
SMUTE Soft mute drive
I
SCL
I2C clock line
I/O
13
SDA
I2C data line
I/O
14
GND
Supply ground
VS
12
O
s
b
O
PHONE Phone input (MPIN selectable by SW
9
e
t
e
ol
)-
CD left channel input
t
e
l
o
PHGND Phone ground (MPOUT selectable by SW
AM
11
CD right channel input
CDL
8
10
Cassette input left
CDGND Ground reference CD
5
bs
Function
1
4
r
P
e
Pin description
)
s
(
ct
15
S
Supply voltage
S
16
OUTRR Right rear speaker output
O
17
OUTLR
O
18
OUTRF Right front speaker output
O
19
OUTLF
Left front speaker output
O
20
CREF
Reference capacitor pin
S
Left rear speaker output
1. See Figure 3: Input configuration tree and Section 7: Data byte specification
Pin type legenda:
I = Input
O = Output
I/O = Input/Output
S = Supply
7/49
Electrical specification
TDA7460ND
3
Electrical specification
3.1
Absolute maximum ratings
Table 3.
Absolute maximum ratings
Symbol
Parameter
VS
10.5
V
Operating supply voltage
Operating ambient temperature range
-40 to 85
°C
Tstg
Storage temperature range
-55 to 150
°C
Supply
Table 4.
Supply
Symbol
Parameter
VS
Supply voltage
IS
Supply current
VS = 9 V
o
s
b
let
Audioprocessor (all filters flat)
)
s
(
ct
u
d
o
r
P
e
Test condition
Ripple rejection @ 1 kHz
Min.
Typ.
Max.
Unit
7.5
9
10
V
25
30
35
mA
Stereo decoder + Audioprocessor
3.3
Unit
Tamb
3.2
SVRR
Value
O
)
60
dB
45
dB
s
(
t
c
ESD
All pins are protected against ESD according to the MIL883 standard.
3.4
u
d
o
Thermalrdata
P
ete
l
o
s
b
O
Table 5.
Thermal data
Symbol
Parameter
Rth-j pins Thermal resistance junction to pins
3.5
Audio processor part features
3.5.1
Input multiplexer
8/49
Value
Unit
85
°C/W
max
●
Fully differential or quasi-differential CD and cassette stereo input
●
AM mono or stereo input
●
Phone differential or single ended input
●
Internal beep with 2 frequencies (selectable)
●
Mixable phone and beep signals
TDA7460ND
3.5.2
Electrical specification
3.5.3
Loudness
●
First or second order frequency response
●
Programmable center frequency and quality factor
●
15 x 1 dB steps
●
Selectable flat-mode (constant attenuation)
3.5.4
Volume control
●
1 dB attenuator
●
Max. gain 20 dB
●
Max. attenuation 79 dB
●
Soft-step gain control
)
s
(
ct
3.5.5
Bass control
●
2nd order frequency response
●
Center frequency programmable in 4(5) steps
●
DC gain programmable
●
7 x 2 dB steps
3.5.6
Treble control
2nd order frequency response
●
Center frequency programmable in 4 steps
●
7 x 2 dB steps
3.5.7
d
o
r
4 independent speaker controls (1 dB steps control range 50 dB)
P
e
Mute functions
t
e
l
o
●
s
b
O
t
e
l
o
t
c
u
Speaker control
●
r
P
e
s
b
O
●
)
(s
u
d
o
●
Direct mute
Digitally controlled soft mute with 4 programmable time constants
9/49
Electrical specification
TDA7460ND
3.6
Audio processor electrical characteristics
Table 6.
Audio processor electrical characteristics
(VS = 9 V; Tamb = 25 °C; RL = 10 kΩ; all gains = 0 dB; f = 1 KHz; unless otherwise specified)
.
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
70
100
130
kΩ
Input selector
Rin
Input resistance
VCL
Clipping level
2.2
2.6
VRMS
SIN
Input separation
80
100
dB
GIN MIN
Min. input gain
-1
0
GIN MAX
Max. input gain
13
14
GSTEP
Step resolution
1
2
All inputs except phone
Adjacent gain step
VDC
GMIN to GMAX
e
t
e
ol
Differential
Input resistance
CMRR
s
b
O
Common mode
Common mode rejection ratio
VCM = 1 VRMS @ 1 kHz
)-
VCM = 1 VRMS @ 10 kHz
Output noise @ speaker output
eN
Rin
CMRR
Input resistance
du
o
r
P
Common mode rejection ratio
e
t
e
l
dB
3
dB
+5
mV
1
+5
mV
70
100
130
kΩ
20
30
40
kΩ
45
70
dB
45
60
dB
u
d
o
Pr
20 Hz to 20 KHz flat; all stages 0 dB
s
(
t
c
Differential phone input
15
-5
Differential cd stereo input
Rin
dB
-5
DC steps
)
s
(
ct
1
0
9
15
mV
Differential
10
15
20
kΩ
Common mode
20
30
40
kΩ
VCM = 1 VRMS @ 1 kHz
45
70
dB
VCM = 1 VRMS @ 10 kHz
45
60
dB
Beep control
o
s
b
O
VRMS
Beep level
250
350
500
mV
fBMIN
Lower beep frequency
570
600
630
Hz
fBMAX
Higher beep frequency
1.15
1.2
1.25
kHz
Source
-1
0
1
dB
Source
-5
-6
-7
dB
Source
-10
-12
-14
dB
Beep/Phone
-1
0
1
dB
19
20
21
dB
Mixing control
MLEVEL
Mixing level
Volume control
GMAX
10/49
Max gain
TDA7460ND
Table 6.
Electrical specification
Audio processor electrical characteristics (continued)
(VS = 9 V; Tamb = 25 °C; RL = 10 kΩ; all gains = 0 dB; f = 1 KHz; unless otherwise specified)
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
AMAX
Max attenuation
-83
-79
-75
dB
ASTEP
Step resolution
0.5
1
1.5
dB
G = -20 to 20 dB
-1.25
0
1.25
dB
G = -60 to 20 dB
-4
0
3
dB
2
dB
3
mV
EA
Attenuation set error
ET
Tracking error
VDC
Adjacent attenuation steps
-3
0.1
From 0 dB to GMIN
-7
0.5
du
DC steps
)
s
(
ct
+7
mV
1.5
dB
-15
-14
dB
180
200
220
Hz
360
400
440
Hz
60
100
Loudness control
ASTEP
Step resolution
0.5
AMAX
Max. attenuation
-16
fCMIN
Lower center frequency
fCMAX
Higher center frequency
ro
P
e
t
e
l
o
Soft mute
AMUTE
O
)
T1
T2
Delay time
t(s
T3
uc
pin(1)
od
T4
1
ms
0.96
2
ms
20
40.4
60
ms
200
324
600
ms
1
V
Low threshold for SM
VTHhigh
High threshold for SM pin
2.5
Internal pull-up resistor
70
e
t
e
l
VPU
Pr
Pull-up voltage
o
s
b
Switch time
CRANGE
Control range
Soft step
TSW
dB
0.48
VTHlow
RPU
O
bs
Mute attenuation
TD
1
V
100
130
4.7
kΩ
V
5
10
15
ms
±13
±14
±15
dB
1
2
3
dB
fC1
54
60
66
Hz
fC2
63
70
77
Hz
fC3
72
80
88
Hz
fC4
90
110
Hz
Bass control
ASTEP
fC
Step resolution
Center frequency
100
(2)
11/49
Electrical specification
Table 6.
Audio processor electrical characteristics (continued)
(VS = 9 V; Tamb = 25 °C; RL = 10 kΩ; all gains = 0 dB; f = 1 KHz; unless otherwise specified)
Symbol
QBASS
DCGAIN
TDA7460ND
Parameter
Test condition
Quality factor
Min.
Typ.
Max.
Q1
0.9
1
1.1
Q2
1.1
1.25
1.4
Q3
1.3
1.5
1.7
Q4
1.8
2
2.2
DC = off
-1
0
+1
dB
DC = on
4
4.4
6
dB
±13
±14
Bass-Dc-gain
)
s
(
ct
Treble control
CRANGE
ASTEP
fC
Control range
Step resolution
ASTEP
Step resolution
AMUTE
Output mute attenuation
EE
Attenuation set error
VDC
DC steps
CL
s
b
O
12
kHz
10
12.5
15
kHz
12
15
18
kHz
14
17.5
21
kHz
-53
-50
-47
dB
0.5
1
2
dB
80
90
P
e
t
e
l
o
r
P
e
Clipping level
Output load resistance
)-
s
b
O
t(s
uc
od
-2
Adjacent attenuation steps
d = 0.3%
0.1
2.2
Output impedance
VDC
DC voltage level
dB
2
dB
5
mV
2.6
VRMS
2
kΩ
Output load capacitance
ROUT
12/49
10
fC2
Control range
t
e
l
o
dB
du
2
ro
Speaker attenuators
RL
3
8
fC4
VCLIP
dB
fC1
fC3
Audio outputs
±15
1
Center frequency
CRANGE
Unit
3.6
10
nF
30
100
Ω
3.8
4.0
V
TDA7460ND
Table 6.
Electrical specification
Audio processor electrical characteristics (continued)
(VS = 9 V; Tamb = 25 °C; RL = 10 kΩ; all gains = 0 dB; f = 1 KHz; unless otherwise specified)
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
BW = 20 Hz to 20 kHz
output muted
3
15
μV
BW = 20 Hz to 20 kHz
all gain = 0 dB
6.5
15
μV
all gain = 0 dB flat; VO = 2VRMS
106
bass treble at 12 dB;
VO = 2.6 VRMS
100
General
eNO
S/N
Output noise
d
Signal to noise ratio
VIN = 1VRMS; all stages 0dB
Distortion
0.002
Channel separation left/right
ET
Total tracking error
0.05
Pr
80
AV = 0 to -20 dB
e
t
e
l
AV = -20 to -60 dB
1. The SM pin is active low (mute = 0)
-1
-2
0.1
(s)
0.1
%
dB
ct
u
d
o
VIN = 1VRMS; bass & treble = 12 dB
SC
dB
100
%
dB
0
1
dB
0
2
dB
o
s
b
2. See Section 3.5.4: Bass control and Section 3.5.5: Treble control.
O
)
s
(
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
13/49
Description of the audio processor part
TDA7460ND
4
Description of the audio processor part
4.1
Programmable input matrix
The programmable input matrix of the TDA7460ND offers several possibilities to adapt the
audioprocessor to the desired application. In to the standard application we have:
CD quasi differential
●
Cassette stereo
●
Phone differential
●
AM mono
●
Stereo decoder input.
)
s
(
ct
The input matrix can be configured by only 2 bits: bits 3 and 4 of subaddress 0. Basically the
bit of subaddress 13 is fixed by the application and has to be programmed only once at the
startup of the IC.
u
d
o
r
P
e
For many configurations the two bits are also fixed during one application (e.g. the standard
application) and a change of the input source can be done by loading the first three bits of
subaddress 0.
t
e
l
o
In other configurations for some sources a programming of bit 3 and 4 of subaddress 0 is
necessary in addition to the three source selection bits. In every case only the subaddress 0
has to be changed to switch from one source to another.
s
b
O
The following picture shows the input and source programming flow:
Figure 3.
)
(s
Input configuration tree
ct
u
d
o
e
t
e
ol
s
b
O
Pr
TDA7460
NO
MULTIPATH
CD QD
MULTIPATH
CD FD
CD FD
CD QD
APPL. 1
APPL. 2
APPL. 3
APPL. 4
APPL. 5
APPL. 6
APPL. 7
APPL. 8
CD QD
CASSETTE
FM STD
AM MONO
PHONE (D)
CD QD
CASSETTE
FM STD
AM STEREO
PHONE (SE)
CD QD
CASSETTE
FM STD
AM STD
PHONE (D)
CD FD
CASSETTE
FM STD
AM MONO
PHONE (SE)
CD FD
CASSETTE
FM STD
AM STEREO
CD FD
CASSETTE
FM STD
AM STD
PHONE (SE)
CD QD
CASSETTE
FM STD
AM MONO
CD QD
CASSETTE
FM STD
AM STD
D98AU851
1. Note: in AMSTD configuration the AM mono signal is lead through the FM stereo decoder part to use its
additional filters and high-cut function.
14/49
TDA7460ND
Description of the audio processor part
Table 7.
Input and source programming
Pin number
Appl. no
1
4
6
7
Programming (1)
8
CDGND
PhoneGND
Phone
AMMONO
Startup:
0/xxx11xxx
CDGND
Phone
AMRIGHT
AMLEFT
Startup:
0/xxxx1xxx
FM
AM
Phone
0/xxx11100
0/xxx01011
0/xxx11010
Startup:
0/xxxx1xxx
2
PhoneGND
CDGND
Phone
AMSTD
FM
AM
Phone
3
4
CDRGND
CDLGND
Phone
AMMONO
CDRGND
CDLGND
AMRIGHT
AMLEFT
5
CDRGND
CDLGND
Startup:
Pr
AMSTD
bs
6
7
e
t
e
ol
Phone
CDGND
O
)
Startup:
0/xxxx0xxx
FM
AM
0/xxx10100
0/xxx00011
Startup:
0/xxxx0xxx
FM
AM
Phone
0/xxx10100
0/xxx00100
0/xxx10010
MPIN
AMMONO
Startup:
0/xxx11xxx
MPOUT
MPIN
AMSTD
Startup:
0/xxx1xxx
FM
AM
0/xxx11100
0/xxx01100
du
o
r
P
0/xxxx0xxx
MPOUT
s
(
t
c
CDGND
8
u
d
o
)
s
(
ct
0/xxx11100
0/xxx01100
0/xxx11010
1. Syntax 0/xxx11100 means: SUBADDRESS = 0 - DATA BYTE = xxx11100 (x - don't care)
e
t
e
ol
4.1.1
s
b
O
How to find the right input configuration
The best way to come to the desired configuration may be to go through the application tree
from the top to the bottom while making the specific decisions.
This way will lead to one of the six possible applications. Then take the number of the
application and go into the pinning table. Here you will find the special pinout as well as the
special programming codes for selecting sources.
For example in Appl. 6 the TDA7460ND has to be configured while startup with the databyte
0/xxxx0xxx.
To select the FM, AM or phone source the last five significant bits of subaddress 0 have to
be changed, for any other source the last three bits are sufficient (see Section 7: Data byte
specification on page 36.
15/49
Description of the audio processor part
4.1.2
TDA7460ND
Input stages
Most of the input circuits are the same as in preceding ST audioprocessors with exception of
the CD inputs (see Figure 4.).In the meantime there are some CD players in the market
having a significant high source impedance which affects strongly the common-mode
rejection of the normal differential input stage. The additional buffer of the CD input avoids
this drawback and offers the full common-mode rejection even with those CD players.
The TDA7460ND can be configured with an additional input; if the AC coupling before the
speaker stage is not used (bit 7 in subaddress 5 set to "1") ACINL and ACINR pins can be
used as an additional stereo input.
4.1.3
AutoZero
)
s
(
ct
In order to reduce the number of pins there is no AC coupling between the In-Gain and the
following stage, so that any offset generated by or before the In-Gain stage would be
transferred or even amplified to the output.
u
d
o
To avoid that effect a special offset cancellation stage called AutoZero is implemented.To
avoid audible clicks the audioprocessor is muted before the loudness stage during this time.
In some cases, for example if the µP is executing a refresh cycle of the I2C bus
programming, it is not useful to start a new AutoZero action because no new source is
selected and an undesired mute would appear at the outputs. For such applications the
TDA7460ND could be switched in the "Auto Zero Remain" mode (Bit 6 of the subaddress
byte). If this bit is set to high, the DATABYTE 0 could be loaded without invoking the
AutoZero and the old adjustment value remains.
r
P
e
t
e
l
o
Figure 4.
)
(s
Input stages
CD
ct
du
s
b
O
15K
15K
-
100K
+
15K
15K
CDGND
ro
let
so
b
O
P
e
15K
15K
PHONE
+
15K
15K
IN GAIN
PH_GND
CASSETTE
100K
AM
100K
STEREODECODER
MPX
100K
D97AU633A
4.2
Mixing stage
This stage offers the possibility to mix the internal beep or the phone signal to any other
source. Due to the fact that the mixing stage is also located behind the In-Gain stage fine
adjustments of the main source level can be done in this way.
16/49
TDA7460ND
4.2.1
Description of the audio processor part
Loudness
There are four parameters programmable in the loudness stage (see Figure 5., Figure 6.
and Figure 7.):
●
Attenuation
●
Center Frequency
●
Loudness Q
Flat Mode: in this mode the loudness stage works as a 0 - 15 dB attenuator.
Figure 5.
Loudness attenuation @ fc = 400 Hz (second order)
0.0
)
s
(
ct
-5.0
u
d
o
-10.0
r
P
e
-15.0
-20.0
10.0
Figure 6.
t
e
l
o
100.0
1.0K
10.0K
Loudness center frequency @ Attn. = 15 dB (second order)
0.0
)
(s
-5.0
s
b
O
-10.0
t
c
u
-15.0
d
o
r
P
e
t
e
l
o
Figure 7.
s
b
O
-20.0
10.0
100.0
1.0K
10.0K
Loudness @ attn. = 15 dB, fc = 400 Hz
D98AU844
(dB)
-5
-10
-15
-20
10
100
1,000
Hz
17/49
Description of the audio processor part
4.2.2
TDA7460ND
Soft mute
The digitally controlled soft mute stage allows muting/demuting the signal with a I2C bus
programmable slope. The mute process can either be activated by the soft mute pin or by
the I2C bus. The slope is realized in a special S shaped curve to mute slow in the critical
regions (see Figure 8.).
For timing purposes the Bit 3 of the I2C bus output register is set to 1 from the start of
muting until the end of demuting.
Figure 8.
Soft mute timing
EXT.
MUTE
)
s
(
ct
1
u
d
o
+SIGNAL
REF
r
P
e
-SIGNAL
t
e
l
o
1
I2C BUS
OUT
s
b
O
D97AU634
Time
1. Please notice that a started Mute action is always terminated and could not be interrupted by a change of
the mute signal.
4.2.3
)
(s
Soft step volume
t
c
u
When volume level is changed often an audible click appears at the output. The root cause
of those clicks could be either a DC offset before the volume stage or the sudden change of
the envelope of the audio signal. With the Soft step feature both kinds of clicks could be
reduced to a minimum and are no more audible (see Figure 9.).
P
e
d
o
r
Figure 9.
t
e
l
o
bs
O
Soft step timing
VOUT
2dB
1dB
Time
10ms
-1dB
-2dB
D97AU635
2. For steps more than 1 dB the soft step mode should be deactivated because it could generate a 1 dB error
during the blend-time
18/49
TDA7460ND
4.2.4
Description of the audio processor part
Bass
There are three parameters programmable in the bass stage (see Figure 10., Figure 11.,
Figure 12., Figure 13.):
4.2.5
●
Attenuation
●
Center Frequency (60, 70, 80 and 100 Hz)
●
Quality Factors (1, 1.25, 1.5 and 2)
DC mode
In this mode the DC gain is increased by 4.4 dB. In addition the programmed center
frequency and quality factor is decreased by 25% which can be used to reach alternative
center frequencies or quality factors.
4.2.6
)
s
(
ct
Treble
u
d
o
There are two parameters programmable in the treble stage (see Figure 14. and Figure 15.):
4.2.7
●
Attenuation
●
Center Frequency (10, 12.5, 15 and 17.5 kHz).
r
P
e
t
e
l
o
Speaker attenuator
s
b
O
Due to practical aspects the steps in the speaker attenuators are not linear over the full
range. At attenuations more than 24 dB the steps increase from 1.5 dB to 10 dB (please see
Section 7: Data byte specification on page 36).
)
(s
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
19/49
Description of the audio processor part
TDA7460ND
Figure 10. Bass control @ fc = 80 Hz, Q = 1
15.0
Figure 11. Bass center @ Gain = 14 dB, Q = 1
15.0
10.0
12.5
5.0
10.0
0.0
7.5
5.0
-5.0
)
s
(
ct
2.5
-10.0
0.0
-15.0
10.0
100.0
1.0K
10.0
10.0K
Figure 12. Bass quality factors @ gain =
14 dB, fc = 80 Hz
12.5
12.5
)
(s
7.5
5.0
ct
2.5
du
0.0
10.0
ro
100.0
P
e
1.0K
t
e
l
o
7.5
5.0
2.5
10.0
10.0K
t
e
l
o
100.0
1.0K
10.0K
Figure 15. Treble center freq. @ gain = 14 dB
15.0
s
b
O
10.0
r
P
e
0.0
Figure 14. Treble control @ fc = 17.5 KHz
15.0
10.0K
s
b
O
10.0
10.0
1.0K
Figure 13. Bass normal and DC mode @ Gain
= 14 dB, fc = 80 Hz(1)
15.0
15.0
u
d
o
100.0
12.5
5.0
10.0
0.0
7.5
5.0
-5.0
2.5
-10.0
0.0
-15.0
10.0
100.0
1.0K
10.0K
10.0
100.0
1.0K
10.0K
1. In general the center frequency, Q and DC-mode can be set independently. The exception from this rule is the mode
(5/xx1111xx) where the center frequency is set to 150 Hz instead of 100 Hz.
20/49
TDA7460ND
Stereo decoder part
5
Stereo decoder part
5.1
Stereo decoder feature
●
No external components necessary
●
PLL with adjustment free fully integrated VCO
●
Automatic pilot dependent mono/stereo switching
●
Very high suppression of intermodulation and interference
●
Programmable Roll-Off compensation
●
Dedicated RDS soft mute
●
High cut and stereo blend characteristics programmable in a wide range
●
Internal noise blanker with threshold controls
●
Multipath detector with programmable internal/external influence
●
I2C bus control of all necessary functions
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r
P
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5.2
Stereo decoder electrical characteristics
Table 8.
Stereo decoder electrical characteristics
(VS = 9 V; de-emphasis time constant = 50 μs, VMPX = 500 mV, 75 kHz deviation,
f = 1 kHz. GI = 6 dB, Tamb = 25 °C; unless otherwise specified)
t
e
l
o
.
Symbol
MPX input level
Rin
Input resistance
du
Gmax
Max input gain
GSTEP
Step resolution
SVRR
Supply voltage ripple rejection
ro
P
e
t
e
l
o
S
+ N------------N
Test condition
ct
Minimum input gain
bs
)
(s
s
b
O
Min.
Typ.
Max.
Unit
0.5
1.25
VRMS
70
100
130
kΩ
1.5
3.5
4.5
dB
8.5
11
12.5
dB
1.75
2.5
3.25
dB
Input gain = 3.5 dB
Gmin
THD
O
Parameter
VIN
a
)
s
(
ct
Vripple = 100 mv, f = 1 kHz
Max channel separation
30
Total harmonic distortion
Signal plus noise to noise ratio
55
dB
50
dB
0.02
S = 2 Vrms
80
91
0.3
%
dB
Mono/stereo switch
VPTHST1
Pilot threshold voltage
for stereo, PTH = 1
10
15
25
mV
VPTHST0
Pilot threshold voltage
for stereo, PTH = 0
15
25
35
mV
VPTHMO1
Pilot threshold voltage
for mono, PTH = 1
7
12
17
mV
VPTHMO0
Pilot threshold voltage
for stereo, PTH = 0
10
19
25
mV
PLL
Δf/f
Capture range
0.5
%
21/49
Stereo decoder part
Table 8.
TDA7460ND
Stereo decoder electrical characteristics (continued)
(VS = 9 V; de-emphasis time constant = 50 μs, VMPX = 500 mV, 75 kHz deviation,
f = 1 kHz. GI = 6 dB, Tamb = 25 °C; unless otherwise specified)
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
De-emphasis and high cut(1)
τHC50
De-emphasis time constant
Bit = 7, Subadr. 10 =
0VLEVEL >> VHCH
25
50
75
ms
τHC75
De-emphasis time constant
Bit = 7, Subadr. 10 =
1VLEVEL >> VHCH
50
75
100
ms
τHC50
High cut time constant
Bit = 7, Subadr. 10 =
0VLEVEL >> VHCL
100
150
200
ms
τHC75
High cut time constant
Bit = 7, Subadr. 10 =
1VLEVEL >> VHCL
150
225
300
ms
5.3
V
Stereo blend and high cut-control
u
d
o
REF5V
Internal reference voltage
TCREF5V
Temperature coefficient
LGmin
Min. level gain
LGmax
Max. level gain
LGstep
Level gain step resolution
VSBLmin
Min.voltage for mono
VSBLmax
Max. voltage for mono
VSBLstep
Step resolution
Pr
4.7
so
e
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)
(s
b
O
t
c
u
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r
)
s
(
ct
5
3300
ppm
-1
0
+1
dB
8
10
12
dB
0.3
0.67
1.0
dB
29
33
37
%REF
5V
54
58
62
%REF
5V
5.0
8.4
12
%REF
5V
Stereo blend and high cut control
P
e
VHCHmin
Min.voltage for no high cut
36
42
46
%REF
5V
VHCHmax
Max. voltage for no high cut
62
66
70
%REF
5V
VHCHstep
Step resolution
5
8.4
12
%REF
5V
VHCLmin
Min. voltage for full high cut
13
17
21
%VHC
H
VHCLmax
Max. voltage for full high cut
29
33
37
%VHC
H
40
50
dB
t
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o
s
b
O
Carrier and harmonic suppression at the output
α19
Pilot signal
f = 19 kHz
α38
Sub carrier
f = 38 kHz
75
dB
α57
Sub carrier
f = 5 kHz
62
dB
α76
Subcarrier
f = 76 kHz
90
dB
22/49
TDA7460ND
Table 8.
Stereo decoder part
Stereo decoder electrical characteristics (continued)
(VS = 9 V; de-emphasis time constant = 50 μs, VMPX = 500 mV, 75 kHz deviation,
f = 1 kHz. GI = 6 dB, Tamb = 25 °C; unless otherwise specified)
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
Intermodulation(2)
α2
Pilot signal
α3
fmod = 10 kHz; fspur = 1 kHz;
65
dB
fmod = 13 kHz; fspur = 1 kHz;
75
dB
f = 57 kHz
70
dB
Traffic radio(3)
α57
Signal
)
s
(
ct
SCA - Subsidiary communications authorization(4)
α67
Signal
f = 67 kHz
75
u
d
o
ACI - Adjacent channel interference(5)
α114
Signal
f = 114 kHz
α190
Signal
f = 190 kHz
e
t
e
ol
Pr
dB
95
dB
84
dB
1. By design/characterization but functionally guaranteed through dedicated test mode structure.
2. Intermodulation suppression: measured with: 91% pilot signal; fm = 10 kHz or 13 kHz.
s
b
O
3. Traffic radio (V.F.) suppression: measured with: 91% stereo signal; 9% pilot signal; fm=1 kHz; 5% sub carrier
(f = 57 kHz, fm = 23 Hz AM, m = 60%).
4. SCA (subsidiary communications authorization) measured with: 81% mono signal; 9% pilot signal; fm = 1 kHz; 10%SCA sub carrier (fs = 67kHz, unmodulated).
)
(s
5. ACI (Adjacent channel interference) measured with: 90% mono signal; 9% pilot signal; fm =1 kHz; 1% spurious signal
(fs = 110 kHz or 186 kHz, unmodulated).
t
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s
b
O
23/49
Stereo decoder part
5.3
TDA7460ND
Table 9.
Noise blanker part
●
Internal 2nd order 140 kHz high pass filter
●
Programmable trigger threshold
●
Additional circuits for trigger adjustment (deviation, field-strenght)
●
Very low offset current during hold time
●
Four selectable pulse suppression times
Noise blanker electrical characteristics
Symbol
Parameter
Test condition
meas. with VPEAK =
0.9 V
Trigger threshold (1), (2)
VTR
Min.
30
NBT = 110
35
NBT = 101
40
NBT = 100
od
45
NBT = 011
VRECT DEV
o
s
b
e
t
e
l
O
VRECT FS
s
(
t
c
u
d
o
Rectifier voltage
Pr
Deviation dependent rectifier
voltage (4)
Fieldstrength controlled
rectifier voltage (5)
O
)
mVOP
uc
mVOP
mVOP
mVOP
mVOP
NBT = 000
65
mVOP
NCT = 00
260
mVOP
NCT = 01
220
mVOP
NCT = 10
180
mVOP
NCT = 11
140
mVOP
VMPX = 0 mV
0.5
0.9
1.3
V
VMPX = 50 mV; f = 150 kHz
1.5
1.7
2.1
V
VMPX = 100 mV; f = 150 kHz
2.2
2.5
2.9
V
OVD = 11
0.5
0.9(off)
1.3
VOP
OVD = 10
0.9
1.2
1.5
VOP
OVD = 01
1.7
2.0
2.3
VOP
OVD = 00
2.5
2.8
3.1
VOP
FSC = 11
0.5
0.9(off)
1.3
V
FSC = 10
1.0
1.3
1.6
V
FSC = 01
1.5
1.8
2.1
V
FSC = 00
2.0
2.3
2.6
V
means. with VMPX =
800 mV
(75 KHz dev.)
means. with VMPX =
0mV
VLEVEL
