TDA7461
Car radio signal processor
Not For New Design
Features
■
High performance signal processor for car
radio systems
■
Device includes audio processor, stereo
decoder, noise blanker and multipath detector
■
No external components required
■
Fully programmable via I2C bus
■
Low distortion
■
Low noise
SO-28
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The TDA7461 is a high performance signal
processor specifically designed for car radio
applications.
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The device includes a complete audioprocessor
and a stereo decoder with noise blanker, stereo
blend and all signal processing functions
necessary for state-of-the-art as well as future car
radio systems.
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The BiCMOS process combined with the
optimized signal processing assure low noise and
low distortion performances.
Device summary
Order code
Package
Packing
TDA7461ND
SO-28
Tube
SO-28
Tape and reel
SO-28
Tube
SO-28
Tape and reel
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Switched-capacitors design technique allows to
obtain all these features without external
components or adjustments. This means that
higher quality and reliability walks alongside an
overall cost saving. The CSP is fully
programmable by I2C bus interface allowing to
customize key device parameters and especially
filter characteristics.
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Description
Table 1.
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TDA7461NDTR
E-TDA7461ND
(1)
E-TDA7461NDTR(1)
1. Device in ECOPACK® package, see Chapter 7: Package information on page 46.
January 2009
Rev 7
This is information on a product still in production but not recommended for new designs.
1/48
www.st.com
1
Contents
TDA7461
Contents
1
2
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.1
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2
Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.5
Audio processor part feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.6
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2.5.1
Input multiplexer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.5.2
Volume control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.5.3
Bass control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.5.4
Treble control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.5.5
Speaker control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.5.6
Mute function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
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Audio processor electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . 10
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Description of the audio processor part . . . . . . . . . . . . . . . . . . . . . . . . 13
3.1
Programmable input matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
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3.1.1
How to find the right input configuration . . . . . . . . . . . . . . . . . . . . . . . . 14
3.1.2
Input stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.1.3
AutoZero . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
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3.2
Mux output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.3
Mixing stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
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3.3.1
Loudness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.3.2
Softmute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3.3
Soft step volume . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3.4
Bass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.3.5
DC mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.3.6
Treble . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.3.7
Speaker attenuator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
TDA7461
4
Contents
Stereo decoder part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1
Stereo decoder feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.2
Stereo decoder electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.3
Noise blanker part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.4
Multipath detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.5
Description of stereo decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.6
5
Stereo decoder mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.5.2
Input stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.5.3
Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.5.4
De-emphasis and high cut . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.5.5
PLL and pilot tone detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.5.6
Fieldstrength control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.5.7
Level input and gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.5.8
Stereo blend control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.5.9
High cut control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
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FUnctional description of the noise blanker . . . . . . . . . . . . . . . . . . . . . . . 29
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4.6.1
Trigger path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.6.2
Automatic noise controlled threshold adjustment (ATC) . . . . . . . . . . . . 30
4.6.3
Automatic threshold control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.6.4
Over deviation detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
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4.7
Functional description of the multipath detector . . . . . . . . . . . . . . . . . . . . 31
4.8
Test mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
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I2C bus interface description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
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4.5.1
5.1
Interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5.2
Auto increment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
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Data byte specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3/48
List of tables
TDA7461
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Table 23.
Table 24.
Table 25.
Table 26.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Audio processor electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Input and source programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Stereo decoder electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Noise blanker electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Multipath detector electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Transmitted data (send mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Subaddress (receive mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Input selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Loudness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Mute, Beep and Mixing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Volume . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Bass and treble attenuation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Bass and treble filter characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Speaker attenuation (LF, LR, RF, RR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Stereo decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Noise blanker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Field strength control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Stereo decoder adjustment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
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TDA7461
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Input configuration tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Input stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Loudness attenuation @ fc = 400 Hz (second order) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Loudness center frequency @ Atten. = 15 dB (second order) . . . . . . . . . . . . . . . . . . . . . . 16
Loudness attenuation = 15 dB @ fc = 400 Hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Softmute timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Soft step timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Bass control @ fc = 80 Hz, Q = 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Bass center @ Gain = 14 dB, Q = 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Bass quality factors @ Gain = 14 dB, fc = 80 Hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Bass normal and DC mode @ Gain = 14 dB, fc = 80 Hz . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Treble control @ fc = 17.5 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Treble center frequencies @ Gain = 14 dB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Noise blanker diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Trigger threshold vs. VPEAK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Deviation controlled trigger adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Fieldstrength controlled trigger adjustment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Block diagram of the stereo decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Signals during stereo decoder’s soft mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Internal stereo blend characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Relation between internal and external LEVEL voltage and setup of Stereo blend . . . . . . 29
High cut characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Block diagram of the noiseblankert. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Block diagram of the multipath detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Application example 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Application example 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Interface protocol diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
SO-28 mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
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1.1
Block diagram
Figure 1.
Block diagram
CDL
CDG
7
AM
CASS R
CASS L
PHONE
PH GND
MPX
VS
6
SMUTE
CDR
5
17
10
MIXING
STAGE
VOLUME
4
9
INPUT
MULTIPLEXER
+
AUTO ZERO
2
11
21
OUT LR
OUT LF
BASS
OUT RR
PILOT
CANCELLATION
80KHz
LP
SUPPLY
PLL
26
CREF
23
25
22
24
I2C BUS
DIGITAL CONTROL
du
DEMODULATOR
+ STEREO ADJUST
+ STEREO BLEND
PIL
DET
MULTIPATHDETECTOR
13
)-
MPIN
25KHz
LP
ro
P
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S&H
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NOISE
BLANKER
14
16
15
HIGH
CUT
CONTROL
A
12
MPOUT
LEVEL
Pin connection (top view)
ACINL
1
28
ACOUTL
ACINR
2
27
ACOUTR
CASSR
3
26
CREF
CASSL
4
25
OUTLF
CDR
5
24
OUTRF
CDGND
6
23
OUTLR
CDL
7
22
OUTRR
PH GND
8
21
VS
PHONE
9
20
GND
AM
10
19
SDA
MPX
11
18
SCL
LEVEL
12
17
SMUTE
MPIN
13
16
MUXR
MPOUT
14
15
MUXL
D97AU647
19
D
PULSE
FORMER
OUT LR
OUT LF
OUT RR
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18
BEEP
8
Figure 2.
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TREBLE
27
OUT RF
20
1.2
SOFT
MUTE
3
GND
O
LOUDNESS
28
ACINL
Block diagram and pin description
ACOUTL
1
ACINR
TDA7461
ACOUTR
Block diagram and pin description
D97AU646A
OUT RF
SCL
SDA
MUX R
MUX L
TDA7461
Block diagram and pin description
Table 2.
Pin description
N.
Name
1
ACINL
Speaker stage input left
I
2
ACINR
Speaker stage input right
I
3
CASSR
Cassette input right
I
4
CASSL
Cassette input left
I
5
CDR
CD right channel input
I
6
Type
CDGND Ground reference CD
7
CDL
I
CD left channel input
8
PHGND Phone ground
9
PHONE
10
AM
11
MPX
12
LEVEL
13
MPIN
14
I
)
s
(
t
I
c
u
d
Phone input
AM input
ro
FM input (MPX)
P
e
Level input stereo decoder
let
Multipath detector input
MPOUT Multipath detector output
o
s
b
I
I
I
I
I
O
15
MUXL
Multiplexer output left channel (stereo decoder output left
selectable (1)
O
16
MUXR
Multiplexer output right channel (stereo decoder output right
selectable (1))
O
17
SMUTE
Soft mute drive
I
18
SCL
I2C clock line
I/O
SDA
I2C
I/O
20
21
e
t
e
ol
O
)
s
(
t
c
u
d
o
19
s
b
O
Function
Pr
data line
GND
Supply ground
S
VS
Supply voltage
S
22
OUTRR
Right rear speaker output
O
23
OUTLR
Left rear speaker output
O
24
OUTRF
Right front speaker output
O
25
OUTLF
Left front speaker output
O
26
CREF
Reference capacitor pin
S
27
ACOUTR Pre-speaker AC output right channel
O
28
ACOUTL Pre-speaker AC output left channel
O
1. See data byte specification - speaker attenuator
Pin type:
I = Input
O = Output
I/O = Input/Output
S = Supply
7/48
Electrical specification
TDA7461
2
Electrical specification
2.1
Absolute maximum ratings
Table 3.
Absolute maximum ratings
Symbol
VS
Parameter
Operating supply voltage
10.5
V
Operating ambient temperature range
-40 to 85
°C
Tstg
Storage temperature range
-55 to 150
°C
Supply
Table 4.
Supply
Symbol
Parameter
VS
Supply voltage
IS
Supply current
VS = 9V
o
s
b
let
)
s
(
ct
Min.
u
d
o
Typ.
Max.
Unit
7.5
9
10
V
25
30
35
mA
r
P
e
Test condition
Audioprocessor (all filters flat)
60
dB
Stereo decoder + Audioprocessor
45
dB
Ripple rejection @ 1 kHz
2.3
Unit
Tamb
2.2
SVRR
Value
O
)
s
(
t
c
ESD
All pins are protected against ESD according to the MIL883 standard.
2.4
u
d
o
Thermalrdata
P
ete
l
o
s
b
O
8/48
Table 5.
Symbol
Rth j-pins
Thermal data
Parameter
Thermal resistance junction to pins
max
Value
Unit
85
°C/W
TDA7461
Electrical specification
2.5
Audio processor part feature
2.5.1
Input multiplexer
2.5.2
●
Fully differential or quasi-differential CD and cassette stereo input
●
AM mono or stereo input
●
Phone differential or single ended input
●
Internal beep with 2 frequencies (selectable)
●
Mixable phone and beep signals
●
Loudness
●
Second order frequency response
●
Programmable center frequency and quality factor
●
15 x 1 dB steps
●
Selectable flat-mode (constant attenuation)
●
1 dB attenuator
●
Max. gain 20 dB
●
Max. attenuation 79 dB
●
Soft-step gain control
Bass control
2.5.4
r
P
e
)
(s
t
e
l
o
s
b
O
●
2nd order frequency response
●
Center frequency programmable in 4 (5) steps
●
DC gain programmable
●
7 x 2 dB steps
t
c
u
d
o
r
P
e
Treble control
t
e
l
o
●
bs
2.5.5
u
d
o
Volume control
2.5.3
O
)
s
(
ct
nd
2
order frequency response
●
Center frequency programmable in 4 steps
●
7 x 2 dB steps
Speaker control
4 independent speaker controls (1 dB steps control range 50 dB)
2.5.6
Mute function
●
Direct mute
●
Digitally controlled softmute with 4 programmable time constants
9/48
Electrical specification
TDA7461
2.6
Audio processor electrical characteristics
Table 6.
Audio processor electrical characteristics
(VS = 9 V; Tamb = 25 °C; RL = 10 kΩ; all gains = 0 dB; f = 1 kHz; unless otherwise specified).
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
70
100
130
KΩ
Input selector
Rin
Input resistance
VCL
Clipping level
2.2
2.6
VRMS
SIN
Input separation
80
100
dB
GIN MIN
Min. input gain
-1
0
1
dB
GIN MAX
Max. input gain
13
14
15
dB
GSTEP
Step resolution
1
VDC
all inputs except phone
DC Steps
CMRR
Output noise @ speaker
output
eN
CMRR
o
r
P
Common mode rejection ratio
e
t
e
ol
+5
mV
1
+5
mV
70
100
130
KΩ
20
30
40
KΩ
45
70
dB
45
60
dB
-5
VCM = 1 VRMS @ 10 kHz
O
)
ro
P
e
let
o
s
b
VCM = 1 VRMS @ 1 kHz
s
(
t
c
du
Input resistance
0
20 Hz to 20 kHz flat; all stages 0dB
Differential phone input
Rin
c
u
d
dB
GMIN to GMAX
Common mode
Common mode rejection ratio
3
-5
Differential
Input resistance
Rin
2
Adjacent gain step
Differential CD stereo input
)
s
(
t
9
15
μV
Differential
10
15
20
KΩ
Common mode
20
30
40
KΩ
VCM = 1 VRMS @ 1 kHz
45
70
dB
VCM = 1 VRMS @ 10 kHz
45
60
dB
Beep control
VRMS
Beep level
250
350
500
mV
fBMIN
Lower beep frequency
570
600
630
Hz
fBMAX
Higher beep frequency
1.15
1.2
1.25
KHz
Source
-1
0
1
dB
Source
-5
-6
-7
dB
Source
-10
-12
-14
dB
Beep/Phone
-1
0
1
dB
s
b
O
Mixing control
MLEVEL
Mixing level
Volume control
GMAX
Max gain
19
20
21
dB
AMAX
Max attenuation
-83
-79
-75
dB
10/48
TDA7461
Table 6.
Electrical specification
Audio processor electrical characteristics (continued)
(VS = 9 V; Tamb = 25 °C; RL = 10 kΩ; all gains = 0 dB; f = 1 kHz; unless otherwise specified).
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
0.5
1
1.5
dB
G = -20 to 20 dB
-1.25
0
1.25
dB
G = -60 to 20 dB
-4
0
3
dB
2
dB
Step resolution
ASTEP
EA
Attenuation set error
ET
Tracking error
DC steps
VDC
Adjacent attenuation steps
-3
0.1
3
mV
From 0 dB to GMIN
-7
0.5
+7
mV
LOudness control
ASTEP
Step resolution
0.5
1
AMAX
Max. attenuation
-16
-15
fCMIN
Lower center frequency
180
fCMAX
Higher center frequency
Pr
360
Soft mute
AMUTE
e
t
e
l
Mute attenuation
o
s
b
T1
T2
Delay time
TD
O
)
T3
T4
VTHlow
Low threshold for SM
VTHhigh
High threshold for SM pin
Internal pull-up resistor
VPU
Pull-up voltage
P
e
Switch time
Bass control
o
s
b
ASTEP
fC
QBASS
220
Hz
440
Hz
100
dB
1
ms
0.96
2
ms
20
40.4
60
ms
200
324
600
ms
1
V
2.5
70
V
100
130
KΩ
V
10
15
ms
±13
±14
±15
dB
1
2
3
dB
fC1
54
60
66
Hz
fC2
63
70
77
Hz
fC3
72
80
88
Hz
fC4
90
100(2)
110
Hz
Q1
0.9
1
1.1
Q2
1.1
1.25
1.4
Q3
1.3
1.5
1.7
Q4
1.8
2
2.2
Step resolution
Quality factor
dB
5
Control range
Center frequency
400
-14
4.7
let
TSW
200
dB
0.48
ro
Soft step
O
c
u
d
RPU
CRANGE
t(s
pin(1)
60
u
d
o
)
s
(
ct
1.5
11/48
Electrical specification
Table 6.
TDA7461
Audio processor electrical characteristics (continued)
(VS = 9 V; Tamb = 25 °C; RL = 10 kΩ; all gains = 0 dB; f = 1 kHz; unless otherwise specified).
Symbol
Parameter
Test condition
Bass-DC-gain
DCGAIN
Min.
Typ.
Max.
Unit
DC = off
-1
0
+1
dB
DC = on
4
4.4
6
dB
±13
±14
±15
dB
1
2
3
dB
fC1
8
10
12
KHz
fC2
10
12.5
fC3
12
15
fC4
14
17.5
Treble control
Control range
CRANGE
ASTEP
Step resolution
Center frequency
fC
KHz
18
KHz
21
KHz
-50
-47
dB
0.5
1
2
dB
80
90
u
d
o
Speaker attenuator
Control range
CRANGE
Step resolution
AMUTE
Output mute attenuation
EE
Attenuation set error
VDC
DC steps
e
t
e
l
o
s
b
O
)
Audio outputs
VCLIP
Clipping level
RL
Output load resistance
CL
Output load capacitance
Output Impedance
VDC
DC voltage level
e
t
e
l
o
s
b
eNO
O
S/N
d
s
(
t
c
Pr
Output noise
Signal to noise ratio
Distortion
SC
Channel separation left/right
ET
Total tracking error
0.1
2.2
2
dB
5
mV
2.6
VRMS
2
KΩ
nF
30
100
W
3.8
4.0
V
BW = 20 Hz to 20 kHz
output muted
3
15
μV
all gain = 0 dB
BW = 20 Hz to 20 kHz
6.5
15
μV
all gain = 0 dB flat; VO = 2 VRMS
106
dB
bass treble at 12 dB; VO = 2.6VRMS
100
dB
3.6
VIN= 1 VRMS; all stages 0 dB
0.002
0.1
%
VIN= 1 VRMS; bass & treble = 12 dB
0.05
0.1
%
80
100
AV = 0 to -20 dB
-1
0
1
dB
AV= -20 to -60 dB
-2
0
2
dB
1. The SM pin is active low (Mute = 0)
2. See description of audioprocessor part - bass & treble filter characteristics programming
12/48
-2
dB
10
u
d
o
ROUT
General
Pr
-53
ASTEP
)
s
(
ct
15
dB
TDA7461
Description of the audio processor part
3
Description of the audio processor part
3.1
Programmable input matrix
The programmable input matrix of the TDA7461 offers several possibilities to adapt the
audioprocessor to the desired application. In to the standard application we have:
●
CD quasi differential
●
Cassette stereo
●
Phone differential
●
AM mono
●
Stereo decoder input.
)
s
(
ct
The input matrix can be configured by only 2 bits: bits 3 and 4 of subaddress 0. Basically the
bit of subaddress 13 is fixed by the application and has to be programmed only once at the
startup of the IC.
u
d
o
r
P
e
For many configurations the two bits are also fixed during one application (e.g. the standard
application) and a change of the input source can be done by loading the first three bits of
subaddress 0.
t
e
l
o
In other configurations for some sources a programming of bit 3 and 4 of subaddress 0 is
necessary in addition to the three source selection bits. In every case only the subaddress 0
has to be changed to switch from one source to another.
s
b
O
The following picture shows the input and source programming flow:
)
(s
Figure 3.
Input configuration tree
t
c
u
TDA7461
d
o
r
P
e
s
b
O
t
e
l
o
CD QD
CD FD
APPL. 1
APPL. 2
APPL. 3
APPL. 4
APPL. 5
APPL. 6
CD QD
CASSETTE
FM STD
AM MONO
PHONE (D)
CD QD
CASSETTE
FM STD
AM STEREO
PHONE (SE)
CD QD
CASSETTE
FM STD
AM STD
PHONE (D)
CD FD
CASSETTE
FM STD
AM MONO
PHONE (SE)
CD FD
CASSETTE
FM STD
AM STEREO
CD FD
CASSETTE
FM STD
AM STD
PHONE (SE)
D97AU632B
1. In AMSTD configuration the AM mono signal is lead through the FM stereo decoder part to use its
additional filters.
13/48
Description of the audio processor part
Table 7.
TDA7461
Input and source programming
Pin number
Programming (1)
Appl. N#
1
2
6
8
9
10
CDGND
PhoneGND
Phone
AMMONO
CDGND
PhoneGND
AMRIGHT
AMLEFT
Startup
0/xxx11xxx
Startup
0/xxxx1xxx
FM
0/xxx11100
AM
0/xxx01011
Phone
0/xxx11010
Startup
0/xxxx1xxx
)
s
(
ct
FM
3
CDGND
PhoneGND
Phone
AMSTD
AM
u
d
o
Phone
4
5
CDRGND
6
CDRGND
CDRGND
CDLGND
CDLGND
Pr
AMMONO
e
t
e
l
AMRIGHT
o
s
b
-O
CDLGND
)
s
(
ct
Phone
Phone
AMLEFT
AMSTD
0/xxx11100
0/xxx01100
0/xxx11010
Startup
0/xxxx0xxx
Startup
0/xxxx0xxx
FM
0/xxx10100
AM
0/xxx00011
Startup
0/xxxx0xxx
FM
0/xxx10100
AM
0/xxx00100
Phone
0/xxx10010
1. Syntax 0/xxx11100 means: SUBADDRESS = 0 - DATA BYTE = xxx11100 (x - don’t care).
u
d
o
3.1.1
How to find the right input configuration
r
P
e
The best way to come to the desired configuration may be to go through the application tree
from the top to the bottom while making the specific decisions.
t
e
l
o
s
b
O
This way will lead to one of the six possible applications. Then take the number of the
application and go into the pinning table. Here you will find the special pinout as well as the
special programming codes for selecting sources.
For example in Appl. 6 the TDA7461 has to be configured while startup with the data byte
0/xxxx0xxx.
To select the FM, AM or phone source the last five significant bits of subaddress 0 have to
be changed, for any other source the last three bits are sufficient (see data byte
specification).
3.1.2
Input stages
Most of the input circuits are the same as in previous ST audio processors with exception of
the CD inputs (see Figure 4). In the meantime there are some CD players in the market
having a significant high source impedance which affects strongly the common mode
rejection of the normal differential input stage. The additional buffer of the CD input avoids
this drawback and offers the full common mode rejection even with those CD players.
14/48
TDA7461
Description of the audio processor part
The TDA7461 can be configured with an additional input; if the AC coupling before the
speaker stage is not used (bit 7 in subaddress 5 set to "1") ACINL and ACINR pins can be
used as an additional stereo input.
Figure 4.
Input stages
15K
15K
CD
-
100K
+
15K
15K
CDGND
15K
15K
PHONE
)
s
(
ct
+
15K
du
15K
PH_GND
CASSETTE
100K
e
t
e
ol
AM
100K
o
r
P
STEREODECODER
MPX
100K
3.1.3
s
b
O
IN GAIN
)
(s
D97AU633A
t
c
u
AutoZero
In order to reduce the number of pins there is no AC coupling between the In-Gain and the
following stage, so that any offset generated by or before the In-Gain stage would be
transferred or even amplified to the output. To avoid that effect a special offset cancellation
stage called AutoZero is implemented.
d
o
r
P
e
t
e
l
o
s
b
O
3.2
To avoid audible clicks the audioprocessor is muted before the loudness stage during this
time. In some cases, for example if the μP is executing a refresh cycle of the I2C bus
programming, it is not useful to start a new AutoZero action because no new source is
selected and an undesired mute would appear at the outputs. For such applications the
TDA7461 could be switched in the "Auto Zero Remain" mode (Bit 6 of the subaddress byte).
If this bit is set to high, the DATABYTE 0 could be loaded without invoking the AutoZero and
the old adjustment value remains.
Mux output
The MUX_L and MUX_R outputs can provide selectively the output of the input multiplexer
(Speaker RF register, Byte 8, bit 6=1) or the output of the stereo decoder (Speaker RF
register Byte 8 bit 6=0).
If bit D3 byte 10 (Stdec Register) is set to 1, then the stdec signal is automatically muted,
when another source is selected at the input multiplexer.
15/48
Description of the audio processor part
TDA7461
If bit D3 byte 10 (Stdec Register) is set to 0, then the stdec signal will be always available at
the Mux out pins, no matter which is the selected source.
The selection of the stereodecoder input, via a special procedure, is recommended.
1.
Soft Mute or Mute the signal path
2.
Temporary deselect the stereodec
3.
Wait 100-200 ms to allow the stdec internal filters to settle
4.
Select sterodec input (with automatic autozero)
This procedure guarantees an optimum offsetcancellation, avoiding big DC offsets due to
the autozero circuitry, which otherwise could try to compensate the signal sourced at the
MPX input instead of the stereodecoder intrinsic offset.
3.3
)
s
(
ct
Mixing stage
u
d
o
This stage offers the possibility to mix the internal beep or the phone signal to any other
source.
r
P
e
Due to the fact that the mixing stage is also located behind the In-Gain stage fine
adjustments of the main source level can be done in this way.
3.3.1
t
e
l
o
Loudness
s
b
O
There are four parameters programmable in the loudness stage (see Figure 5, 6 and 7):
Figure 5.
●
Attenuation
●
Center frequency
●
Loudness Q
●
Flat Mode: in this mode the loudness stage works as a 0 - 15dB attenuator.
t
c
u
d
o
r
Loudness attenuation @ fc = 400 Hz Figure 6.
(second order)
P
e
t
e
l
o
s
b
O
16/48
)
(s
Loudness center frequency @
Atten. = 15 dB (second order)
TDA7461
Description of the audio processor part
Figure 7.
Loudness attenuation = 15 dB @ fc = 400 Hz
D98AU844
(dB)
-5
-10
-15
-20
10
3.3.2
100
1,000
)
s
(
ct
Hz
u
d
o
Softmute
r
P
e
The digitally controlled softmute stage allows muting/demuting the signal with a I2C bus
programmable slope. The mute process can either be activated by the softmute pin or by the
I2C bus. The slope is realized in a special S shaped curve to mute slow in the critical regions
(see Figure 8). For timing purposes the Bit 3 of the I2C bus output register is set to 1 from
the start of muting until the end of demuting.
Figure 8.
Softmute timing
)
(s
t
c
u
EXT.
MUTE
d
o
r
P
e
t
e
l
o
bs
O
t
e
l
o
s
b
O
1
+SIGNAL
REF
-SIGNAL
1
I2C BUS
OUT
D97AU634
Time
1. Please notice that a started Mute action is always terminated and could not be interrupted by a change of
the mute signal.
3.3.3
Soft step volume
When volume level is changed often an audible click appears at the output. The root cause
of those clicks could be either a DC offset before the volume stage or the sudden change of
the envelope of the audio signal. With the Soft step feature both kinds of clicks could be
reduced to a minimum and are no more audible (see Figure 9).
17/48
Description of the audio processor part
Figure 9.
TDA7461
Soft step timing
VOUT
2dB
1dB
Time
10ms
-1dB
-2dB
D97AU635
1. For steps more than 1dB the soft step mode should be deactivated because it could generate a 1dB error
during the blend-time.
3.3.4
)
s
(
ct
Bass
u
d
o
There are three parameters programmable in the bass stage (see Figure 10, 11, 12, 13):
3.3.5
●
Attenuation
●
Center Frequency (60, 70, 80 and 100 Hz)
●
Quality Factors (1, 1.25, 1.5 and 2)
DC mode
r
P
e
t
e
l
o
s
b
O
In this mode the DC gain is increased by 4.4 dB. In addition the programmed center
frequency and quality factor is decreased by 25 % which can be used to reach alternative
center frequencies or quality factors.
3.3.6
)
(s
t
c
u
Treble
There are two parameters programmable in the treble stage (see Figure 14, 15):
s
b
O
18/48
Attenuation
●
Center frequency (10, 12.5, 15 and 17.5 kHz).
P
e
t
e
l
o
3.3.7
d
o
r
●
Speaker attenuator
Due to practical aspects the steps in the speaker attenuator are not linear over the full
range. At attenuations more than 24 dB the steps increase from 1.5 dB to 10 dB (please see
data byte specification).
TDA7461
Description of the audio processor part
Figure 10. Bass control @ fc = 80 Hz, Q = 1
Figure 11. Bass center @ Gain = 14 dB, Q = 1
)
s
(
ct
u
d
o
Figure 12. Bass quality factors @
Gain = 14 dB, fc = 80 Hz
Figure 13. Bass normal and DC mode @
Gain = 14 dB, fc = 80 Hz (1)
r
P
e
t
e
l
o
)
(s
s
b
O
t
c
u
d
o
r
P
e
Figure 14. Treble control @ fc = 17.5 kHz)
t
e
l
o
Figure 15. Treble center frequencies @
Gain = 14 dB
s
b
O
(1) In general the center frequency, Q and DC-mode can be set independently. The exception from this rule is
the mode (5/xx1111xx) where the center frequency is set to 150Hz instead of 100 Hz.
19/48
Stereo decoder part
TDA7461
4
Stereo decoder part
4.1
Stereo decoder feature
●
No external components necessary
●
PLL with adjustment free fully integrated VCO
●
Automatic pilot dependent mono/stereo switching
●
Very high suppression of intermodulation and interference
●
Programmable roll-off compensation
●
Dedicated RDS Softmute
●
High cut and stereo blend characteristics programmable in a wide range
●
Internal Noise blanker with threshold controls
●
Multipath detector with programmable internal/external influence
●
I2C bus control of all necessary functions
)
s
(
ct
u
d
o
r
P
e
4.2
Stereo decoder electrical characteristics
Table 8.
Stereo decoder electrical characteristics
(VS = 9 V; de-emphasis time constant = 50 μs, VMPX = 500 mV, 75 kHz deviation, f = 1 kHz.
GI = 6 dB, Tamb = 25 °C; unless otherwise specified)
t
e
l
o
.
Symbol
Parameter
VIN
MPX input level
Rin
Input resistance
)
(s
ct
du
Minimum input gain
Gmax
Max input gain
GSTEP
Step resolution
SVRR
Supply voltage ripple rejection
ro
P
e
t
e
l
o
O
Test condition
Min.
Typ.
Max.
Unit
0.5
1.25
VRMS
70
100
130
KΩ
1.5
3.5
4.5
dB
8.5
11
12.5
dB
1.75
2.5
3.25
dB
Input gain = 3.5 dB
Gmin
a
Max channel separation
THD
Total harmonic distortion
S+N
-------------N
Signal plus noise to noise ratio
bs
s
b
O
Vripple = 100 mV, f = 1 kHz
30
55
dB
50
dB
0.02
S = 2 Vrms
80
91
0.3
%
dB
Mono/stereo switch
VPTHST1
Pilot threshold voltage
for Stereo, PTH = 1
10
15
25
mV
VPTHST0
Pilot threshold voltage
for Stereo, PTH = 0
15
25
35
mV
VPTHMO1
Pilot threshold voltage
for Mono, PTH = 1
7
12
17
mV
VPTHMO0
Pilot threshold voltage
for Stereo, PTH = 0
10
19
25
mV
PLL
Δf/f
20/48
Capture range
0.5
%
TDA7461
Table 8.
Stereo decoder part
Stereo decoder electrical characteristics (continued)
(VS = 9 V; de-emphasis time constant = 50 μs, VMPX = 500 mV, 75 kHz deviation, f = 1 kHz.
GI = 6 dB, Tamb = 25 °C; unless otherwise specified)
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
De-emphasis and high cut (1)
τHC50
De-emphasis time constant
Bit = 7, Subadr. 10 = 0
VLEVEL >> VHCH
25
50
75
μs
τHC75
De-emphasis time constant
Bit = 7, Subadr. 10 = 1
VLEVEL >> VHCH
50
75
100
μs
τHC50
High cut time constant
Bit = 7, Subadr. 10 = 0
VLEVEL >> VHCL
100
150
200
μs
τHC75
High cut time constant
Bit = 7, Subadr. 10 = 1
VLEVEL >> VHCL
150
225
300
μs
u
d
o
Stereo blend and high cut-control
REF5V
Internal reference voltage
TCREF5V
Temperature coefficient
LGmin
Min. level gain
LGmax
Max. level gain
LGstep
Level gain step resolution
Pr
4.7
so
e
t
e
l
b
O
)
s
(
ct
5
5.3
3300
V
ppm
-1
0
+1
dB
8
10
12
dB
0.3
0.67
1.0
dB
29
33
37
%REF5V
54
58
62
%REF5V
5.0
8.4
12
%REF5V
VSBLmin
Min. voltage for mono
VSBLmax
Max. voltage for mono
VSBLstep
Step resolution
VHCHmin
Min.voltage for no high cut
36
42
46
%REF5V
VHCHmax
Max. voltage for no high cut
62
66
70
%REF5V
VHCHstep
Step resolution
5
8.4
12
%REF5V
VHCLmin
Min. voltage for full high cut
13
17
21
%VHCH
VHCLmax
Max. voltage for full high cut
29
33
37
%VHCH
40
50
dB
)-
s
(
t
c
u
d
o
e
t
e
ol
Pr
Carrier and harmonic suppression at the output
s
b
O
α19
Pilot signal
f = 19 kHz
α38
Sub carrier
f = 38 kHz
75
dB
α57
Sub carrier
f = 57 kHz
62
dB
α76
Sub carrier
f = 76 kHz
90
dB
fmod = 10 kHz
fspur = 1 kHz;
65
dB
fmod = 13 kHz;
fspur = 1 kHz;
75
dB
Intermodulation (2))
α2
Pilot signal
α3
21/48
Stereo decoder part
Table 8.
TDA7461
Stereo decoder electrical characteristics (continued)
(VS = 9 V; de-emphasis time constant = 50 μs, VMPX = 500 mV, 75 kHz deviation, f = 1 kHz.
GI = 6 dB, Tamb = 25 °C; unless otherwise specified)
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
Traffic radio (3)
α57
Signal
f = 57 kHz
70
dB
f = 67 kHz
75
dB
SCA - Subsidiary communications authorization
α67
Signal
(4)
ACI - Adjacent channel interference (5)
α114
Signal
f = 114 kHz
95
α190
Signal
f = 190 kHz
84
dB
c
u
d
1. By design/characterization but functionally guaranteed through dedicated test mode structure
2. Intermodulation Suppression: measured with: 91% pilot signal; fm = 10kHz or 13kHz.
)
s
(
t
o
r
P
dB
3. Traffic radio (V.F.) suppression: measured with: 91 % stereo signal; 9 % pilot signal; fm=1 kHz; 5% sub carrier (f = 57 kHz,
fm = 23 Hz AM, m = 60 %)
e
t
e
ol
4. SCA (subsidiary communications authorization) measured with: 81% mono signal; 9% pilot signal; fm = 1 kHz; 1 0% SCA
sub carrier (fs = 6 7 kHz, unmodulated).
5. ACI (adjacent channel interference) measured with: 90% mono signal; 9% pilot signal; fm = 1 kHz; 1% spurious signal
(fs = 110 kHz or 186 kHz, unmodulated).
)
(s
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
22/48
s
b
O
TDA7461
4.3
Stereo decoder part
Table 9.
Noise blanker part
●
internal 2nd order 140 kHz high pass filter
●
programmable trigger threshold
●
additional circuits for trigger adjustment (deviation, field-strength)
●
very low offset current during hold time
●
four selectable pulse suppression times
Symbol
Noise blanker electrical characteristics
Parameter
Trigger threshold (1), (2)
VTR
Test condition
meas. with VPEAK = 0.9V
Min.
30
NBT = 110
35
NBT = 101
40
NBT = 100
od
45
NBT = 011
O
)
s
(
t
c
e
t
e
l
Pr
O
VRECT FS
Fieldstrength
controlled (5)
rectifier voltage
uc
mVOP
mVOP
mVOP
mVOP
NBT = 000
65
mVOP
NCT = 00
260
mVOP
NCT = 01
220
mVOP
NCT = 10
180
mVOP
NCT = 11
140
mVOP
0.5
0.9
1.3
V
VMPX = 50mV; f = 150KHz
1.5
1.7
2.1
V
VMPX = 100mV; f = 150KHz
2.2
2.5
2.9
V
OVD = 11
0.5
0.9(off)
1.3
mVOP
OVD = 10
0.9
1.2
1.5
mVOP
OVD = 01
1.7
2.0
2.3
mVOP
OVD = 00
2.5
2.8
3.1
mVOP
FSC = 11
0.5
0.9(off)
1.3
V
FSC = 10
1.0
1.3
1.6
V
FSC = 01
1.5
1.8
2.1
V
FSC = 00
2.0
2.3
2.6
V
means. with
Deviation dependent(4) V
VRECT DEV
MPX = 800mV
rectifier voltage
(75KHz dev.)
o
s
b
mVOP
VMPX = 0mV
u
d
o
Rectifier Voltage
)
s
(
t
60
o
s
b
meas. with VPEAK = 1.5V
50
mVOP
mVOP
e
t
e
l
VRECT
Pr
Unit
55
NBT = 001
Noise Controlled
Trigger Threshold(3)
Max.
NBT = 111
NBT = 010
VTRNOISE
Typ.
means. with
VMPX = 0mV
VLEVEL
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