TDA7498ETR

TDA7498E Datasheet 160-watt + 160-watt dual BTL class-D audio amplifier Features PowerSSO-36 exposed pad up • 160-W + 160-W output power at THD = 10% with RL = 4 Ω and VCC = 36 V • 1 x 220 W output power mono parallel BTL at THD = 10% with RL = 3 Ω and VCC = 36 V • • • • Wide-range single-supply operation (14 - 36 V) High efficiency (η = 85%) Parallel BTL function using the MODE pin Four selectable, fixed gain settings of nominally 23.8 dB, 29.8 dB, 33.3 dB and 35.8 dB Differential inputs minimize common-mode noise Standby and mute features Smart protection Thermal overload protection Small offset less than 20 mV • • • • • Description The TDA7498E is a dual BTL class-D audio amplifier with a single power supply designed for home systems and active speaker applications. It comes in a 36-pin PowerSSO package with exposed pad up (EPU) to facilitate mounting a separate heatsink. Maturity status link TDA7498E Device summary Order code TDA7498ETR Operating temperature range 0 to 70 °C Package PowerSSO36 (EPU) Packing Tape and reel DS8807 - Rev 4 - June 2020 For further information contact your local STMicroelectronics sales office. www.st.com TDA7498E Device block diagram 1 Device block diagram The figure below shows the block diagram of one of the two identical channels of the TDA7498E. Figure 1. Internal block diagram (showing one channel only) DS8807 - Rev 4 page 2/17 TDA7498E Pin description 2 Pin description 2.1 Pinout Figure 2. Pin connections (top view, PCB view) SUB_GND 1 SVCC OUTPB 2 VREF OUTPB 3 33 INNB PGNDB 4 32 PGNDB 5 31 MODE PVCCB 6 30 GAIN PVCCB 7 OUTNB 8 28 DIAG OUTNB 9 27 SGND OUTNA 10 26 VDDS OUTNA 11 25 SYNCLK PVCCA 12 24 ROSC PVCCA 13 23 INNA PGNDA 14 PGNDA 15 OUTPA 16 OUTPA 17 PGND 18 36 VSS 35 34 29 INPB SVR 22 INPA 21 MUTE 20 STBY 19 VDDPW DS8807 - Rev 4 EP, exposed pad Connect to ground page 3/17 TDA7498E Pin list 2.2 Pin list Table 1. Pin description list DS8807 - Rev 4 Number Name Type Description 1 SUB_GND PWR 2,3 OUTPB O 4,5 PGNDB PWR Power stage ground for right channel 6,7 PVCCB PWR Power supply for right channel 8,9 OUTNB O Negative PWM output for right channel 10,11 OUTNA O Negative PWM output for left channel 12,13 PVCCA PWR Power supply for left channel 14,15 PGNDA PWR Power stage ground for left channel 16,17 OUTPA O Positive PWM output for left channel 18 PGND PWR 19 VDDPW O 3.3-V (nominal) regulator output referred to ground for power stage 20 STBY I Standby mode control 21 MUTE I Mute mode control 22 INPA I Positive differential input of left channel 23 INNA I Negative differential input of left channel 24 ROSC O Master oscillator frequency-setting pin 25 SYNCLK I/O Clock in/out for external oscillator 26 VDDS O 3.3-V (nominal) regulator output referred to ground for signal blocks 27 SGND PWR 28 DIAG O Open-drain diagnostic output 29 SVR O Supply voltage rejection 30 GAIN I Gain setting input 31 MODE I Enables stereo or mono BTL mode of operation 32 INPB I Positive differential input of right channel 33 INNB I Negative differential input of right channel 34 VREF O Half VDDS (nominal) referred to ground 35 SVCC PWR 36 VSS O 3.3-V (nominal) regulator output referred to power supply - EP - Exposed pad for heatsink, to be connected to ground Connect to the frame Positive PWM for right channel Power stage ground Signal ground Signal power supply page 4/17 TDA7498E Electrical specifications 3 Electrical specifications 3.1 Absolute maximum ratings Table 2. Absolute maximum ratings Symbol Parameter VCC 3.2 Value Unit 45 V -0.3 to 4.0 V DC supply voltage for pins PVCCA, PVCCB, SVCC VI Voltage limits for input pins STBY, MUTE, INNA, INPA, INNB, INPB, GAIN, MODE Tj Operating junction temperature 0 to 150 °C Top Operating ambient temperature 0 to 70 °C Tstg Storage temperature -40 to 150 °C Thermal data Table 3. Thermal data Symbol Rth j-case 3.3 Parameter Thermal resistance, junction to case Min. Typ. - 3.0 Max. Unit °C/W Recommended operating conditions Table 4. Recommended operating conditions Symbol VCC Tamb 3.4 Parameter Min Typ Max Unit Supply voltage for pins PVCCA, PVCCB, SVCC 14 - 39 V Ambient operating temperature 0 - 70 °C Electrical specifications Unless otherwise stated, the values in the table below are specified for the conditions: VCC = 36 V, RL = 4 Ω, ROSC = R3 = 39 kΩ, C8 = 100 nF, f = 1 kHz, GV = 23.6 dB Tamb = 25 °C. Table 5. Electrical specifications Symbol Iq Condition Min. Typ. Max. Unit Total quiescent current No LC filter, no load - 60 mA Quiescent current in standby - - 1 µA VOS Output offset voltage Vi = 0, Av = 23.6 dB, no load -20 - 20 mV IOCP Overcurrent protection threshold RL = 0 Ω 10 11 14 A Tj Junction temperature at thermal shutdown - 140 150 160 °C Ri Input resistance Differential input 69 - kΩ VUVP Undervoltage protection threshold - - - 8 V RdsON Power transistor on-resistance High side - 0.15 - Ω IqSTBY DS8807 - Rev 4 Parameter page 5/17 TDA7498E Electrical specifications Symbol Parameter (Continued) (Continued) RdsON Power transistor on-resistance Po Output power Po Parallel BTL (mono) output power, RL = 3 ohm, Vcc = 36 V η Efficiency THD GV ΔGV CT Total harmonic distortion Closed-loop gain Condition Min. 0.15 - THD = 10% - 160 - THD = 1% - 125 - THD = 10% - 220 - THD = 1% - 170 - - 85 - % - 0.05 - % Po = 1 W GAIN < 0.25*VDD 23.8 0.25*VDD < GAIN < 0.5*VDD 29.8 0.5*VDD < GAIN < 0.75*VDD 33.3 GAIN > 0.75*VDD 35.8 W W dB Gain matching - -1 - 1 dB Crosstalk f = 1 kHz, Po = 1 W 50 60 - dB Total output noise 231 A Curve µV Inputs shorted and to ground, fr = 100 Hz, Vr = 0.5 Vpp, SVRR Supply voltage rejection ratio Tr, Tf Rise and fall times - fSW Switching frequency fSWR Output switching frequency range VinH Digital input high (H) VinL Digital input low (L) AMUTE Unit (Contin ued) Ω - 400 f = 20 Hz to 20 kHz Function mode Max. Low side Inputs shorted and to ground, Vn Typ. Standby & mute & play Mute attenuation - 55 - dB - 35 - ns Internal oscillator 240 310 400 kHz With internal oscillator by changing ROSC (1) 240 - 2.0 - - - - 0.8 CSVR = 10 µF STBY < 0.5 V; MUTE = X Standby STBY > 2.5 V; MUTE < L Mute STBY > 2.5 V; MUTE > H Play VMUTE < L, VSTBY = H - 75 kHz - V dB 1. fSW = 106 / ((16 * ROSC + 182) * 4) kHz, fSYNCLK = 2 * fSW with R3 = 39 kΩ (see Figure 3. Test circuit stereo application and mono BTL mode). DS8807 - Rev 4 page 6/17 TDA7498E Test circuit 3.5 Test circuit Figure 3. Test circuit stereo application and mono BTL mode 1 C1 1uF C3 1nF C2 J1 C5 INPUT 4 L+ 1 R- R9 Q1 180K KTC3875(S) 3 R13 MONO INPUT L+, L- Only 26 VDDS 28 DIAG 1 47k R14 PS 100k 2 24 ROSC VDDS J12 VCC VDDS R11 100k 100k J8 For Single-Ended Input and MONO Config J3 MONO Config R12 100k J11 J6 J10 J5 C12 J4 S2 MUTE 1 3 1uF 1 3 OUT IC2 2 C29 2.2uF 2 R19 120k 33k R2 33k R8 VCC IN 1 L4931CZ33 3 GND C9 100nF 6.8k D1 18V 3V3 POWER SUPPLY DS8807 - Rev 4 C14 1nF R4 2 S1 STBY PVCCB 7 PVCCB 6 C10 36 VSS + + C15 2.2uF 16V C32 + 2200uF 50V L1 C18 220nF 100nF C31 1uF PGNDB 5 C21 PGNDB 4 330pF OUTNB 9 OUTNB 8 VREF 34 21 MUTE 20 STBY C7 2.2uF 16V SVR 29 1 VCC 2 GND J2 R17 8R 220nF MONO OUT D8 L2 D9 L2S 1 R- 1uF C43 C22 220nF 220nF R18 J14 8R C17 10uF 10V C16 10uF 10V R-OUTPUT Load=4 ohm R+ 2 C20 WR- GAIN SETTING Optional components or circuitry MODE SETTING TDA7498E (PSSO36) CLASS-D AMPLIFIER R16 C42 WL- VCC 33 INNB C23 + 2200uF 50V L1S R5 22R C19 32 INPB C13 1nF D6 D7 30 GAIN 31 MODE 100nF 1uF PS OUTPB 2 35 SVCC VDDS C11 3V3 3 J13 220nF 8R L3 D5 OUTPB 2 LC41 C24 220nF 25 SYNCLK TDA7498E LOUTPUT Load=4 ohm L+ 1 L3S IC1 SYNC R3 39K 220nF D4 VCC OUTNA 10 OUTNA 11 18 PGND C40 1uF MONO OUT 13 19 VDDPW J9 R10 220nF C26 WR+ C27 330pF PVCCA 12 PVCCA DIAG R15 8R C28 C30 1uF 100nF R1 100nF C8 100nF R6 22R L4 L4S WL+ C6 FREQUENCY SHIFT PGNDA 14 PGNDA 15 C25 47k R7 22R 2 R+ D3 27 SGND VDDS 100nF For Single-Ended J7 Input VCC OUTPA 16 OUTPA 17 23 INNA C4 1nF 1uF 3 L- D2 SUB_GND 22 INPA MODE JUMPER GAIN JUMPER 23.6dB J9 29.6dB J10 J11 J12 STEREO J5 33.1dB MONO J6,J3,J8 35.6dB page 7/17 TDA7498E Characterization curves 4 Characterization curves Unless otherwise stated the measurements were made under the following conditions: VCC = 36 V, f = 1 kHz, GV = 23.6 dB, ROSC = 39 kΩ, COSC = 100 nF, Tamb = 25 °C 4.1 For RL = 4 Ω, stereo configuration Figure 4. Output power vs. supply voltage Figure 6. THD vs. frequency Figure 5. THD vs. output power Figure 7. FFT performance Figure 8. Crosstalk vs. frequency DS8807 - Rev 4 page 8/17 TDA7498E For RL = 3 Ω, mono BTL configuration 4.2 For RL = 3 Ω, mono BTL configuration Figure 9. Output power vs. supply voltage Figure 10. THD vs. output power Figure 11. THD vs. frequency DS8807 - Rev 4 page 9/17 TDA7498E Application information 5 Application information 5.1 Stereo and mono BTL operation selection using the MODE pin The TDA7498E can be used in stereo applications or mono BTL applications. Connecting the MODE pin to the VDDS pin configures the device in mono BTL. The output of the two channels can be paralleled. When the MODE pin is connected to ground or floating (pulled down internally) the device works as a stereo amplifier. 5.2 Gain setting The gain of the TDA7498E is set by GAIN (pin 30). Table 6. Gain settings 5.3 GAIN Total gain Application recommendation VGAIN < 0.25*VDDS 23.6 dB GAIN pin connected to SGND 0.25*VDDS < VGAIN < 0.5*VDDS 29.6 dB Rc10 = Rc11 = Rc12 = 100 K max 0.5*VDDS < VGAIN < 0.75*VDDS 33.1 dB Rc10 = Rc11 = Rc12 = 100 K max VGAIN > 0.75VDDS 35.6 dB GAIN pin connected to VDDS Smart protection The TDA7498E embeds an overcurrent protection circuitry to protect the device from unwanted current peaks. If the overcurrent protection threshold (Table 5. Electrical specifications) is exceeded, the power stage will be shut down immediately. The device will recover automatically once the fault is removed. DS8807 - Rev 4 page 10/17 TDA7498E Package information 6 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 6.1 PowerSSO-36 EPU package information Figure 12. PowerSSO-36 EPU package outline DS8807 - Rev 4 page 11/17 TDA7498E PowerSSO-36 EPU package information Table 7. PowerSSO-36 EPU package mechanical data Symbol DS8807 - Rev 4 mm inches Min. Typ. Max. Min. Typ. Max. A 2.15 - 2.45 0.085 - 0.096 A2 2.15 - 2.35 0.085 - 0.093 a1 0 - 0.10 0 - 0.004 b 0.18 - 0.36 0.007 - 0.014 c 0.23 - 0.32 0.009 - 0.013 D 10.10 - 10.50 0.398 - 0.413 E 7.40 - 7.60 0.291 - 0.299 e - 0.5 - - 0.020 - e3 - 8.5 - - 0.335 - F - 2.3 - - 0.091 - G - - 0.10 - - 0.004 H 10.10 - 10.50 0.398 - 0.413 h - - 0.40 - - 0.016 k 0 - 8 degrees 0 - 8 degrees L 0.55 - 0.85 0.022 - 0.033 M - 4.30 - - 0.169 - N - - 10 degrees - - 10 degrees O - 1.20 - - 0.047 - Q - 0.80 - - 0.031 - S - 2.90 - - 0.114 - T - 3.65 - - 0.144 - U - 1.00 - - 0.039 - X 4.10 - 4.70 0.161 - 0.185 Y 6.50 - 7.10 0.193 - 0.280 page 12/17 TDA7498E Revision history Table 8. Document revision history DS8807 - Rev 4 Date Revision Changes 12-Dec-2011 1 Initial release. 16-Jun-2015 2 Updated VCC in Table 3: "Absolute maximum ratings" , updated Section 6.3: "Smart protection", and updated dimension L in Table 8: "PowerSSO-36 EPU package mechanical data". 10-Dec-2018 3 Updated device summary on the cover page. 25-Jun-2020 4 UpdatedFigure 12 and Y min. value in Table 7 page 13/17 TDA7498E Contents Contents 1 Device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 3 4 5 6 2.1 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.2 Pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 Absolute maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.4 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.5 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Characterization curves. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.1 For RL = 4 Ω, stereo configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 For RL = 3 Ω, mono BTL configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 5.1 Stereo and mono BTL operation selection using the MODE pin . . . . . . . . . . . . . . . . . . . . . . . 10 5.2 Gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.3 Smart protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 6.1 PowerSSO-36 EPU package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 List of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 List of figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 DS8807 - Rev 4 page 14/17 TDA7498E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Pin description list . . . . . . . . . . . . . . . . . . . . Absolute maximum ratings . . . . . . . . . . . . . . Thermal data. . . . . . . . . . . . . . . . . . . . . . . . Recommended operating conditions. . . . . . . . Electrical specifications. . . . . . . . . . . . . . . . . Gain settings . . . . . . . . . . . . . . . . . . . . . . . . PowerSSO-36 EPU package mechanical data . Document revision history . . . . . . . . . . . . . . . DS8807 - Rev 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 . 5 . 5 . 5 . 5 10 12 13 page 15/17 TDA7498E List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. DS8807 - Rev 4 Internal block diagram (showing one channel only) . Pin connections (top view, PCB view) . . . . . . . . . Test circuit stereo application and mono BTL mode . Output power vs. supply voltage . . . . . . . . . . . . . . THD vs. output power . . . . . . . . . . . . . . . . . . . . . THD vs. frequency . . . . . . . . . . . . . . . . . . . . . . . FFT performance . . . . . . . . . . . . . . . . . . . . . . . . Crosstalk vs. frequency . . . . . . . . . . . . . . . . . . . . Output power vs. supply voltage . . . . . . . . . . . . . . THD vs. output power . . . . . . . . . . . . . . . . . . . . . THD vs. frequency . . . . . . . . . . . . . . . . . . . . . . . PowerSSO-36 EPU package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 . 3 . 7 . 8 . 8 . 8 . 8 . 8 . 9 . 9 . 9 11 page 16/17 TDA7498E IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2020 STMicroelectronics – All rights reserved DS8807 - Rev 4 page 17/17