TDA7563B
4 x 50 W multifunction quad power amplifier
with built-in diagnostics feature
Datasheet production data
Features
■
Multipower BCD technology
■
MOSFET output power stage
■
DMOS power output
'!0'03
'!0'03
'!0'03
■
New high efficiency (class SB)
■
High output power capability 4 x 28 W / 4 @
14.4 V, 1 kHz, 10 % THD, 4 x 50 W max power
■
Max. output power 4 x 72 W / 2
■
Full I2C bus driving:
– Standby
– Independent front/rear soft play/mute
– Selectable gain 30 dB / 16 dB (for low noise
line output function)
– High efficiency enable/disable
– I2C bus digital diagnostics (including DC
and AC load detection)
■
Full fault protection
■
DC offset detection
■
Four independent short circuit protection
■
Clipping detector pin with selectable threshold
(2 % / 10 %)
■
Standby/mute pin
■
Linear thermal shutdown with multiple thermal
warning
■
ESD protection
Table 1.
Flexiwatt27
(Horizontal)
PowerSO36
(Slug up)
Flexiwatt27
(VertIcal)
Description
The TDA7563B is a new BCD technology quad
bridge type of car radio amplifier in Flexiwatt27 &
PowerSO36 packages specially intended for car
radio applications.
Thanks to the DMOS output stage the TDA7563B
has a very low distortion allowing a clear powerful
sound. Among the features, its superior efficiency
performance coming from the internal exclusive
structure, makes it the most suitable device to
simplify the thermal management in high power sets.
The dissipated output power under average
listening condition is in fact reduced up to 50 %
when compared to the level provided by
conventional class AB solutions.
This device is equipped with a full diagnostics
array that communicates the status of each
speaker through the I2C bus.
Device summary
Order code
Package
Packing
TDA7563B
Flexiwatt27 (vertical)
Tube
TDA7563BH
Flexiwatt27 (horizontal)
Tube
TDA7563BPD
PowerSO36
Tube
TDA7563BPDTR
PowerSO36
Tape and reel
September 2013
This is information on a product in full production.
Doc ID 12733 Rev 6
1/33
www.st.com
1
Contents
TDA7563B
Contents
1
Block diagram and application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2
Pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4
5
3.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.4
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Diagnostics functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.1
Turn-on diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.2
Permanent diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.3
Output DC offset detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.4
AC diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Multiple faults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.1
6
Thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.1
7
Faults availability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Fast muting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.1
I2C programming/reading sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.2
I2C bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.2.1
Data validity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.2.2
Start and stop conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.2.3
Byte format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.2.4
Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
8
Software specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
9
Examples of bytes sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
2/33
Doc ID 12733 Rev 6
TDA7563B
Contents
10
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Doc ID 12733 Rev 6
3/33
List of tables
TDA7563B
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
4/33
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Double fault table for turn on diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
IB1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
IB2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
DB1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
DB2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
DB3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
DB4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Doc ID 12733 Rev 6
TDA7563B
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pins connection diagram of the Flexiwatt27 (top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pins connection diagram of the PowerSO36 slug up (top view) . . . . . . . . . . . . . . . . . . . . . . 7
Quiescent current vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Output power vs. supply voltage (4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Output power vs. supply voltage (2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Distortion vs. output power (4, STD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Distortion vs. output power (4, HI-EFF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Distortion vs. output power (2, STD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Distortion vs. frequency (4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Distortion vs. frequency (2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Crosstalk vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Supply voltage rejection vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Power dissipation and efficiency vs. output power (4, STD, SINE) . . . . . . . . . . . . . . . . . 13
Power dissipation and efficiency vs. output power (4, HI-EFF, SINE) . . . . . . . . . . . . . . . 13
Power dissipation vs. average output power (audio program simulation, 4) . . . . . . . . . . 13
Power dissipation vs. average output power (audio program simulation, 2) . . . . . . . . . . 13
Turn-on diagnostic: working principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
SVR and output behavior (case 1: without turn-on diagnostic). . . . . . . . . . . . . . . . . . . . . . 14
SVR and output pin behavior (case 2: with turn-on diagnostic) . . . . . . . . . . . . . . . . . . . . . 15
Thresholds for short to GND/VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Thresholds for short across the speaker/open speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Thresholds for line-drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Restart timing without diagnostic enable (permanent) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Restart timing with diagnostic enable (permanent). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Current detection: Load impedance |Z| vs. output peak voltage. . . . . . . . . . . . . . . . . . . . . 18
Thermal foldback diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Data validity on the I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Timing diagram on the I2C bus. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Timing acknowledge clock pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Flexiwatt27 (horizontal) mechanical data and package dimensions. . . . . . . . . . . . . . . . . . 29
Flexiwatt27 (vertical) mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . 30
PowerSO36 (slug up) mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . 31
Doc ID 12733 Rev 6
5/33
Block diagram and application circuit
1
TDA7563B
Block diagram and application circuit
Figure 1.
Block diagram
#,+
$!4!
6##
6##
34
"9 -54%
4HERMAL
0ROTECTION
$UMP
)#"53
-UTE -UTE
).2&
2EFERENCE
#$?/54
#LIP
$ETECTOR
&
/542&
3HORT#IRCUIT
0ROTECTION
$IAGNOSTIC
).22
/542&
2
).,&
/5422
&
).,2
/5422
3HORT#IRCUIT
0ROTECTION
$IAGNOSTIC
/54,&
3HORT#IRCUIT
0ROTECTION
$IAGNOSTIC
2
/54,&
/54,2
3HORT#IRCUIT
0ROTECTION
$IAGNOSTIC
!#?'.$
362
2& 22
/54,2
3?'.$
4! "
,& ,2
07?'.$
*$3*36
Figure 2.
Application circuit
#
M&
#
M&
6CC
666 ##
$!4!
#,+
6CC
)#"53
/542&
/5422
#M&
).2&
#M&
).22
#M&
).,&
/54,&
#M&
).,2
3
'.$
#
M&
+
#
M&
#$/54
6/33
Doc ID 12733 Rev 6
/54,2
4!"
6
*$3*36
TDA7563B
2
Pins description
Pins description
Figure 3.
Pins connection diagram of the Flexiwatt27 (top view)
4!"
4!"
$!4!
$!4!
07?'.$22
07?'.$22
/5422
/5422
#+
#+
/5422
/5422
6##
6##
/542&
/542&
07?'.$2&
07?'.$2&
/542&
/542&
!#'.$
!#'.$
).2&
).2&
).22
).22
3?'.$
3?'.$
).,2
).,2
).,&
).,&
362
362
/54,&
/54,&
07?'.$,&
07?'.$,&
/54,&
/54,&
6##
6##
/54,2
/54,2
#$
/54
#$
/54
/54,2
/54,2
07?'.$,2
07?'.$,2
34"9
34"9
4!"
4!"
)OH[LZDWW YHUWLFDO
Figure 4.
)OH[LZDWW KRUL]RQWDO
*$3*36
Pins connection diagram of the PowerSO36 slug up (top view)
6##
4!"
/54
#+
.#
.#
.#
/54
07'.$
.#
/54
07'.$
!#'.$
6##
).
$!4!
).
/54
3'.$
/54
).
34"9
).
6##
362
07'.$
/54
.#
07'.$
/54
.#
.#
/54
.#
6##
#$
*$3*36
Doc ID 12733 Rev 6
7/33
Electrical specifications
TDA7563B
3
Electrical specifications
3.1
Absolute maximum ratings
Table 2.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
Vop
Operating supply voltage
18
V
VS
DC supply voltage
28
V
Peak supply voltage (for t = 50 ms)
50
V
CK pin voltage
6
V
Data pin voltage
6
V
IO
Output peak current (not repetitive t = 100 ms)
8
A
IO
Output peak current (repetitive f > 10 Hz)
6
A
Power dissipation Tcase = 70 °C
85
W
-55 to 150
°C
Vpeak
VCK
VDATA
Ptot
Tstg, Tj
Storage and junction temperature
3.2
Thermal data
Table 3.
Thermal data
Symbol
Rth j-case
3.3
Parameter
Thermal resistance junction-to-case
Max
PowerSO36
Flexiwatt 27
Unit
1
1
°C/W
Electrical characteristics
Refer to the test circuit, VS = 14.4 V; RL = 4 ; f = 1 kHz; GV = 30 dB; Tamb = 25 °C; unless
otherwise specified.
Table 4.
Electrical characteristics
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
Power amplifier
VS
Supply voltage range
-
8
-
18
V
Id
Total quiescent drain current
-
-
170
300
mA
Max. power (VS = 15.2 V, square
wave input (2-Vrms))
-
50
-
W
25
20
28
22
-
W
PO
8/33
Output power
THD = 10-%
THD = 1-%
Doc ID 12733 Rev 6
TDA7563B
Table 4.
Electrical specifications
Electrical characteristics (continued)
Symbol
PO
THD
Parameter
Output power
Total harmonic distortion
Test condition
Min.
Typ.
Max.
Unit
RL = 2 ; EIAJ (VS = 13.7 V)
RL = 2 ; THD 10 %
RL = 2 ; THD 1 %
RL = 2 ; max power
55
40
32
60
68
50
40
75
-
W
PO = 1 W to 10 W; STD mode
HE mode; PO = 1.5 W
HE mode; PO = 8 W
-
0.03
0.02
0.15
0.1
0.1
0.5
%
PO = 1-10 W, f = 10 kHz
-
0.2
0.5
%
GV = 16d B; STD mode
VO = 0.1 to 5 VRMS
-
0.02
0.05
%
CT
Cross talk
f = 1 kHz to 10 kHz, Rg = 600
50
60
-
dB
RIN
Input impedance
-
60
100
130
k
GV1
Voltage gain 1
-
29.5
30
30.5
dB
Voltage gain match 1
-
-1
-
1
dB
Voltage gain 2
-
15.5
16
16.5
dB
GV2
Voltage gain match 2
-
-1
-
1
dB
EIN1
Output noise voltage 1
Rg = 600 20 Hz to 22 kHz
-
50
100
µV
EIN2
Output noise voltage 2
Rg = 600 ; GV = 16 dB
20 Hz to 22 kHz
-
15
30
µV
SVR
Supply voltage rejection
f = 100 Hz to 10 kHz; Vr = 1 Vpk;
Rg = 600
50
60
-
dB
BW
Power bandwidth
-
100
-
-
kHz
ASB
Standby attenuation
-
90
110
-
dB
ISB
Standby current
Vst-by = 0
-
1
10
µA
AM
Mute attenuation
-
80
100
-
dB
VOS
Offset voltage
Mute and play
-100
0
100
mV
VAM
Min. supply mute threshold
-
7
7.5
8
V
TON
Turn on delay
D2/D1 (IB1) 0 to 1
-
5
20
ms
TOFF
Turn off delay
D2/D1 (IB1) 1 to 0
-
5
20
ms
VSBY
Standby/mute pin for st-by
-
0
-
1.5
V
VMU
Standby/mute pin for mute
-
3.5
-
5
V
Input CMRR
VCM = 1 Vpk-pk; Rg = 0
-
55
-
dB
7
-
VS
V
Vst-by/mute = 8.5 V
-
20
40
µA
Vst-by/mute < 1.5 V
-
0
5
µA
GV1
GV2
CMRR
VOP
Standby/mute pin for operating -
IMU
Standby/mute pin current
CDLK
Clip det high leakage current
CD off / VCD = 6 V
-
0
5
µA
CDSAT
Clip det sat. voltage
CD on; ICD = 1 mA
-
-
300
mV
Doc ID 12733 Rev 6
9/33
Electrical specifications
Table 4.
Symbol
CDTHD
TDA7563B
Electrical characteristics (continued)
Parameter
Clip det THD level
Test condition
Min.
Typ.
Max.
Unit
D0 (IB1) = 1
5
10
15
%
D0 (IB1) = 0
1
2
3
%
Turn on diagnostics 1 (Power amplifier mode)
Pgnd
Short to GND det. (below this
limit, the Output is considered
in short circuit to GND)
-
-
1.2
V
Pvs
Short to Vs det. (above this
limit, the output is considered in
short circuit to Vs)
Vs -1.2
-
-
V
Pnop
Normal operation thresholds.
(within these limits, the output
is considered without faults).
1.8
-
Vs -1.8
V
-
-
0.5
Power amplifier in standby
Lsc
Shorted load det.
Lop
Open load det.
130
-
Lnop
Normal load det.
1.5
-
70
Turn on diagnostics 2 (Line driver mode)
Pgnd
Short to GND det. (below this
limit, the output is considered in
short circuit to GND)
-
-
1.2
V
Pvs
Short to Vs det. (above this
limit, the output is considered in
short circuit to Vs)
Vs -1.2
-
-
V
Pnop
Normal operation thresholds.
(within these limits, the output
is considered without faults).
1.8
-
Vs -1.8
V
-
-
1.5
Power amplifier in standby
Lsc
Shorted load det.
Lop
Open Load det.
400
-
Lnop
Normal Load det.
4.5
-
200
-
-
1.2
V
Vs -1.2
-
-
V
1.8
-
Vs -1.8
V
Power amplifier mode
-
-
0.5
Line driver mode
-
-
1.5
Permanent diagnostics 2 (Power amplifier mode or line driver mode)
Pgnd
Pvs
Pnop
LSC
10/33
Short to GND det. (below this
limit, the output is considered in
short circuit to GND)
Short to Vs det. (above this
Power amplifier in mute or play,
limit, the output is considered in one or more short circuits
short circuit to Vs)
protection activated
Normal operation thresholds.
(within these limits, the output
is considered without faults).
Shorted load det.
Doc ID 12733 Rev 6
TDA7563B
Electrical specifications
Table 4.
Electrical characteristics (continued)
Symbol
Parameter
Test condition
Power amplifier in play,
AC input signals = 0
VO
Offset detection
INL
Normal load current detection
IOL
Open load current detection
VO < (VS-5)pk
Min.
Typ.
Max.
Unit
±1.5
±2
±2.5
V
500
-
-
mA
-
-
250
mA
I2C bus interface
SCL
Clock frequency
-
-
-
400
kHz
VIL
Input low voltage
-
-
-
1.5
V
VIH
Input high voltage
-
2.3
-
-
V
3.4
Electrical characteristics curves
Figure 5.
Quiescent current vs. supply voltage
Figure 6.
Output power vs. supply voltage (4)
3R :
,G P$
3RPD[
9LQ
12/2$'6
5/ 2KP
I .+]
7+'
7+'
9V 9
Figure 7.
Output power vs. supply voltage (2) Figure 8.
3R :
9V 9
*$3*36
Distortion vs. output power (4, STD)
7+'
67$1'$5'02'(
9V 9
5/ 2KP
3RPD[
5/ 2KP
I .+]
*$3*36
7+'
I .+]
I .+]
7+'
9V 9
*$3*36
Doc ID 12733 Rev 6
3R :
*$3*36
11/33
Electrical specifications
Figure 9.
TDA7563B
Distortion vs. output power (4, HI- Figure 10. Distortion vs. output power (2,
EFF)
STD)
7+'
7+'
+,())02'(
9V 9
5/ 2KP
+,())02'(
9V 9
5/ 2KP
I .+]
I .+]
I .+]
I .+]
3R :
Figure 11. Distortion vs. frequency (4)
67$1'$5'02'(
9V 9
5/ 2KP
3R :
I +]
I +]
*$3*36
Figure 14. Supply voltage rejection vs.
frequency
695 G%
&52667$/. G%
67$1'$5'02'(
5/ 2KP
3R :
5J 2KP
67' +(02'(
5J 2KP
9ULSSOH 9SN
I +]
12/33
*$3*36
Figure 13. Crosstalk vs. frequency
67$1'$5'02'(
9V 9
5/ 2KP
3R :
*$3*36
7+'
7+'
3R :
Figure 12. Distortion vs. frequency (2)
*$3*36
*$3*36
Doc ID 12733 Rev 6
I +]
*$3*36
TDA7563B
Electrical specifications
Figure 15. Power dissipation and efficiency vs. Figure 16. Power dissipation and efficiency vs.
output power (4, STD, SINE)
output power (4, HI-EFF, SINE)
Q
67$1'$5'02'(
9V 9
5/ [2KP
I .+]6,1(
Q
3WRW :
Q
3WRW :
+,())02'(
9V 9
5/ [2KP
I .+]6,1(
Q
3WRW
3WRW
3R :
*$3*36
Figure 17. Power dissipation vs. average
output power (audio program
simulation, 4)
3R :
*$3*36
Figure 18. Power dissipation vs. average
output power (audio program
simulation, 2)
0TOT7
0TOT7
34$-/$%
6S 6
2, X/HM
'!533)!../)3%
6S 6
2, X/HM
'!533)!../)3%
34$-/$%
#,)0
34! 24
()
%&&-/$%
#,)0
34!24
()
%&&-/$%
0O7
*$3*36
Doc ID 12733 Rev 6
0O7
*$3*36
13/33
Diagnostics functional description
TDA7563B
4
Diagnostics functional description
4.1
Turn-on diagnostic
It is activated at the turn-on (standby out) under I2C bus request. Detectable output faults
are:
●
Short to GND
●
Short to Vs
●
Short across the speaker
●
Open speaker
To verify if any of the above misconnections are in place, a subsonic (inaudible) current
pulse (Figure 19) is internally generated, sent through the speaker(s) and sunk back. The
turn on diagnostic status is internally stored until a successive diagnostic pulse is requested
(after a I2C reading).
If the "standby out" and "diag. enable" commands are both given through a single
programming step, the pulse takes place first (power stage still in standby mode, low,
outputs= high impedance).
Afterwards, when the amplifier is biased, the permanent diagnostic takes place. The
previous turn on state is kept until a short appears at the outputs.
Figure 19. Turn-on diagnostic: working principle
9Va9
,VRXUFH
, P$
,VRXUFH
#(
,VLQN
#(
,VLQN
aPV
W PV
0HDVXUHWLPH
'!0'03
Figure 20 and 21 show SVR and output waveforms at the turn-on (standby out) with and
without turn-on diagnostic.
Figure 20. SVR and output behavior (case 1: without turn-on diagnostic)
9VYU
2XW
3HUPDQHQWGLDJQRVWLF
DFTXLVLWLRQWLPH P67\S
%LDV SRZHUDPSWXUQRQ
,&%'$7$
14/33
W
'LDJQRVWLF(QDEOH
3HUPDQHQW
)$8/7
HYHQW
3HUPDQHQW'LDJQRVWLFVGDWD RXWSXW
SHUPLWWHGWLPH
Doc ID 12733 Rev 6
5HDG'DWD
'!0'03
TDA7563B
Diagnostics functional description
Figure 21. SVR and output pin behavior (case 2: with turn-on diagnostic)
9VYU
2XW
7XUQRQGLDJQRVWLF
DFTXLVLWLRQWLPH P67\S
3HUPDQHQWGLDJQRVWLF
DFTXLVLWLRQWLPH P67\S
W
'LDJQRVWLF(QDEOH
7XUQRQ
7XUQRQ'LDJQRVWLFVGDWD RXWSXW
SHUPLWWHGWLPH
%LDV SRZHUDPSWXUQRQ
SHUPLWWHGWLPH
)$8/7
HYHQW
'LDJQRVWLF(QDEOH
3HUPDQHQW
5HDG'DWD
3HUPDQHQW'LDJQRVWLFVGDWD RXWSXW
SHUPLWWHGWLPH
,&%'$7$
'!0'03
The information related to the outputs status is read and memorized at the end of the
current pulse top. The acquisition time is 100 ms (typ.). No audible noise is generated in the
process. As for short to GND / Vs the fault-detection thresholds remain unchanged from 30
dB to 16 dB gain setting. They are as follows:
Figure 22. Thresholds for short to GND/VS
3#TO'.$
6
X
6
.ORMAL/PERATION
6
X
63
6
3#TO6S
63
6
63
'!0'03
Concerning short across the speaker / open speaker, the threshold varies from 30 dB to 16
dB gain setting, since different loads are expected (either normal speaker's impedance or
high impedance). The values in case of 30 dB gain are as follows:
Figure 23. Thresholds for short across the speaker/open speaker
3#ACROSS,OAD
6
X
7
.ORMAL/PERATION
7
X
/PEN,OAD
7
7
)NFINITE
'!0'03
If the line-driver mode (Gv= 16 dB and line driver mode diagnostic = 1) is selected, the same
thresholds will change as follows:
Figure 24. Thresholds for line-drivers
3#ACROSS,OAD
7
7
X
.ORMAL/PERATION
7
7
X
/PEN,OAD
7
INFINITE
'!0'03
Doc ID 12733 Rev 6
15/33
Diagnostics functional description
4.2
TDA7563B
Permanent diagnostics
Detectable conventional faults are:
–
Short to GND
–
Short to Vs
–
Short across the speaker
The following additional features are provided:
–
Output offset detection
The TDA7563B has 2 operating statuses:
1.
Restart mode. The diagnostic is not enabled. Each audio channel operates
independently of each other. If any of the a.m. faults occurs, only the channel(s)
interested is shut down. A check of the output status is made every 1 ms (Figure 25).
Restart takes place when the overload is removed.
2.
Diagnostic mode. It is enabled via I2C bus and self activates if an output overload (such
as to cause the intervention of the short-circuit protection) occurs to the speakers
outputs. Once activated, the diagnostics procedure develops as follows (Figure 26):
3.
–
To avoid momentary re-circulation spikes from giving erroneous diagnostics, a
check of the output status is made after 1ms: if normal situation (no overloads) is
detected, the diagnostic is not performed and the channel returns active.
–
Instead, if an overload is detected during the check after 1 ms, then a diagnostic
cycle having a duration of about 100 ms is started.
–
After a diagnostic cycle, the audio channel interested by the fault is switched to
restart mode. The relevant data are stored inside the device and can be read by
the microprocessor. When one cycle has terminated, the next one is activated by
an I2C reading. This is to ensure continuous diagnostics throughout the car-radio
operating time.
To check the status of the device a sampling system is needed. The timing is chosen at
microprocessor level (over half a second is recommended).
Figure 25. Restart timing without diagnostic enable (permanent) - Each 1ms time, a
sampling of the fault is done
/UT
M3
M3
M3
M3
M3
T
/VERCURRENT AND SHOR T
CIRCUIT PROTECTIONINTERVENTION
IESHORT CIRCUI TT O'.$
3HORT CI RCUI TREMOVED
'!0'03
Figure 26. Restart timing with diagnostic enable (permanent)
M3
M3
M3
M3
T
/VERCURRENT ANDSHORT
CIRCUITPROTECTI ON IN TERVENTI ON
IES HORTC IRCUI TTO'.$
16/33
3HO RTCIRCUIT REMOVED
'!0'03
Doc ID 12733 Rev 6
TDA7563B
4.3
Diagnostics functional description
Output DC offset detection
Any DC output offset exceeding ±2 V is signalled out. This inconvenient might occur as a
consequence of initially defective or aged and worn-out input capacitors feeding a DC
component to the inputs, so putting the speakers at risk of overheating.
This diagnostic has to be performed with low-level output AC signal (or Vin = 0).
The test is run with selectable time duration by microprocessor (from a "start" to a "stop"
command):
–
Start = Last reading operation or setting IB1 - D5 - (offset enable) to 1
The TDA7563B signals out an offset to the user if this offset condition is stable during the
assigned testing time. This feature is disabled if any overloads leading to activation of the
short-circuit protection occurs in the process.
4.4
AC diagnostic
It is targeted at detecting accidental disconnection of tweeters in 2-way speaker and, more
in general, presence of capacitively (AC) coupled loads.
This diagnostic is based on the notion that the overall speaker's impedance (woofer +
parallel tweeter) will tend to increase towards high frequencies if the tweeter gets
disconnected, because the remaining speaker (woofer) would be out of its operating range
(high impedance). The diagnostic decision is made according to peak output current
thresholds, as follows:
Iout > 500 mApk = normal status
Iout < 250 mApk = open tweeter
To correctly implement this feature, it is necessary to briefly provide a signal tone (with the
amplifier in "play") whose frequency and magnitude are such as to determine an output
current higher than 500 mApk with in normal conditions and lower than 250 mApk should
the parallel tweeter be missing.
The test has to last for a minimum number of 3 sine cycles starting from the activation of the
AC diagnostic function IB2 < D2 > 0 up to the I2C reading of the results (measuring period).
To confirm presence of tweeter, it is necessary to find at least 3 current pulses over 500 mA
over all the measuring period, else an "open tweeter" message will be issued.
The frequency / magnitude setting of the test tone depends on the impedance
characteristics of each specific speaker being used, with or without the tweeter connected
(to be calculated case by case). High-frequency tones (> 10 kHz) or even ultrasonic signals
are recommended for their negligible acoustic impact and also to maximize the impedance
module's ratio between with tweeter-on and tweeter-off.
Figure 27 shows the load impedance as a function of the peak output voltage and the
relevant diagnostic fields.
This feature is disabled if any overloads leading to activation of the short-circuit protection
occurs in the process.
Doc ID 12733 Rev 6
17/33
Diagnostics functional description
TDA7563B
Figure 27. Current detection: Load impedance |Z| vs. output peak voltage
,O AD\Z\/HM
)OUTPEAK M!
,OWCURRENTDETECTIONAREA
/PENLOAD
$ OFTHE$"XBYRES
)OUTPEAK M!
)"$
(IGHCURRENTDETECTIONAREA
.ORMALLOAD
$ OFTHE$"XBYTES
6OUT 0EAK
18/33
Doc ID 12733 Rev 6
'!0'03
TDA7563B
5
Multiple faults
Multiple faults
When more misconnections are simultaneously in place at the audio outputs, it is
guaranteed that at least one of them is initially read out. The others are notified after
successive cycles of I2C reading and faults removal, provided that the diagnostic is enabled.
This is true for both kinds of diagnostic (Turn on and Permanent).
The table below shows all the couples of double-fault possible. It should be taken into
account that a short circuit with the 4 ohm speaker unconnected is considered as double
fault.
Table 5.
Double fault table for turn on diagnostic
S. GND (so)
S. GND (sk)
S. Vs
S. Across L.
Open L.
S. GND (so)
S. GND
S. GND
S. Vs + S. GND
S. GND
S. GND
S. GND (sk)
/
S. GND
S. Vs
S. GND
Open L. (*)
S. Vs
/
/
S. Vs
S. Vs
S. Vs
S. Across L.
/
/
/
S. Across L.
N.A.
Open L.
/
/
/
/
Open L. (*)
S. GND (so) / S. GND (sk) in the above table make a distinction according to which of the 2
outputs is shorted to ground (test-current source side= so, test-current sink side = sk). More
precisely, in Channels LF and RR, so = CH+, sk = CH-; in Channels LR and RF, so = CH-, sk
= CH+.
In permanent diagnostic the table is the same, with only a difference concerning open load
(*), which is not among the recognizable faults. Should an open load be present during the
device's normal working, it would be detected at a subsequent Turn on Diagnostic cycle (i.e.
at the successive car radio turn-on).
5.1
Faults availability
All the results coming from I2C bus, by read operations, are the consequence of
measurements inside a defined period of time. If the fault is stable throughout the whole
period, it will be sent out.
To guarantee always resident functions, every kind of diagnostic cycles (turn-on, permanent,
offset) will be reactivate after any I2C reading operation. So, when the micro reads the I2C, a
new cycle will be able to start, but the read data will come from the previous diag. cycle (i.e.
The device is in turn-on state, with a short to GND, then the short is removed and micro
reads I2C. The short to GND is still present in bytes, because it is the result of the previous
cycle. If another I2C reading operation occurs, the bytes do not show the short). In general
to observe a change in diagnostic bytes, two I2C reading operations are necessary.
Doc ID 12733 Rev 6
19/33
Thermal protection
6
TDA7563B
Thermal protection
Thermal protection is implemented through thermal foldback (Figure 28).
Thermal foldback begins limiting the audio input to the amplifier stage as the junction
temperatures rise above the normal operating range. This effectively limits the output power
capability of the device thus reducing the temperature to acceptable levels without totally
interrupting the operation of the device.
The output power will decrease to the point at which thermal equilibrium is reached.
Thermal equilibrium will be reached when the reduction in output power reduces the
dissipated power such that the die temperature falls below the thermal foldback threshold.
Should the device cool, the audio level will increase until a new thermal equilibrium is
reached or the amplifier reaches full power. Thermal foldback will reduce the audio output
level in a linear manner.
Three thermal warning are available through the I2C bus data.
Figure 28. Thermal foldback diagram
6OUT
6OUT
4(7!2.
4(7!2 .
4(7!2 .
/.
/.
/.
4(3(
34!24
43$
#$OUT
4(3(
%.$
43$ WITHSAMEINPUT
SIGNAL
4J #
4J #
4J #
6.1
'!0'03
Fast muting
The muting time can be shortened to less than 1.5 ms by setting (IB2) D5 = 1. This option
can be useful in transient battery situations (i.e. during car engine cranking) to quickly
turnoff the amplifier for avoid any audible effects caused by noise/transients being injected
by preamp stages. The bit must be set back to “0” shortly after the mute transition.
20/33
Doc ID 12733 Rev 6
I2C bus
TDA7563B
7
I2C bus
7.1
I2C programming/reading sequences
A correct turn on/off sequence respectful of the diagnostic timings and producing no audible
noises could be as follows (after battery connection):
7.2
–
TURN-ON: PIN2 > 7 V --- 10 ms --- (STANDBY OUT + DIAG ENABLE) --- 500 ms
(min) --- MUTING OUT
–
TURN-OFF: MUTING IN --- 20 ms --- (DIAG DISABLE + STANDBY IN) --- 10 ms -- PIN2 = 0
–
Car radio installation: PIN2 > 7V --- 10ms DIAG ENABLE (write) --- 200 ms --- I2C
read (repeat until All faults disappear).
–
OFFSET TEST: Device in play (no signal) -- OFFSET ENABLE - 30 ms - I2C
reading (repeat I2C reading until high-offset message disappears).
I2C bus interface
Data transmission from microprocessor to the TDA7563B and viceversa takes place through
the 2 wires I2C bus interface, consisting of the two lines SDA and SCL (pull-up resistors to
positive supply voltage must be connected).
7.2.1
Data validity
As shown by Figure 29, the data on the SDA line must be stable during the high period of
the clock. The high and low state of the data line can only change when the clock signal on
the SCL line is low.
7.2.2
Start and stop conditions
As shown by Figure 30 a start condition is a high to low transition of the SDA line while SCL
is high. The stop condition is a low to high transition of the SDA line while SCL is high.
7.2.3
Byte format
Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an
acknowledge bit. The MSB is transferred first.
Doc ID 12733 Rev 6
21/33
I2C bus
7.2.4
TDA7563B
Acknowledge
The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock
pulse (see Figure 31). The receiver**, in order to acknowledge, has to pull-down (LOW) the
SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during this
clock pulse.
* Transmitter
–
master (P) when it writes an address to the TDA7563B
–
slave (TDA7563B) when the P reads a data byte from TDA7563B
** Receiver
–
slave (TDA7563B) when the P writes an address to the TDA7563B
–
master (µP) when it reads a data byte from TDA7563B
Figure 29. Data validity on the I2C bus
3$!
3#,
$!4!,).%
34!",% $!4!
6!,)$
#(!.'%
$!4!
!,,/7%$
'!0'03
Figure 30. Timing diagram on the I2C bus
3#,
)#"53
3$!
34!24
34/0
'!0'03
Figure 31. Timing acknowledge clock pulse
3#,
3$!
-3"
!#+./7,%$'-%.4
&2/-2%#%)6%2
34!24
22/33
Doc ID 12733 Rev 6
'!0'03
TDA7563B
8
Software specifications
Software specifications
All the functions of the TDA7563B are activated by I2C interface.
The bit 0 of the "Address Byte" defines if the next bytes are write instruction (from µP to
TDA7563B) or read instruction (from TDA7563B to µP).
Chip address
D7
D0
1
1
0
1
1
0
0
X
D8 Hex
X = 0 Write to device
X = 1 Read from device
If R/W = 0, the P sends 2 "Instruction Bytes": IB1 and IB2.
Table 6.
IB1
Bit
Instruction decoding bit
D7
0
D6
Diagnostic enable (D6 = 1)
Diagnostic defeat (D6 = 0)
D5
Offset detection enable (D5 = 1)
Offset detection defeat (D5 = 0)
D4
Front channel
Gain = 30 dB (D4 = 0)
Gain = 16 dB (D4 = 1)
D3
Rear channel
Gain = 30 dB (D3 = 0)
Gain = 16 dB (D3 = 1)
D2
Mute front channels (D2 = 0)
Unmute front channels (D2 = 1)
D1
Mute rear channels (D1 = 0)
Unmute rear channels (D1 = 1)
D0
CD 2% (D0 = 0)
CD 10% (D0 = 1)
Doc ID 12733 Rev 6
23/33
Software specifications
Table 7.
TDA7563B
IB2
Bit
Instruction decoding bit
D7
0
D6
0
D5
Normal muting time (D5 = 0)
Fast muting time (D5 = 1)
D4
Standby on - Amplifier not working - (D4 = 0)
Standby off - Amplifier working - (D4 = 1)
D3
Power amplifier mode diagnostic (D3 = 0)
Line driver mode diagnostic (D3 = 1)
D2
Current detection diagnostic enabled (D2 =1)
Current detection diagnostic defeat (D2 =0)
D1
Right channel power amplifier working in standard mode (D1 = 0)
Power amplifier working in high efficiency mode (D1 = 1)
D0
Left channel power amplifier working in standard mode (D0 = 0)
Power amplifier working in high efficiency mode (D0 = 1)
If R/W = 1, the TDA7563B sends 4 "Diagnostics Bytes" to P: DB1, DB2, DB3 and DB4.
Table 8.
DB1
Bit
24/33
Instruction decoding bit
D7
Thermal warning 1 active (D7 = 1), Tj =155°C
D6
Diag. cycle not activated or not terminated (D6 = 0)
Diag. cycle terminated (D6 = 1)
D5
Channel LF
Current Detection
Output peak current < 250mA - Output load (D5 = 1)
Output peak current > 500mA - Output load (D5 = 0)
D4
Channel LF
Turn-on diagnostic (D4 = 0)
Permanent diagnostic (D4 = 1)
D3
Channel LF
Normal load (D3 = 0)
Short load (D3 = 1)
D2
Channel LF
Turn-on diag.: No open load (D2 = 0)
Open load detection (D2 = 1)
Offset diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)
D1
Channel LF
No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)
D0
Channel LF
No short to GND (D1 = 0)
Short to GND (D1 = 1)
Doc ID 12733 Rev 6
TDA7563B
Software specifications
Table 9.
DB2
Bit
Instruction decoding bit
D7
Offset detection not activated (D7 = 0)
Offset detection activated (D7 = 1)
D6
X
D5
Channel LR
Current Detection
Output peak current < 250mA - Output load (D5 = 1)
Output peak current > 500mA - Output load (D5 = 0)
D4
Channel LR
Turn-on diagnostic (D4 = 0)
Permanent diagnostic (D4 = 1)
D3
Channel LR
Normal load (D3 = 0)
Short load (D3 = 1)
D2
Channel LR
Turn-on diag.: No open load (D2 = 0)
Open load detection (D2 = 1)
Permanent diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)
D1
Channel LR
No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)
D0
Channel LR
No short to GND (D1 = 0)
Short to GND (D1 = 1)
Doc ID 12733 Rev 6
25/33
Software specifications
Table 10.
TDA7563B
DB3
Bit
26/33
Instruction decoding bit
D7
Standby status (= IB2 - D4)
D6
Diagnostic status (= IB1 - D6)
D5
Channel RF
Current detection
Output peak current 500mA - Output load (D5 = 0)
D4
Channel RF
Turn-on diagnostic (D4 = 0)
Permanent diagnostic (D4 = 1)
D3
Channel RF
Normal load (D3 = 0)
Short load (D3 = 1)
D2
Channel RF
Turn-on diag.: No open load (D2 = 0)
Open load detection (D2 = 1)
Permanent diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)
D1
Channel RF
No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)
D0
Channel RF
No short to GND (D1 = 0)
Short to GND (D1 = 1)
Doc ID 12733 Rev 6
TDA7563B
Software specifications
Table 11.
DB4
Bit
Instruction decoding bit
D7
Thermal warning 2 active (D7 = 1), Tj = 140°C
D6
Thermal warning 3 active (D6 = 1) Tj = 120°C
D5
Channel RR
Current detection
Output peak current 500mA - Output load (D5 = 0)
D4
Channel RR
Turn-on diagnostic (D4 = 0)
Permanent diagnostic (D4 = 1)
D3
Channel R
R Normal load (D3 = 0)
Short load (D3 = 1)
D2
Channel RR
Turn-on diag.: No open load (D2 = 0)
Open load detection (D2 = 1)
Permanent diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)
D1
Channel RR
No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)
D0
Channel RR
No short to GND (D1 = 0)
Short to GND (D1 = 1)
Doc ID 12733 Rev 6
27/33
Examples of bytes sequence
9
TDA7563B
Examples of bytes sequence
1 - Turn-On diagnostic - write operation
Start
Address byte with D0 = 0
ACK
IB1 with D6 = 1
ACK
IB2
ACK
STOP
2 - Turn-On diagnostic - read operation
Start Address byte with D0 = 1 ACK DB1
ACK DB2 ACK DB3 ACK DB4 ACK STOP
The delay from 1 to 2 can be selected by software, starting from 1ms
3a - Turn-on of the power amplifier with 30dB gain, mute on, diagnostic defeat, CD = 2%
.
Start
Address byte with D0 = 0
ACK
IB1
ACK
X0000000
IB2
ACK
STOP
ACK
STOP
ACK
STOP
XXX1XX11
3b - Turn-off of the power amplifier
Start
Address byte with D0 = 0
ACK
IB1
ACK
X0XXXXXX
IB2
XXX0XXXX
4 - Offset detection procedure enable
Start
Address byte with D0 = 0
ACK
IB1
XX1XX11X
ACK
IB2
XXX1XXXX
5 - Offset detection procedure stop and reading operation (the results are valid only for the
offset detection bits (D2 of the bytes DB1, DB2, DB3, DB4)
.
Start Address byte with D0 = 1 ACK DB1
28/33
ACK
DB2 ACK DB3 ACK DB4 ACK STOP
●
The purpose of this test is to check if a D.C. offset (2V typ.) is present on the outputs,
produced by input capacitor with anomalous leakage current or humidity between pins.
●
The delay from 4 to 5 can be selected by software, starting from 1ms
Doc ID 12733 Rev 6
TDA7563B
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 32. Flexiwatt27 (horizontal) mechanical data and package dimensions
',0
$
%
&
'
(
)
*
*
+
+
+
+
/
/
/
/
/
/
/
0
0
0
1
3
5
5
5
5
5
9
9
9
9
PP
7
工商网监
湘ICP备2023018690号
