TDA7564
MULTIFUNCTION QUAD POWER AMPLIFIER
WITH BUILT-IN DIAGNOSTICS FEATURES
■
■
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DMOS POWER OUTPUT
NON-SWITCHING HI-EFFICIENCY
HIGH OUTPUT POWER CAPABILITY 4x28W/4Ω
@ 14.4V, 1KHZ, 10% THD, 4x40W EIAJ
MAX. OUTPUT POWER 4x72W/2Ω
MULTIPOWER BCD TECHNOLOGY
MOSFET OUTPUT POWER STAGE
)
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FULL I2C BUS DRIVING:
– ST-BY
– INDEPENDENT FRONT/REAR SOFT PLAY/
MUTE
– SELECTABLE GAIN 26dB - 12dB (FOR
LOW NOISE LINE OUTPUT FUNCTION)
– HIGH EFFICIENCY ENABLE/DISABLE
– I2C BUS DIGITAL DIAGNOSTICS
FULL FAULT PROTECTION
DC OFFSET DETECTION
FOUR INDEPENDENT SHORT CIRCUIT
PROTECTION
CLIPPING DETECTOR (2% - 10%)
PROTECTION
FLEXIWATT25
ORDERING NUMBER: TDA7564
tions. Thanks to the DMOS output stage the
TDA7564 has a very low distortion allowing a clear
powerful sound. Among the features, its superior
efficiency performance coming from the internal
exclusive structure, makes it the most suitable device to simplify the thermal management in high
power sets.The dissipated output power under average listening condition is in fact reduced up to
50% when compared to the level provided by conventional class AB solutions.This device is
equipped with a full diagnostics array that communicates the status of each speaker through the I 2C
bus.The possibility to control the configuration and
behaviour of the device by means of the I2C bus
makes TDA7564 a very flexible machine.
DESCRIPTION
The TDA7564 is a new BCD technology QUAD
BRIDGE type of car radio amplifier in Flexiwatt25
package specially intended for car radio applicaBLOCK DIAGRAM
CLK
THERMAL
PROTECTION
& DUMP
DATA
VCC1 VCC2
CD_OUT
I2CBUS
MUTE1
REFERENCE
MUTE2
CLIP
DETECTOR
OUT RF+
IN RF
OUT RF-
12/26dB
SHORT CIRCUIT
PROTECTION &
DIAGNOSTIC
IN RR
OUT RR+
OUT RR-
12/26dB
SHORT CIRCUIT
PROTECTION &
DIAGNOSTIC
IN LF
OUT LF+
OUT LF-
12/26dB
SHORT CIRCUIT
PROTECTION &
DIAGNOSTIC
OUT LR+
IN LR
OUT LR-
12/26dB
SHORT CIRCUIT
PROTECTION &
DIAGNOSTIC
SVR
AC_GND
TAB
S_GND
RF
RR
LF
LR
D00AU1211
PW_GND
September 2003
1/20
TDA7564
ABSOLUTE MAXIMUM RATINGS
Symbol
Value
Unit
Vop
Operating Supply Voltage
18
V
VS
DC Supply Voltage
28
V
Peak Supply Voltage (for t = 50ms)
50
V
CK pin Voltage
6
V
Vpeak
VCK
Parameter
Data Pin Voltage
6
V
IO
Output Peak Current (not repetitive t = 100ms)
8
A
IO
Output Peak Current (repetitive f > 10Hz)
6
A
VDATA
Ptot
Power Dissipation Tcase = 70°C
85
W
-55 to 150
°C
Value
Unit
1
°C/W
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Tstg, Tj
Storage and Junction Temperature
THERMAL DATA
Symbol
Rth j-case
Parameter
Max.
Thermal Resistance Junction to case
PIN CONNECTION (Top view)
25
DATA
24
PW_GND RR
23
OUT RR-
22
CK
OUT RR+
20
VCC2
19
OUT RF-
18
PW_GND RF
17
OUT RF+
16
AC GND
15
IN RF
14
IN RR
13
S GND
12
IN LR
11
IN LF
10
SVR
9
OUT LF+
8
PW_GND LF
7
OUT LF-
6
VCC1
OUT LR+
4
CD-OUT
3
OUT LR-
2
PW_GND LR
1
TAB
D99AU1037
2/20
TDA7564
Figure 1. Application Circuit
C8
0.1µF
C7
3300µF
Vcc1
Vcc2
6
DATA
20
17
18
25
I2C BUS
19
CLK
22
21
C1 0.22µF
IN RF
+
OUT RF
+
24
15
23
OUT RR
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C2 0.22µF
IN RR
9
14
8
7
C3 0.22µF
IN LF
+
11
5
OUT LF
+
2
C4 0.22µF
IN LR
12
S-GND
13
3
16
10
4
1
OUT LR
-
TAB
47K
C5
1µF
C6
10µF
V
D00AU1212
CD OUT
3/20
TDA7564
ELECTRICAL CHARACTERISTICS
(Refer to the test circuit, VS = 14.4V; RL = 4Ω; f = 1KHz; Tamb = 25°C; unless otherwise specified.)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
18
V
300
mA
POWER AMPLIFIER
VS
Supply Voltage Range
Id
Total Quiescent Drain Current
PO
Output Power
8
170
EIAJ (VS = 13.7V)
35
40
W
THD = 10%
THD = 1%
25
28
22
W
W
RL = 2Ω; EIAJ (VS = 13.7V)
RL = 2Ω; THD 10%
RL = 2Ω; THD 1%
RL = 2Ω; MAX POWER
55
40
62
46
35
72
W
W
W
W
)
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THD
Total Harmonic Distortion
CT
Cross Talk
RIN
GV1
∆GV1
PO = 1W to 10W; STD MODE
HE MODE; PO = 1.5W
HE MODE; PO = 8W
0.02
0.015
0.15
0.1
0.1
0.5
%
%
%
GV = 12dB; STD Mode
VO = 0.1 to 5VRMS
0.02
0.05
%
f = 1KHz to 10KHz, Rg = 600Ω
50
60
Input Impedance
60
100
130
KΩ
Voltage Gain 1
25
26
27
dB
Voltage Gain Match 1
-1
1
dB
13
dB
1
dB
Voltage Gain 2
11
∆GV2
Voltage Gain Match 2
-1
GV2
12
dB
EIN1
Output Noise Voltage 1
Rg = 600Ω, 20Hz to 22kHz
35
100
µV
EIN2
Output Noise Voltage 2
Rg = 600Ω; GV = 12dB
20Hz to 22kHz
12
30
µV
SVR
Supply Voltage Rejection
f = 100Hz to 10kHz; Vr = 1Vpk;
Rg = 600Ω
50
60
dB
BW
Power Bandwidth
100
ASB
Stand-by Attenuation
90
110
KHz
ISB
Stand-by Current Consumption
AM
Mute Attenuation
80
100
VOS
Offset Voltage
Mute & Play
-100
0
100
mV
25
dB
100
µA
dB
TON
Turn ON Delay
D2/D1 (IB1) 0 to 1
20
40
ms
TOFF
Turn OFF Delay
D2/D1 (IB1) 1 to 0
20
40
ms
VAM
Min. Supply Mute Threshold
7
CDLK
Clip Det High Leakage Current
CD off
CDSAT
Clip Det Sat. Voltage
CD on; ICD = 1mA
CDTHD
Clip Det THD level
7.5
8
V
0
15
µA
150
300
mV
D0 (IB1) = 0
1
2
3
%
D0 (IB1) = 1
5
10
15
%
1.2
V
TURN ON DIAGNOSTICS 1 (Power Amplifier Mode)
Pgnd
Short to GND det. (below this
limit, the Output is considered in
Short Circuit to GND)
Pvs
Short to Vs det. (above this limit,
the Output is considered in Short
Circuit to Vs)
4/20
Power Amplifier in st-by
Vs -1.2
V
TDA7564
ELECTRICAL CHARACTERISTICS (continued)
(Refer to the test circuit, VS = 14.4V; RL = 4Ω; f = 1KHz; Tamb = 25°C; unless otherwise specified.)
Symbol
Parameter
Pnop
Normal operation thresholds.
(Within these limits, the Output is
considered without faults).
Lsc
Test Condition
Power Amplifier in st-by
Min.
Typ.
1.8
Shorted Load det.
Lop
Open Load det.
Lnop
Normal Load det.
Max.
Unit
Vs -1.8
V
0.5
Ω
Ω
85
1.75
45
Ω
1.2
V
TURN ON DIAGNOSTICS 2 (Line Driver Mode)
Pgnd
Short to GND det. (below this
limit, the Output is considered in
Short Circuit to GND)
Power Amplifier in st-by
Pvs
Short to Vs det. (above this limit,
the Output is considered in Short
Circuit to VS)
Vs -1.2
Pnop
Normal operation thresholds.
(Within these limits, the Output is
considered without faults).
1.8
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Lsc
Shorted Load det.
Lop
Open Load det.
Lnop
Normal Load det.
V
Vs -1.8
V
2
Ω
Ω
330
7
180
Ω
1.2
V
PERMANENT DIAGNOSTICS 2 (Power Amplifier Mode or Line Driver Mode)
Pgnd
Short to GND det. (below this
limit, the Output is considered in
Short Circuit to GND)
Pvs
Short to Vs det. (above this limit,
the Output is considered in Short
Circuit to VS)
Vs -1.2
Pnop
Normal operation thresholds.
(Within these limits, the Output is
considered without faults).
1.8
LSC
Shorted Load Det.
Power Amplifier in Mute or Play,
one or more short circuits
protection activated
V
Vs -1.8
V
Pow. Amp. mode
0.5
Ω
Line Driver mode
2
Ω
±2.5
V
VO
Offset Detection
Power Amplifier in play,
AC Input signals = 0
INL
Normal load current detection
VO < (VS - 5)pk
500
mA
IOL
Open load current detection
VO < (VS - 5)pk
250
mA
±1.5
±2
2
I C BUS INTERFACE
fSCL
Clock Frequency
VIL
Input Low Voltage
VIH
Input High Voltage
400
KHz
1.5
2.3
V
V
5/20
TDA7564
Figure 2. Quiescent Current vs. Supply Voltage
Figure 5. Distortion vs. Output Power (4Ω, STD)
Id (mA)
THD (%)
250
10
230
Vin = 0
NO LOADS
210
190
STANDARD MODE
Vs = 14.4 V
RL = 4 Ohm
1
170
150
f = 10 KHz
130
0.1
110
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f = 1 KHz
90
70
8
10
12
14
16
18
Vs (V)
0.01
0.1
1
10
Po (W)
Figure 3. Output Power vs. Supply Voltage (4Ω)
Figure 6. Distortion vs. Output Power (4Ω, HI-EFF)
THD (%)
Po (W)
10
70
Po-max
65
60
RL = 4 Ohm
f = 1 KHz
55
1
50
45
HI-EFF MODE
Vs = 14.4 V
RL = 4 Ohm
THD = 10 %
f = 10 KHz
40
0.1
35
30
f = 1 KHz
25
THD = 1 %
20
0.01
15
10
5
8
9
10
11
12
13
Vs (V)
14
15
16
17
18
0.001
0.1
1
10
Po (W)
Figure 4. Output Power vs. Supply Voltage (2Ω)
Figure 7. Distortion vs. Output Power (2Ω, STD)
Po (W)
THD (%)
100
10
90
Po-max
STANDARD MODE
Vs = 14.4 V
RL = 2 Ohm
RL = 2 Ohm
f = 1 KHz
80
70
1
60
f = 10 KHz
THD = 10 %
50
40
0.1
f = 1 KHz
30
THD = 1 %
20
10
8
6/20
9
10
11
12
Vs (V)
13
14
15
16
0.01
0.1
1
10
Po (W)
TDA7564
Figure 11. Supply Voltage Rejection vs. Freq.
Figure 8. Distortion vs. Frequency (4Ω)
THD (%)
SVR (dB)
10
90
80
STANDARD MODE
Vs = 14.4 V
RL = 4 Ohm
Po = 4 W
1
70
60
50
0.1
STD & HE MODE
Rg = 600 Ohm
Vripple = 1 Vpk
40
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30
0.01
10
100
1000
10000
20
10
100
1000
10000
f (Hz)
f (Hz)
Figure 9. Distortion vs. Frequency (2Ω)
Figure 12. Power Dissipation & Efficiency vs.
Output Power (4Ω, STD, SINE)
THD (%)
n (%)
Ptot (W)
10
90
90
n
80
1
STANDARD MODE
Vs = 14.4 V
RL = 2 Ohm
Po = 8 W
STANDARD MODE
Vs = 14.4 V
RL = 4 x 4 Ohm
f = 1 KHz SINE
70
60
50
40
0.1
10
100
1000
10000
f (Hz)
Ptot
70
60
50
40
30
30
20
20
10
10
0
0
Figure 10. Crosstalk vs. Frequency
80
2
4
6
8
0
10 12 14 16 18 20 22 24 26 28 30
Po (W)
Figure 13. Power Dissipation & Efficiency vs.
Output Power (4W, HI-EFF, SINE)
CROSSTALK (dB)
Ptot (W)
90
90
80
80
70
70
60
n (%)
90
80
HI-EFF MODE
Vs = 14.4 V
RL = 4 x 4 Ohm
f = 1 KHz SINE
n
70
60
60
50
50
STANDARD MODE
RL = 4 Ohm
Po = 4 W
Rg = 600 Ohm
40
40
30
20
10
50
Ptot
100
1000
f (Hz)
10000
40
30
30
20
20
10
10
0
0.1
0
1
10
Po (W)
7/20
TDA7564
Figure 15. Power Dissipation vs. Average
Ouput Power (Audio Program
Simulation, 2Ω)
Figure 14. Power Dissipation vs. Average
Ouput Power (Audio Program
Simulation, 4Ω)
Ptot (W)
Ptot (W)
45
90
40
35
80
STD MODE
Vs = 14 V
RL = 4 x 4 Ohm
GAUSSIAN NOISE
70
30
Vs = 14 V
RL = 4 x 2 Ohm
GAUSSIAN NOISE
STD MODE
60
CLIP
START
25
50
HI-EFF MODE
20
CLIP
START
40
HI-EFF MODE
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15
30
10
20
5
10
0
0
0
1
2
3
4
5
0
1
2
3
Po (W)
4
5
Po (W)
6
7
8
9
DIAGNOSTICS FUNCTIONAL DESCRIPTION:
a) TURN-ON DIAGNOSTIC
It is activated at the turn-on (stand-by out) under I2Cbus request. Detectable output faults are:
– SHORT TO GND
– SHORT TO Vs
– SHORT ACROSS THE SPEAKER
– OPEN SPEAKER
To verify if any of the above misconnections are in place, a subsonic (inaudible) current pulse (fig. 16) is internally generated, sent through the speaker(s) and sunk back.The Turn On diagnostic status is internally stored
until a successive diagnostic pulse is requested (after a I2C reading).
If the "stand-by out" and "diag. enable" commands are both given through a single programming step, the pulse
takes place first (power stage still in stand-by mode, low, outputs= high impedance).
Afterwards, when the Amplifier is biased, the PERMANENT diagnostic takes place. The previous Turn On state
is kept until a short appears at the outputs.
Figure 16. Turn - On diagnostic: working principle
Vs~5V
Isource
I (mA)
Isource
Isink
CH+
CH-
Isink
~100mS
Measure time
8/20
t (ms)
TDA7564
Fig. 17 and 18 show SVR and OUTPUT waveforms at the turn-on (stand-by out) with and without TURN-ON
DIAGNOSTIC.
Figure 17. SVR and Output behaviour (CASE 1: without turn-on diagnostic)
Vsvr
Out
Permanent diagnostic
acquisition time (100mS Typ)
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t
Diagnostic Enable
(Permanent)
Bias (power amp turn-on)
I2CB DATA
FAULT
event
Read Data
Permanent Diagnostics data (output)
permitted time
Figure 18. SVR and Output pin behaviour (CASE 2: with turn-on diagnostic)
Vsvr
Out
Turn-on diagnostic
acquisition time (100mS Typ)
Permanent diagnostic
acquisition time (100mS Typ)
t
Diagnostic Enable
(Turn-on)
Turn-on Diagnostics data (output)
permitted time
Bias (power amp turn-on)
permitted time
Diagnostic Enable
(Permanent)
Read Data
FAULT
event
Permanent Diagnostics data (output)
permitted time
I2CB DATA
9/20
TDA7564
The information related to the outputs status is read and memorized at the end of the current pulse top. The
acquisition time is 100 ms (typ.). No audible noise is generated in the process. As for SHORT TO GND / Vs the
fault-detection thresholds remain unchanged from 26 dB to 12 dB gain setting. They are as follows:
S.C. to GND
0V
x
1.2V
Normal Operation
1.8V
x
VS-1.8V
S.C. to Vs
VS-1.2V
D01AU1253
VS
Concerning SHORT ACROSS THE SPEAKER / OPEN SPEAKER, the threshold varies from 26 dB to 12 dB
gain setting, since different loads are expected (either normal speaker's impedance or high impedance). The
values in case of 26 dB gain are as follows:
)
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S.C. across Load
0V
x
0.5Ω
Normal Operation
1.75Ω
x
Open Load
85Ω
45Ω
Infinite
D01AU1327
If the Line-Driver mode (Gv= 12 dB and Line Driver Mode diagnostic = 1) is selected, the same thresholds will
change as follows:
S.C. across Load
0Ω
2Ω
x
Normal Operation
7Ω
180Ω
x
Open Load
330Ω
infinite
D02AU1340
b) PERMANENT DIAGNOSTICS.
Detectable conventional faults are:
– SHORT TO GND
– SHORT TO Vs
– SHORT ACROSS THE SPEAKER
The following additional features are provided:
– OUTPUT OFFSET DETECTION
The TDA7564 has 2 operating statuses:
1 RESTART mode. The diagnostic is not enabled. Each audio channel operates independently from each
other. If any of the a.m. faults occurs, only the channel(s) interested is shut down. A check of the output
status is made every 1 ms (fig. 19). Restart takes place when the overload is removed.
2 DIAGNOSTIC mode. It is enabled via I2C bus and self activates if an output overload (such to cause
the intervention of the short-circuit protection) occurs to the speakers outputs. Once activated, the diagnostics procedure develops as follows (fig. 20):
– To avoid momentary re-circulation spikes from giving erroneous diagnostics, a check of the output status is made after 1ms: if normal situation (no overloads) is detected, the diagnostic is not performed and
the channel returns back active.
– Instead, if an overload is detected during the check after 1 ms, then a diagnostic cycle having a duration
of about 100 ms is started.
10/20
TDA7564
– After a diagnostic cycle, the audio channel interested by the fault is switched to RESTART mode. The
relevant data are stored inside the device and can be read by the microprocessor. When one cycle has
terminated, the next one is activated by an I2C reading. This is to ensure continuous diagnostics
throughout the car-radio operating time.
– To check the status of the device a sampling system is needed. The timing is chosen at microprocessor
level (over half a second is recommended).
Figure 19. Restart timing without Diagnostic Enable (Permanent) - Each 1mS time, a sampling of
the fault is done
Out
1-2mS
1mS
1mS
1mS
1mS
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Overcurrent and short
circuit protection intervention
(i.e. short circuit to GND)
Short circuit removed
Figure 20. Restart timing with Diagnostic Enable (Permanent)
1-2mS
100/200mS
1mS
1mS
t
Overcurrent and short
circuit protection intervention
(i.e. short circuit to GND)
Short circuit removed
OUTPUT DC OFFSET DETECTION
Any DC output offset exceeding ±2V are signalled out. This inconvenient might occur as a consequence of initially defective or aged and worn-out input capacitors feeding a DC component to the inputs, so putting the
speakers at risk of overheating.
This diagnostic has to be performed with low-level output AC signal (or Vin = 0).
The test is run with selectable time duration by microprocessor (from a "start" to a "stop" command):
– START = Last reading operation or setting IB1 - D5 - (OFFSET enable) to 1
– STOP = Actual reading operation
Excess offset is signalled out if persistent throughout the assigned testing time. This feature is disabled if any
overloads leading to activation of the short-circuit protection occurs in the process.
AC DIAGNOSTIC.
It is targeted at detecting accidental disconnection of tweeters in 2-way speaker and, more in general, presence
of capacitively (AC) coupled loads.
This diagnostic is based on the notion that the overall speaker's impedance (woofer + parallel tweeter) will tend
to increase towards high frequencies if the tweeter gets disconnected, because the remaining speaker (woofer)
would be out of its operating range (high impedance). The diagnostic decision is made according to peak output
11/20
TDA7564
current thresholds, as follows:
Iout > 500mApk = NORMAL STATUS
Iout < 250mApk = OPEN TWEETER
To correctly implement this feature, it is necessary to briefly provide a signal tone (with the amplifier in "play")
whose frequency and magnitude are such to determine an output current higher than 500mApk in normal conditions and lower than 250mApk should the parallel tweeter be missing. The test has to last for a minimum number of 3 sine cycles starting from the activation of the AC diagnostic function IB2) up to the I2C reading of
the results (measuring period). To confirm presence of tweeter, it is necessary to find at least 3 current pulses
over 500mA over all the measuring period, else an "open tweeter" message will be issued.
The frequency / magnitude setting of the test tone depends on the impedance characteristics of each specific
speaker being used, with or without the tweeter connected (to be calculated case by case). High-frequency
tones (> 10 KHz) or even ultrasonic signals are recommended for their negligible acoustic impact and also to
maximize the impedance module's ratio between with tweeter-on and tweeter-off.
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Fig. 21 shows the Load Impedance as a function of the peak output voltage and the relevant diagnostic fields.
This feature is disabled if any overloads leading to activation of the short-circuit protection occurs in the process.
Figure 21. Current detection: Load impedance magnitude |Z| vs. output peak voltage of the sinus
Load |z| (Ohm)
50
Iout (peak) 500mA
10
High current detection area
(Normal load)
D5 = 0 of the DBx bytes
5
3
2
1
1
2
3
4
5
6
7
8
Vout (Peak)
MULTIPLE FAULTS
When more misconnections are simultaneously in place at the audio outputs, it is guaranteed that at least one
of them is initially read out. The others are notified after successive cycles of I2C reading and faults removal,
provided that the diagnostic is enabled. This is true for both kinds of diagnostic (Turn on and Permanent).
The table below shows all the couples of double-fault possible. It should be taken into account that a short circuit
with the 4 ohm speaker unconnected is considered as double fault.
Double fault table for Turn On Diagnostic
S. GND (so)
S. GND (sk)
S. Vs
S. Across L.
Open L.
S. GND (so)
S. GND
S. GND
S. Vs + S. GND
S. GND
S. GND
S. GND (sk)
/
S. GND
S. Vs
S. GND
Open L. (*)
S. Vs
S. Vs
/
/
S. Vs
S. Vs
S. Across L.
/
/
/
S. Across L.
N.A.
Open L.
/
/
/
/
Open L. (*)
12/20
TDA7564
S. GND (so) / S. GND (sk) in the above table make a distinction according to which of the 2 outputs is shorted
to ground (test-current source side= so, test-current sink side = sk). More precisely, in Channels LF and RR, so
= CH+, sk = CH-; in Channels LR and RF, so = CH-, sk = CH+ .
In Permanent Diagnostic the table is the same, with only a difference concerning Open Load(*) , which is not
among the recognisable faults. Should an Open Load be present during the device's normal working, it would
be detected at a subsequent Turn on Diagnostic cycle (i.e. at the successive Car Radio Turn on).
FAULTS AVAILABILITY
All the results coming from I2C bus, by read operations, are the consequence of measurements inside a defined
period of time. If the fault is stable throughout the whole period, it will be sent out. This is true for DC diagnostic
(Turn on and Permanent), for Offset Detector, for AC Diagnostic (the low current sensor needs to be stable to
confirm the Open tweeter).
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To guarantee always resident functions, every kind of diagnostic cycles (Turn on, Permanent, Offset, AC) will
be reactivate after any I2C reading operation. So, when the micro reads the I2C, a new cycle will be able to start,
but the read data will come from the previous diag. cycle (i.e. The device is in Turn On state, with a short to Gnd,
then the short is removed and micro reads I2C. The short to Gnd is still present in bytes, because it is the result
of the previous cycle. If another I2C reading operation occurs, the bytes do not show the short). In general to
observe a change in Diagnostic bytes, two I2C reading operations are necessary.
I2C PROGRAMMING/READING SEQUENCES
A correct turn on/off sequence respectful of the diagnostic timings and producing no audible noises could be as
follows (after battery connection):
TURN-ON: (STAND-BY OUT + DIAG ENABLE) --- 500 ms (min) --- MUTING OUT
TURN-OFF: MUTING IN --- 20 ms --- (DIAG DISABLE + STAND-BY IN)
Car Radio Installation: DIAG ENABLE (write) --- 200 ms --- I2C read (repeat until All faults disappear).
AC TEST: FEED H.F. TONE -- AC DIAG ENABLE (write) --- WAIT > 3 CYCLES --- I2C read
(repeat I2C reading until tweeter-off message disappears).
OFFSET TEST: Device in Play (no signal) -- OFFSET ENABLE - 30ms - I2C reading
(repeat I2C reading until high-offset message disappears).
13/20
TDA7564
I2C BUS INTERFACE
Data transmission from microprocessor to the TDA7564 and viceversa takes place through the 2 wires I2C BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected).
Data Validity
As shown by fig. 22, the data on the SDA line must be stable during the high period of the clock. The HIGH and
LOW state of the data line can only change when the clock signal on the SCL line is LOW.
Start and Stop Conditions
As shown by fig. 23 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop
condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.
Byte Format
Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit.
The MSB is transferred first.
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Acknowledge
The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig. 24).
The receiver** the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so
that the SDAline is stable LOW during this clock pulse.
* Transmitter
= master (µP) when it writes an address to the TDA7564
= slave (TDA7564) when the µP reads a data byte from TDA7564
** Receiver
= slave (TDA7564) when the µP writes an address to the TDA7564
= master (µP) when it reads a data byte from TDA7564
Figure 22. Data Validity on the I2CBUS
SDA
SCL
DATA LINE
STABLE, DATA
VALID
CHANGE
DATA
ALLOWED
D99AU1031
Figure 23. Timing Diagram on the I2CBUS
SCL
I2CBUS
SDA
D99AU1032
START
STOP
Figure 24. Acknowledge on the I2CBUS
SCL
1
2
3
7
8
9
SDA
MSB
START
14/20
D99AU1033
ACKNOWLEDGMENT
FROM RECEIVER
TDA7564
SOFTWARE SPECIFICATIONS
All the functions of the TDA7564 are activated by I2C interface.
The bit 0 of the "ADDRESS BYTE" defines if the next bytes are write instruction (from µP to TDA7564) or read
instruction (from TDA7564 to µP).
Chip Address:
D7
D0
1
1
0
1
1
0
0
X
D8 Hex
X = 0 Write to device
X = 1 Read from device
If R/W = 0, the µP sends 2 "Instruction Bytes": IB1 and IB2.
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IB1
D7
X
D6
Diagnostic enable (D6 = 1)
Diagnostic defeat (D6 = 0)
D5
Offset Detection enable (D5 = 1)
Offset Detection defeat (D5 = 0)
D4
Front Channel
Gain = 26dB (D4 = 0)
Gain = 12dB (D4 = 1)
D3
Rear Channel
Gain = 26dB (D3 = 0)
Gain = 12dB (D3 = 1)
D2
Mute front channels (D2 = 0)
Unmute front channels (D2 = 1)
D1
Mute rear channels (D1 = 0)
Unmute rear channels (D1 = 1)
D0
Clip detector 2% (D0 = 0)
Clip detector 10% (D0 = 1)
D7
X
D6
used for testing
D5
used for testing
D4
Stand-by on - Amplifier not working - (D4 = 0)
Stand-by off - Amplifier working - (D4 = 1)
D3
Power amplifier mode diagnostic (D3 = 0)
Line driver mode diagnostic (D3 = 1)
D2
Current detection diagnostic enabled (D2 = 1)
Current detection diagnostic defeat (D2 = 0)
D1
Right Channels
Power amplifier working in standard mode (D1 = 0)
Power amplifier working in high efficiency mode (D1 = 1)
D0
Left Channels
Power amplifier working in standard mode (D0 = 0)
Power amplifier working in high efficiency mode (D0 = 1)
IB2
15/20
TDA7564
If R/W = 1, the TDA7564 sends 4 "Diagnostics Bytes" to µP: DB1, DB2, DB3 and DB4.
DB1
D7
Thermal warning active (D7 = 1)
D6
Diag. cycle not activated or not terminated (D6 = 0)
Diag. cycle terminated (D6 = 1)
D5
Channel LF
current detection
Output peak current < 250mA - Open load (D5 = 1)
Output peak current > 500mA - Open load (D5 = 0)
D4
Channel LF
Turn-on diagnostic (D4 = 0)
Permanent diagnostic (D4 = 1)
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D3
Channel LF
Normal load (D3 = 0)
Short load (D3 = 1)
D2
Channel LF
Turn-on diag.: No open load (D2 = 0)
Open load detection (D2 = 1)
Offset diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)
D1
Channel LF
No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)
D0
Channel LF
No short to GND (D1 = 0)
Short to GND (D1 = 1)
D7
Offset detection not activated (D7 = 0)
Offset detection activated (D7 = 1)
D6
Current sensor not activated (D6 = 0)
Current sensor activated (D6 = 1)
D5
Channel LR
current detection
Output peak current < 250mA - Open load (D5 = 1)
Output peak current > 500mA - Open load (D5 = 0)
D4
Channel LR
Turn-on diagnostic (D4 = 0)
Permanent diagnostic (D4 = 1)
D3
Channel LR
Normal load (D3 = 0)
Short load (D3 = 1)
D2
Channel LR
Turn-on diag.: No open load (D2 = 0)
Open load detection (D2 = 1)
Permanent diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)
D1
Channel LR
No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)
D0
Channel LR
No short to GND (D1 = 0)
Short to GND (D1 = 1)
DB2
16/20
TDA7564
DB3
D7
Stand-by status (= IB1 - D4)
D6
Diagnostic status (= IB1 - D6)
D5
Channel RF
current detection
Output peak current < 250mA - Open load (D5 = 1)
Output peak current > 500mA - Open load (D5 = 0)
D4
Channel RF
Turn-on diagnostic (D4 = 0)
Permanent diagnostic (D4 = 1)
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D3
Channel RF
Normal load (D3 = 0)
Short load (D3 = 1)
D2
Channel RF
Turn-on diag.: No open load (D2 = 0)
Open load detection (D2 = 1)
Permanent diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)
D1
Channel RF
No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)
D0
Channel RF
No short to GND (D1 = 0)
Short to GND (D1 = 1)
D7
X
D6
X
D5
Channel RR
current detection
Output peak current < 250mA - Open load (D5 = 1)
Output peak current > 500mA - Open load (D5 = 0)
D4
Channel RR
Turn-on diagnostic (D4 = 0)
Permanent diagnostic (D4 = 1)
D3
Channel RR
Normal load (D3 = 0)
Short load (D3 = 1)
D2
Channel RR
Turn-on diag.: No open load (D2 = 0)
Open load detection (D2 = 1)
Permanent diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)
D1
Channel RR
No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)
D0
Channel RR
No short to GND (D1 = 0)
Short to GND (D1 = 1)
DB4
17/20
TDA7564
Examples of bytes sequence
1 - Turn-On diagnostic - Write operation
Start
Address byte with D0 = 0
ACK
IB1 with D6 = 1
ACK
IB2
ACK
STOP
2 - Turn-On diagnostic - Read operation
Start
Address byte with D0 = 1
ACK
DB1
ACK
DB2
ACK
DB3
ACK
DB4
ACK
STOP
The delay from 1 to 2 can be selected by software, starting from T.B.D. ms
3a - Turn-On of the power amplifier with 26dB gain, mute on, diagnostic defeat, High eff. mode both channels..
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Start
Address byte with D0 = 0
ACK
IB1
ACK
X000000X
IB2
ACK
STOP
ACK
STOP
ACK
STOP
XXX1X011
3b - Turn-Off of the power amplifier
Start
Address byte with D0 = 0
ACK
IB1
ACK
X0XXXXXX
IB2
XXX0XXXX
4 - Offset detection procedure enable
Start
Address byte with D0 = 0
ACK
IB1
ACK
XX1XX11X
IB2
XXX1X0XX
5 - Offset detection procedure stop and reading operation (the results are valid only for the offset detection bits
(D2 of the bytes DB1, DB2, DB3, DB4).
Start
■
■
Address byte with D0 = 1
ACK
DB1
ACK
DB2
ACK
DB3
ACK
DB4
ACK
STOP
The purpose of this test is to check if a D.C. offset (2V typ.) is present on the outputs, produced by input
capacitor with anomalous leakage current or humidity between pins.
The delay from 4 to 5 can be selected by software, starting from T.B.D. ms
6 - Current detection procedure start (the AC inputs must be with a proper signal that depends on the type of
load)
Start
Address byte with D0 = 0
ACK
IB1
ACK
XX01111X
IB2
ACK
STOP
XXX1X1XX
7 - Current detection reading operation (the results valid only for the current sensor detection bits - D5 of the
bytes DB1, DB2, DB3, DB4).
Start
■
■
Address byte with D0 = 1
ACK
DB1
ACK
DB2
ACK
DB3
ACK
DB4
ACK
STOP
During the test, a sinus wave with a proper amplitude and frequency (depending on the loudspeaker
under test) must be present. The minimum number of periods that are needed to detect a normal load
is 5.
The delay from 6 to 7 can be selected by software, starting from T.B.D. ms.
18/20
TDA7564
DIM.
A
B
C
D
E
F (1)
G
G1
H (2)
H1
H2
H3
L (2)
L1
L2 (2)
L3
L4
L5
M
M1
N
O
R
R1
R2
R3
R4
V
V1
V2
V3
MIN.
4.45
1.80
0.75
0.37
0.80
23.75
28.90
22.07
18.57
15.50
7.70
mm
TYP.
4.50
1.90
1.40
0.90
0.39
1.00
24.00
29.23
17.00
12.80
0.80
22.47
18.97
15.70
7.85
5
3.5
4.00
4.00
2.20
2
1.70
0.5
0.3
1.25
0.50
MAX.
4.65
2.00
MIN.
0.175
0.070
1.05
0.42
0.57
1.20
24.25
29.30
0.029
0.014
0.031
0.935
1.139
22.87
19.37
15.90
7.95
0.869
0.731
0.610
0.303
4.30
4.40
0.145
0.142
inch
TYP.
0.177
0.074
0.055
0.035
0.015
0.040
0.945
1.150
0.669
0.503
0.031
0.884
0.747
0.618
0.309
0.197
0.138
0.157
0.157
0.086
0.079
0.067
0.02
0.12
0.049
0.019
MAX.
0.183
0.079
OUTLINE AND
MECHANICAL DATA
0.041
0.016
0.022
0.047
0.955
1.153
0.904
0.762
0.626
0.313
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Flexiwatt25
(vertical)
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3.70
3.60
0.169
0.173
5˚ (T p.)
3˚ (Typ.)
20˚ (Typ.)
45˚ (Typ.)
(1): dam-bar protusion not included
(2): molding protusion included
V
C
B
V
H
H1
V3
A
H2
O
H3
R3
L4
R4
V1
R2
L2
N
L3
R
L
L1
V1
V2
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