TDA7575PD
MULTIFUNCTION DUAL BRIDGE POWER AMPLIFIER
WITH INTEGRATED DIGITAL DIAGNOSTICS
DMOS POWER OUTPUT
NON-SWITCHING HI-EFFICIENCY
SINGLE-CHANNEL 1Ω DRIVING CAPABILITY
HIGH OUTPUT POWER CAPABILITY 2x28W/
4Ω @ 14.4V, 1KHZ, 10% THD, 2x40W/4Ω EIAJ
MAX. OUTPUT POWER 2x75W/2Ω, 1x150W/1Ω
SINGLE-CHANNEL 1Ω DRIVING CAPABILITY
– 84W UNDISTORTED POWER
– FULL I2C BUS DRIVING WITH 4 ADDRESS
POSSIBILITIES:
– ST-BY, PLAY/MUTE, GAIN 12/26dB, FULL
DIGITAL DIAGNOSTIC
POSSIBILITY TO DISABLE THE I2C
DIFFERENTAL INPUTS
FULL FAULT PROTECTION
DC OFFSET DETECTION
TWO INDEPENDENT SHORT CIRCUIT
PROTECTIONS
CLIPPING DETECTOR PIN WITH
SELECTABLE THRESHOLD (2%/10%)
ST-BY/MUTE PINS
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DESCRIPTION
MULTIPOWER BCD TECHNOLOGY
MOSFET OUTPUT POWER STAGE
PowerSO36 (Slug up)
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ORDERING NUMBER: TDA7575PD
has a very low distortion allowing a clear powerful
sound. Among the features, its superior efficiency
performance coming from the internal exclusive
structure, makes it the most suitable device to simplify the thermal management in high power sets.The
dissipated output power under average listening condition is in fact reduced up to 50% when compared to
the level provided by conventional class AB solutions.
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This device is equipped with a full diagnostic array
that communicates the status of each speaker
through the I2C bus. The TDA7575PD has also the
possibility of driving loads down to 1Ω paralleling the
outputs into a single channel. It is also possible to disable the I2C and control the TDA7575PD by means of
the usual ST-BY and MUTE pins.
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ADDRESS
A
B
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The TDA7575PD is a new BCD technology DUAL
BRIDGE type of car radio amplifier in PowerSO36
package specially intended for car radio applications.
Thanks to the DMOS output stage the TDA7575PD
BLOCK DIAGRAM
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VS
CLK DATA
VCC
CD_OUT
CLIP
DETECTOR
I2CBUS
IN1+
OUT1+
IN1OUT1SHORT CIRCUIT
PROTECTION
IN2+
OUT2+
IN2-
OUT2SHORT CIRCUIT
PROTECTION
SVR
ST-BY/HE
S_GND
PW_GND
TAB
I2C EN
1Ω
MUTE
D01AU1269
March 2004
1/17
TDA7575PD
PIN CONNECTION (Top view)
OUT1+
36
1
TAB
OUT1+
35
2
IN1+
VCC
34
3
IN1-
VCC
33
4
MUTE
B
32
5
ST_BY
PWGND
31
6
SGND
PWGND
30
7
DATA
OUT1-
29
8
CK
OUT1-
28
9
N.C.
OUT2-
27
10
N.C.
OUT2-
26
11
N.C.
PWGND
25
12
N.C.
PWGND
24
13
SVR
A
23
14
CD-OUT
VCC
22
15
1-OHM
VCC
21
16
I2C-EN
OUT2+
20
17
IN2-
OUT2+
19
18
IN2+
D01AU1270
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ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Unit
18
V
28
V
50
V
6
V
Data Pin Voltage
6
V
Output Peak Current (not repetitive t = 100ms)
8
A
Output Peak Current (repetitive f > 10Hz)
6
A
Power Dissipation Tcase = 70°C
86
W
-55 to 150
°C
Value
Unit
1
°C/W
Operating Supply Voltage
VS
DC Supply Voltage
VCK
VDATA
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IO
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Peak Supply Voltage (for t = 50ms)
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CK pin Voltage
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IO
Ptot
Tstg, Tj
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Value
Vop
Vpeak
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Storage and Junction Temperature
THERMAL DATA
Symbol
Rth j-case
2/17
Parameter
Thermal Resistance Junction-case
Max
TDA7575PD
ELECTRICAL CHARACTERISTCS: (VS=14.4V; f=1KHz; RL=4Ω; Tamb= 25°C unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
18
V
200
mA
POWER AMPLIFIER
VS
Supply Voltage Range
8
Id
Total Quiescent Drain Current
50
130
Po
Output Power
EIAJ (VS = 13.7V)
35
40
W
THD = 10%
THD = 1%; BTL MODE
25
28
22
W
W
RL = 2Ω; EIAJ (VS = 13.7V)
RL = 2Ω; THD 10%
RL = 2Ω; THD 1%
RL = 2Ω; MAX POWER
60
45
70
65
50
37
75
W
W
W
W
125
80
140
130
84
150
W
W
W
Single channel configuration
(1Ω pin >2.5V); RL = 1Ω;
EIAJ (VS = 13.7V)
THD 3%
MAX POWER
THD
PO = 1-12W; STD MODE
HE MODE; PO = 1-2W
HE MODE; PO = 4-8W
Total Harmonic Distortion
PO = 1-12W, f = 10kHz
0.03
0.03
0.5
Single channel configuration
(1Ω pin >2.5V); RL = 1; PO = 4-30W
CT
Cross Talk
RIN
Input Impedance
GV1
Voltage Gain 1 (default)
∆GV1
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Voltage Gain Match 1
GV2
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Rg = 600Ω; PO = 1W
Voltage Gain 2
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0.1
0.1
%
%
%
0.15
0.5
%
0.03
0.5
%
0.02
0.1
%
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let
RL = 2; HE MODE; Po = 3W
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60
75
dB
60
100
130
KΩ
25
26
27
dB
-1
0
1
dB
11
12
13
dB
-1
0
1
dB
∆GV2
Voltage Gain Match 2
EIN1
Output Noise Voltage Gain 1
Rg = 600Ω; Gv = 26dB
filter 20 to 22kHz
40
60
µV
EIN2
Output Noise Voltage Gain 2
Rg = 600Ω; Gv = 12dB
filter 20 to 22kHz
15
25
µV
Supply Voltage Rejection
f = 100Hz to 10kHz; Vr = 1Vpk;
Rg = 600Ω
50
BW
Power Bandwidth
(-3dB)
100
ASB
Stand-by Attenuation
ISB
Stand-by Current Consumption
AM
Mute Attenuation
VOS
Offset Voltage
VAM
Min. Supply Mute Threshold
SVR
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CMRR
Input CMRR
90
60
KHz
100
2
Mute & Play
VCM = 1Vpk-pk; Rg = 0 Ω
dB
dB
20
µA
80
90
dB
-45
0
45
mV
7
7.5
8
V
50
60
dB
3/17
TDA7575PD
ELECTRICAL CHARACTERISTCS: (continued)
Symbol
Parameter
Test Condition
VMC
Maximum common mode input
level
SR
Slew Rate
Min.
Typ.
f = 1kHz
1.5
4
Max.
Unit
1
Vrms
V/µs
∆VPM
Mute/Unmute Transient
A-weighted
-100
0
100
mVpp
∆VTO
Mute/Stand-by Transient
A-weighted
-100
0
100
mVpp
TON
Turn on Delay
D2 (IB1) 0 to 1
15
40
ms
TOFF
Turn off Delay
D2 (IB1) 1 to 0
15
40
ms
VOFF
St-By pin for St-By
0
1.5
V
VSB
St-By pin for standard bridge
3.5
5
V
VHE
St-By pin for Hi-eff
7
18
V
IO
St-By pin Current
1.5 < Vstby/HE < 18V
St-By Pin Current
Vstby < 1.5V
7
160
200
µA
-10
0
10
µA
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1.5
V
18
V
5
µA
100
µA
0
1.5
V
2.5
18
V
Vm
Mute pin voltage for mute mode
0
Vm
Mute pin voltage for play mode
3.5
Im
Mute pin current (ST_BY)
Vmute = 0V, Vstby < 1.5V
Im
Mute pin current (operative)
0V < Vmute < 18V, Vstby > 3.5V
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let
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65
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VI2C
I2C pin voltage for I2C disabled
VI2C
I2C pin voltage for I2C enabled
I2C
I2C pin current (stby)
0V < I2C EN < 18V, Vstby < 1.5V
-5
0
5
µA
I2C
I2C pin current (operative)
I2C EN 3.5V
7
11
15
µA
0
1.5
V
2.5
18
V
V1OHM
1OHM pin voltage for 2ch mode
V1OHM
1OHM pin voltage for 1ohm
mode
I1OHM
1OHM pin current (stby)
I1OHM
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Lb
0V < 1OHM 3.5V
7
11
15
µA
TW
Thermal warning
150
°C
TPI
Thermal Protection intervention
170
°C
ICDH
Clip Pin High Leakage Current
4/17
CD off, 0V < VCD < 5.5V
-15
0
15
µA
TDA7575PD
ELECTRICAL CHARACTERISTCS: (continued)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
1
Unit
ICDL
Clip Pin Low Sink Current
CD on; VCD < 300mV
mA
CD
Clip detect THD level
D0 (IB1) = 0
0.8
1.3
2.5
%
D0 (IB1) = 1
5
10
15
%
(*) ST-BY Pin high enables I2C bus; ST-BY Pin low puts the device in ST-BY condition.(see “prog” for more details)
TURN ON DIAGNOSTICS (Power Amplifier Mode)
Pgnd
Short to GND det. (below this
limit, the Output is considered in
Short Circuit to GND)
Pvs
Short to Vs det. (above this
limit, the Output is considered in
Short Circuit to VS)
Vs -0.9
Pnop
Normal operation
thresholds.(Within these limits,
the Output is considered
without faults).
1.8
Power Amplifier in st-by condition
1.2
Lsc
Shorted Load det.
Lop
Open Load det.
130
Lnop
Normal Load det.
1.5
TURN ON DIAGNOSTICS (Line Driver Mode)
Pgnd
Short to GND det. (below this
limit, the Output is considered in
Short Circuit to GND)
Pvs
Short to Vs det. (above this
limit, the Output is considered in
Short Circuit to VS)
Pnop
Normal operation
thresholds.(Within these limits,
the Output is considered
without faults).
Lsc
Shorted Load det.
Lop
Open Load det.
Lnop
Normal Load det.
V
Vs -1.5
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Power Amplifier in st-by
(s)
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1.8
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Ω
Ω
1.2
V
V
Vs -1.5
V
1.5
Ω
Ω
400
4.5
Ω
70
Vs -0.9
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0.5
Pr
V
200
Ω
1.2
V
PERMANENT DIAGNOSTICS (Power Amplifier Mode or Line Driver Mode)
Pgnd
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Short to GND det. (below this
limit, the Output is considered in
Short Circuit to GND)
Power Amplifier in Mute or Play
condition, one or more short circuits
protection activated
Pvs
Short to Vs det. (above this
limit, the Output is considered in
Short Circuit to VS)
Vs - 0.9
Pnop
Normal operation
thresholds.(Within these limits,
the Output is considered
without faults).
1.8
Lsc
Shorted Load det.
V
Vs -1.5
V
Pow. Amp. mode
0.5
Ω
Line Driver mode
1.5
Ω
5/17
TDA7575PD
ELECTRICAL CHARACTERISTCS: (continued)
Symbol
VO
Parameter
Offset Detection
Test Condition
Power Amplifier in play condition
AC Input signals = 0
Min.
Typ.
Max.
Unit
±1.5
±2
±2.5
V
I2C BUS INTERFACE
fSCL
Clock Frequency
400
KHz
VIL
Input Low Voltage
1.5
V
VIH
Input High Voltage
2.3
V
I2C BUS INTERFACE
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Data transmission from microprocessor to the TDA7575PD and viceversa takes place through the 2 wires I2C BUS
interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected).
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Data Validity
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As shown by fig. 1, the data on the SDA line must be stable during the high period of the clock.
The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW.
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Start and Stop Conditions
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As shown by fig. 2 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH.
The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.
Byte Format
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Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit.
The MSB is transferred first.
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Acknowledge
The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig.3). The
receiver** the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so that
the SDAline is stable LOW during this clock pulse.
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* Transmitter
= master (µP) when it writes an address to the TDA7575PD
= slave (TDA7575PD) when the µP reads a data byte from TDA7575PD
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** Receiver
= slave (TDA7575PD) when the µP writes an address to the TDA7575PD
= master (µP) when it reads a data byte from TDA7575PD
6/17
TDA7575PD
Figure 1. Data Validity on the I2CBUS
SDA
SCL
DATA LINE
STABLE, DATA
VALID
CHANGE
DATA
ALLOWED
D99AU1031
Figure 2. Timing Diagramon the I2CBUS
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SCL
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I2CBUS
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SDA
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Figure 3.
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SCL
SDA
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START
so
D99AU1032
START
1
STOP
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2
3
7
8
9
MSB
D99AU1033
ACKNOWLEDGMENT
FROM RECEIVER
1 Ohm Capability Setting
It is possible to drive 1OHM load paralleling the outputs into a single channel.
In order to implement this feature, outputs are to be connected on the board as follows:
OUT1+ (PIN35 and PIN36) shorted to OUT2+ (PIN19 and PIN20)
OUT1- (PIN28 and PIN29) shorted to OUT2- (PIN26 and PIN27).
7/17
TDA7575PD
It is recommended to minimize the impedance on the board between OUT2 and the load in order to minimize
THD distortion. It is also recommended to control the maximum mismatch impedance between VCC pins
(PIN21/PIN22 respect to PIN33/PIN34) and between PWGND pins (PIN24/PIN25 respect to PIN30/PIN31),
mismatch that must not exceed a value of 20 mOhm.
With 1OHM feature settled the active input is IN2 (PIN17 and PIN18), therefore IN1 pins should be let floating.
It is possible to set the load capability acting on 1OHM pin as follows:
1OHM PIN (PIN15) < 1.5V: two channels mode (for a minimum load of 2 OHM)
1OHM PIN (PIN15) > 2.5V: one channel mode (for 1 OHM load).
IT IS TO REMEMBER THAT 1 0HM FUNCTION IS A HARDWARE SELECTION.
Therefore it is recommended to leave 1OHM PIN floating or shorted to GND to set the two channels mode configuration, or to short 1OHM PIN to VCC to set the one channel (1OHM) configuration.
I2C Abilitation Setting
2
2
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It is possible to disable the I C interface by acting on I C PIN (PIN16) and control the TDA7575PD by means of
the usual ST-BY and MUTE pins. In order to activate or deactivate this feature, I2C PIN must be set as follows:
I2C PIN (PIN16) < 1.5V: I2C bus interface deactivated
I2C PIN (PIN16) > 2.5V: I2C bus interface activated
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It is also possible to let I2C PIN floating to deactivate the I2C bus interface, or to short I2C PIN to VCC to activate
it.
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In particular:
I2C ENABLED: I2C pin (PIN16) > 2.5V
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– STD MODE: Vstby (PIN5) > 3.5V, IB2(D1)=0
– HE MODE: Vstby (PIN5) > 3.5V, IB2(D1)=1
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– PLAY MODE: Vmute (pin 4) >3.5V, IB1 (D2) = 1
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The amplifier can always be switched off by putting Vstby to 0V, but with I2C enabled it can be turn on only
through I2C (with Vstby>3.5V).
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I2C DISABLED: I2C pin (PIN16) < 1.5V
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– STD MODE: 3.5V < stby (PIN5) < 5
– HE MODE: Vstby (PIN5) > 7V
– PLAY MODE: Vmute (pin 4) >3.5V
For both STD and HE MODE the play/mute mode can be set acting on Vmute pin.
8/17
TDA7575PD
SOFTWARE SPECIFICATIONS
All the functions of the TDA7575PD are activated by I2C interface.
The bit 0 of the "ADDRESS BYTE" defines if the next bytes are write instruction (from µP to TDA7575PD) or
read instruction (from TDA7575PD to µP).
ADDRESS SELECTION
A6
1
A5
1
A4
0
A3
1
A2
0
A1
B
A0
A
R/W
X
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If R/W = 0, the µP sends 2 "Instruction Bytes": IB1 and IB2.
IB1
D7
X
D6
Diagnostic enable (D6 = 1)
Diagnostic defeat (D6 = 0)
D5
Offset Detection enable (D5 = 1)
Offset Detection defeat (D5 = 0)
D4
Gain = 26dB (D4 = 0)
Gain = 12dB (D4 = 1)
D3
X
D2
Mute (D2 = 0)
Unmute (D2 = 1)
D1
X
D0
CD 2% (D0 = 0)
CD 10% (D0 = 1)
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D6
O
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IB2
D7
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X
used for testing
D5
used for testing
D4
Stand-by on - Amplifier not working - (D4 = 0)
Stand-by off - Amplifier working - (D4 = 1)
D3
Power Amplifier Mode Diagnostic (D3 = 0);
Line Driver Mode Diagnostic (D3 = 1)
D2
X
D1
Power amplifier working in standard mode (D1 = 0)
Power amplifier working in high efficiency mode (D1 = 1)
D0
X
9/17
TDA7575PD
If R/W = 1, the TDA7575PD sends 2 "Diagnostics Bytes" to µP: DB1 and DB2.
DB1
D7
Thermal warming (if Tchip ≥ 150°C, D7 = 1)
D6
Diag. cycle not activated or not terminated (D6 = 0)
Diag. cycle terminated (D6 = 1)
D5
X
D4
Channel 1
Turn-on diagnostic (D4 = 0)
Permanent diagnostic (D4 = 1)
D3
Channel 1
Normal load (D3 = 0)
Short load (D3 = 1)
D2
Channel 1
Turn-on diag.: No open load (D2 = 0)
Open load detection (D2 = 1)
Offset diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)
D1
Channel 1
No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)
D0
Channel 1
No short to GND (D1 = 0)
Short to GND (D1 = 1)
DB2
Offset detection not activated (D7 = 0)
Offset detection activated (D7 = 1)
D6
X
D5
X
D4
Channel 2
Turn-on diagnostic (D4 = 0)
Permanent diagnostic (D4 = 1)
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10/17
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D3
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D7
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Channel 2
Normal load (D3 = 0)
Short load (D3 = 1)
D2
Channel 2
Turn-on diag.: No open load (D2 = 0)
Open load detection (D2 = 1)
Permanent diag.: No output offset (D2 = 0)
Output offset detection (D2 = 1)
D1
Channel 2
No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)
D0
Channel 2
No short to GND (D1 = 0)
Short to GND (D1 = 1)
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TDA7575PD
Examples of bytes sequence
1 - Turn-On diagnostic - Write operation
Start
Address byte with D0 = 0
ACK
IB1 with D6 = 1
ACK
IB2
ACK
STOP
2 - Turn-On diagnostic - Read operation
Start
Address byte with D0 = 1
ACK
DB1
ACK
DB2
ACK
STOP
The delay from 1 to 2 can be selected by software, starting from T.B.D. ms
3a - Turn-On of the power amplifier with mute on, diagnostic defeat.
Start
Address byte with D0 = 0
ACK
IB1
ACK
IB2
X000XXXX
ACK
XXX1XX1X
3b - Turn-Off of the power amplifier
Start
Address byte with D0 = 0
ACK
IB1
ACK
X0XXXXXX
Address byte with D0 = 0
ACK
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IB1
ACK
IB2
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ACK
STOP
ACK
STOP
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XX1XX1XX
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IB2
XXX0XXXX
4 - Offset detection procedure enable
Start
STOP
XXX1XXXX
5 - Offset detection procedure stop and reading operation (the results are valid only for the offset detection bits
(D2 of the bytes DB1, DB2, DB3, DB4).
Start
(s)
Address byte with D0 = 1
ACK
DB1
ACK
DB2
ACK
STOP
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The purpose of this test is to check if a D.C. offset (2V typ.) is present on the outputs, produced by input
capacitor with anomalous leackage current or humidity between pins.
■
The delay from 4 to 5 can be selected by software, starting from T.B.D. ms
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DIAGNOSTICS FUNCTIONAL DESCRIPTION:
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a) TURN-ON DIAGNOSTIC.
It is activated at the turn-on (stand-by out) under I2C bus request. Detectable output faults are:
– SHORT TO GND
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– SHORT TO Vs
– SHORT ACROSS THE SPEAKER
– OPEN SPEAKER
To verify if any of the above misconnections are in place, a subsonic (inaudible) current pulse (fig. A) is internally
generated, sent through the speaker(s) and sunk back.The Turn On diagnostic status is internally stored until a
successive diagnostic pulse is requested (after a I2C reading).
If the "stand-by out" and "diag. enable" commands are both given through a single programming step, the pulse
takes place first (power stage still in stand-by mode, low, outputs= high impedance).
11/17
TDA7575PD
Afterwards, when the Amplifier is biased, the PERMANENT diagnostic takes place. The previous Turn On state
is kept until a short appears at the outputs.
Fig A: Turn - On diagnostic: working principle
I (mA)
Vs~5V
Isource
Isource
Isink
CH+
CHIsink
~100mS
t (ms)
Measure time
Fig. B and C show SVR and OUTPUT waveforms at the turn-on (stand-by out) with and without TURN-ON DIAGNOSTIC.
Fig B: SVR and Output behaviour
CASE 1: without turn-on diagnostic
c
u
d
Vsvr
Out
Permanent diagnostic
acquisition time (100mS Typ)
e
t
le
o
s
b
O
-
Diagnostic Enable
(Permanent)
Bias (power amp turn-on)
)
s
(
ct
I2CB DATA
o
r
P
t
FAULT
event
Read Data
Permanent Diagnostics data (output)
permitted time
u
d
o
FIG. C: SVR and Output pin behaviour
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P
e
CASE 2: with turn-on diagnostic
t
e
l
o
Vsvr
Out
Turn-on diagnostic
acquisition time (100mS Typ)
Permanent diagnostic
acquisition time (100mS Typ)
s
b
O
t
Diagnostic Enable
(Turn-on)
I2CB DATA
12/17
Turn-on Diagnostics data (output)
permitted time
Bias (power amp turn-on)
permitted time
Read Data
Diagnostic Enable
(Permanent)
FAULT
event
Permanent Diagnostics data (output)
permitted time
)
s
t(
TDA7575PD
The information related to the outputs status is read and memorized at the end of the current pulse top. The
acquisition time is 100 ms (typ.). No audible noise is generated in the process. As for SHORT TO GND / Vs the
fault-detection thresholds remain unchanged from 26 dB to 12 dB gain setting. They are as follows:
S.C. to GND
0V
x
Normal Operation
1.2V
1.8V
x
VS-1.5V
S.C. to Vs
VS-0.9V
VS
D02AU1341
Concerning SHORT ACROSS THE SPEAKER / OPEN SPEAKER, the threshold varies from 26 dB to 12 dB
gain setting, since different loads are expected (either normal speaker's impedance or high impedance). The
values in case of 26 dB gain are as follows:
S.C. across Load
0V
x
0.5Ω
Normal Operation
1.5Ω
x
Open Load
130Ω
70Ω
Infinite
D01AU1254
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u
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)
s
t(
If the Line-Driver mode (Gv= 12 dB and Line Driver Mode diagnostic = 1) is selected, the same thresholds will
change as follows:
S.C. across Load
0Ω
x
1.5Ω
Normal Operation
4.5Ω
b) PERMANENT DIAGNOSTICS.
Detectable conventional faults are:
– SHORT TO GND
– SHORT TO Vs
)
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ct
200Ω
x
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P
Open Load
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400Ω
o
s
b
O
-
infinite
D01AU1252
u
d
o
– SHORT ACROSS THE SPEAKER
The following additional features are provided:
– OUTPUT OFFSET DETECTION
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The TDA7575PD has 2 operating statuses:
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o
1) RESTART mode. The diagnostic is not enabled. Each audio channel operates independently from each other. If any of the a.m. faults occurs, only the channel(s) interested is shut down. A check of the output status is
made every 1 ms (fig. G). Restart takes place when the overload is removed.
s
b
O
2) DIAGNOSTIC mode. It is enabled via I2C bus and self activates if an output overload (such to cause the intervention of the short-circuit protection) occurs to the speakers outputs . Once activated, the diagnostics procedure develops as follows (fig. H):
– To avoid momentary re-circulation spikes from giving erroneous diagnostics, a check of the output
status is made after 1ms: if normal situation (no overloads) is detected, the diagnostic is not performed and the channel returns back active.
– Instead, if an overload is detected during the check after 1 ms, then a diagnostic cycle having a duration of about 100 ms is started.
– After a diagnostic cycle, the audio channel interested by the fault is switched to RESTART mode. The
13/17
TDA7575PD
relevant data are stored inside the device and can be read by the microprocessor. When one cycle
has terminated, the next one is activated by an I2C reading. This is to ensure continuous diagnostics
throughout the car-radio operating time.
– To check the status of the device a sampling system is needed. The timing is chosen at microprocessor level (over than half a second is recommended).
Fig. G: Restart timing without Diagnostic Enable (Permanent)
Each 1mS time, a sampling of the fault is done
Out
1-2mS
1mS
1mS
1mS
1mS
t
Overcurrent and short
circuit protection intervention
(i.e. short circuit to GND)
Short circuit removed
c
u
d
Fig H: Restart timing with Diagnostic Enable (Permanent)
1mS
e
t
le
100mS
)
s
(
ct
Overcurrent and short
circuit protection intervention
(i.e. short circuit to GND)
1mS
)
s
t(
o
r
P
1mS
o
s
b
O
-
t
Short circuit removed
u
d
o
r
P
e
OUTPUT DC OFFSET DETECTION.
Any DC output offset exceeding +/- 2 V are signalled out. This inconvenient might occur as a consequence of
initially defective or aged and worn-out input capacitors feeding a DC component to the inputs, so putting the
speakers at risk of overheating.
t
e
l
o
This diagnostic has to be performed with low-level output AC signal (or Vin = 0).
s
b
O
The test is run with selectable time duration by microprocessor (from a "start" to a "stop" command):
– START = Last reading operation or setting IB1 - D5 - (OFFSET enable) to 1
– STOP = Actual reading operation
Excess offset is signalled out if persistent throughout the assigned testing time. This feature is disabled if any
overloads leading to activation of the short-circuit protection occurs in the process.
14/17
TDA7575PD
MULTIPLE FAULTS.
When more misconnections are simultaneously in place at the audio outputs, it is guaranteed that at least one
of them is initially read out. The others are notified after successive cycles of I2C reading and faults removal,
provided that the diagnostic is enabled. This is true for both kinds of diagnostic (Turn on and Permanent).
The table below shows all the couples of double-fault possible. It should be taken into account that a short circuit
with the 4 ohm speaker unconnected is considered as double fault.
Double fault table for Turn On Diagnostic
S. GND (sc)
S. GND (sk)
S. Vs
S. Across L.
Open L.
S. GND (sc)
S. GND
S. GND
S. Vs + S. GND
S. GND
S. GND
S. GND (sk)
/
S. GND
S. Vs
S. GND
Open L. (*)
S. Vs
/
/
S. Vs
S. Vs
S. Vs
S. Across L.
/
/
/
S. Across L.
N.A.
Open L.
/
/
/
/
Open L. (*)
)
s
t(
S. GND (so) / S. GND (sk) in the above table make a distinction according to which of the 2 outputs is shorted
to ground (test-current source side= so, test-current sink side = sk). More precisely, in both the Channels SO =
CH+, and SK = CH-.
c
u
d
In Permanent Diagnostic the table is the same, with only a difference concerning Open Load(*) , which is not
among the recognisable faults. Should an Open Load be present during the device's normal working, it would
be detected at a subsequent Turn on Diagnostic cycle (i.e. at the successive Car Radio Turn on).
e
t
le
FAULTS AVAILABILITY
o
r
P
o
s
b
O
-
All the results coming from I2Cbus, by read operations, are the consequence of measurements inside a defined
period of time. If the fault is stable throughout the whole period, it will be sent out. This is true for DC diagnostic
(Turn on and Permanent), for Offset Detector.
To guarantee always resident functions, every kind of diagnostic cycles (Turn on, Permanent, Offset) will be
reactivate after any I2C reading operation. So, when the micro reads the I2C, a new cycle will be able to start,
but the read data will come from the previous diag. cycle (i.e. The device is in Turn On state, with a short to Gnd,
then the short is removed and micro reads I2C. The short to Gnd is still present in bytes, because it is the result
of the previous cycle. If another I2C reading operation occurs, the bytes do not show the short). In general to
observe a change in Diagnostic bytes, two I2C reading operations are necessary.
)
s
(
ct
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d
o
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P
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I2C PROGRAMMING/READING SEQUENCES
A correct turn on/off sequence respectful of the diagnostic timings and producing no audible noises could be as
follows (after battery connection):
t
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s
b
O
– TURN-ON: (STAND-BY OUT + DIAG ENABLE) --- 500 ms (min) --- MUTING OUT
– TURN-OFF: MUTING IN --- 20 ms --- (DIAG DISABLE + STAND-BY IN)
Car Radio Installation: DIAG ENABLE (write) --- 200 ms --- I2C read (repeat until All faults disappear).
– OFFSET TEST: Device in Play (no signal) -– OFFSET ENABLE - 30ms - I2C reading
(repeat I2C reading until high-offset message disappears).
15/17
TDA7575PD
DIM.
A
A2
A4
A5
a1
b
c
D
D1
D2
E
E1
E2
E3
E4
e
e3
G
H
h
L
N
s
MIN.
3.25
3.1
0.8
mm
TYP.
MAX.
3.43
3.2
1
MIN.
0.128
0.122
0.031
0.040
0.38
0.32
16
9.8
0.0011
0.008
0.009
0.622
0.37
14.5
11.1
2.9
6.2
3.2
0.547
0.429
0.2
inch
TYP.
0.030
0.22
0.23
15.8
9.4
5.8
2.9
0.0015
0.015
0.012
0.630
0.38
0.039
0.57
0.437
0.114
0.244
1.259
0.228
0.114
0.65
11.05
0
15.5
0.026
0.435
0.075
0
15.9
0.61
1.1
1.1
0.031
10˚ (max)
8˚ (max)
0.8
OUTLINE AND
MECHANICAL DATA
0.008
1
13.9
10.9
MAX.
0.135
0.126
0.039
0.003
0.625
0.043
0.043
(1) “D and E1” do not include mold flash or protusions.
Mold flash or protusions shall not exceed 0.15mm (0.006”)
(2) No intrusion allowed inwards the leads.
)
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)
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t(
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PowerSO36
P (SLUG UP)
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O
-
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s
b
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7183931 C
16/17
TDA7575PD
c
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)
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ct
)
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
© 2004 STMicroelectronics - All rights reserved
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17/17