TN5015H-6G
High temperature 50 A SCRs
Datasheet - production data
Description
A
Thanks to its junction temperature Tj up to
150 °C, the device offers high thermal
performance operation up to 50 A. Its D²PAK
package allows modern SMD designs as well as
compact back to back configuration.
G
K
A
Its trade-off noise immunity (dV/dt = 500 V/μs)
versus its gate triggering current (IGT = 15 mA)
and its turn-on current rise (dI/dt = 100 A/μs)
allow to design robust and compact control circuit
for voltage regulator in motorbikes and industrial
drives, overvoltage crowbar protection, motor
control circuits in power tools and kitchen
appliances, inrush current limiting circuits.
A
K
G
D²PAK
Features
High junction temperature: Tj = 150 °C
High noise immunity dV/dt = 500 V/µs up to
150 °C
Gate triggering current IGT = 15 mA
Peak off-state voltage VDRM/VRRM = 600 V
High turn-on current rise dI/dt = 100 A/µs
ECOPACK®2 compliant component
Table 1: Device summary
Order code
Package
VDRM/VRRM
IGT
TN5015H-6G
D²PAK
600 V
15 mA
Applications
Motorbike voltage regulator circuits
Inrush current limiting circuits
Motor control circuits and starters
Solid state relays
June 2017
DocID030697 Rev 1
This is information on a product in full production.
1/9
www.st.com
Characteristics
1
TN5015H-6G
Characteristics
Table 2: Absolute maximum ratings (limiting values), Tj = 25 °C unless otherwise specified
Symbol
Parameter
Value
Unit
Tc = 120 °C
50
A
Tc = 122 °C
30
Tc = 128 °C
25
Tc = 134 °C
20
tp = 8.3 ms
493
tp = 10 ms
450
I2t value for fusing
tp = 10 ms
1012
A2s
Critical rate of rise of on-state current
IG = 2 x IGT, tr ≤ 100 ns
f = 60 Hz
100
A/µs
Repetitive peak off-state voltage
Tj = 150 °C
600
V
Non repetitive surge peak off-state voltage
tp = 10 ms
VDRM/VRRM +
100
V
Peak gate current
Tj = 150 °C
4
A
Tj = 150 °C
1
W
IT(RMS)
RMS on-state current
(180 ° conduction angle)
IT(AV)
Average on-state current
(180 ° conduction angle)
ITSM
I2 t
dl/dt
VDRM/VRRM
VDSM/VRSM
IGM
Non repetitive surge peak on-state current
tp = 20 µs
A
A
PG(AV)
Average gate power dissipation
VRGM
Maximum peak reverse gate voltage
5
V
Tstg
Storage junction temperature range
-40 to +150
°C
Maximum operating junction temperature
-40 to +150
°C
Tj
Table 3: Electrical characteristics (Tj = 25 °C unless otherwise specified)
Symbol
IGT
VGT
VD = 12 V, RL = 33 Ω
VGD
VD = VDRM, RL = 3.3 kΩ
IH
IT = 500 mA, gate open
IL
IG = 1.2 x IGT
dV/dt
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Test conditions
VD = 402 V, gate open
Tj = 150 °C
Tj = 150 °C
Value
Unit
Max.
15
mA
Max.
1.3
V
Min.
0.15
V
Max.
60
mA
Max.
80
mA
Min.
500
V/µs
tgt
ITM = 100 A, VD = 600 V, IG = 100 mA, (dIG/dt) max = 0.2 A/µs
Typ.
1.9
µs
tq
ITM = 100 A, VD = 402 V,
(dI/dt)off = 30 A/µs, VR = 25 V,
dVD/dt = 50 V/µs
Typ.
85
µs
DocID030697 Rev 1
Tj = 150 °C
TN5015H-6G
Characteristics
lTable 4: Static characteristics
Symbol
Value
Test conditions
VTM
ITM = 100 A, tp = 380 µs
Tj = 25 °C
Max.
1.65
VTO
Threshold voltage
Tj = 150 °C
Max.
0.85
RD
Dynamic resistance
Tj = 150 °C
Max.
9
IDRM, IRRM
Tj = 25 °C
VD = VDRM = VRRM
Tj = 150 °C
Max.
Unit
V
mΩ
10
µA
6
mA
Table 5: Thermal parameters
Symbol
Rth(j-c)
Rth(j-a)
Parameter
Value
Junction to case (DC)
Junction to ambient (DC)
S(1)
= 1 cm²
Max.
0.6
Typ.
45
Unit
°C/W
Notes:
(1)S
= Copper surface under tab
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Characteristics
1.1
TN5015H-6G
Characteristics (curves)
Figure 1: Maximum average power dissipation
versus average on-state current
Figure 2: Average and DC on-state current versus
case temperature
IT(AV)(A)
P(W)
50
α = 120°
D.C
α = 180°
60
α = 90 °
40
α = 60°
α = 30°
α = 60 °
α = 90°
α = 120°
α = 180°
D.C
50
α = 30 °
40
30
30
20
20
10
10
IT(AV) (A)
TC(°C)
0
0
0
5
10
15
20
25
30
35
40
45
50
Figure 3: Average and D.C. on state current versus
ambient temperature
3.0
IT(AV)(A)
0
25
50
75
100
125
150
Figure 4: Relative variation of thermal impedance
versus pulse duration
1.0E+00
K=[Z th /Rth ]
Zth(j-c)
2.5
D.C
2.0
Zth(j-a)
1.0E-01
α = 180 °
1.5
1.0
1.0E-02
0.5
TA(°C)
tp(s)
0.0
0
25
50
75
100
125
150
Figure 5: Relative variation of gate trigger current
and gate voltage versus junction temperature
(typical values)
IGT,VGT [T j ] / I GT,VGT [T j =25 °C]
1.0E-03
1.0E-03
1.0E-01
1.0E+00
1.0E+01
1.0E+02
1.0E+03
Figure 6: Relative variation of holding and latching
current versus junction temperature
(typical values)
2.5
2.5
1.0E-02
IH , IL[T j ]/ IH , IL[T j =25 °C]
2.3
IGT
2.0
2.0
IH
1.8
1.5
1.5
1.3
1.0
VGT
1.0
IL
0.8
0.5
0.5
0.3
Tj (°C)
0.0
-50
4/9
-25
0
25
50
75
100
125
150
0.0
-50
DocID030697 Rev 1
Tj (°C)
-25
0
25
50
75
100
125
150
TN5015H-6G
Characteristics
Figure 7: Relative variation of static dV/dt
immunity versus junction temperature
(typical values)
12
Figure 8: Surge peak on-state current versus
number of cycles
dV/dt [ Tj ] / dV/dt [ Tj = 150 °C ]
500
ITSM(A)
VD = 402 V
11
10
9
400
Above test equipment capability
8
7
Non repetitive
Tj initial = 25 °C
300
6
5
200
4
Repetitive
Tc = 120 °C
3
2
100
1
0
Number of cycles
90
95
100
105
110
115
120
125
130
135
140
145
150
0
Tj (°C)
1
10
100
1000
Figure 9: Non repetitive surge peak on-state
current for a sinusoidal pulse with width tp < 10 ms
Figure 10: On-state characteristics
(maximum values)
Figure 11: Relative variation of leakage current
versus junction temperature
Figure 12: Thermal resistance junction to ambient
versus copper surface under tab
IDRM , IRRM [Tj; VDRM , VRRM ] / IDRM , IRRM [150 °C; 600 V]
1.0E+00
VDRM = VRRM = 600 V
80
Rth(j-a) (°C/W)
70
1.0E-01
60
50
1.0E-02
40
1.0E-03
30
20
Epoxy printed board FR4, eCU= 35 µm
1.0E-04
10
SCu(cm²)
0
1.0E-05
25
50
75
Tj (°C)
100
125
150
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10
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20
25
30
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Package information
2
TN5015H-6G
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
2.1
Epoxy meets UL94, V0
Lead-free, halogen-free package
D²PAK package information
Figure 13: D²PAK package outline
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DocID030697 Rev 1
TN5015H-6G
Package information
Table 6: D²PAK package mechanical data
Dimensions
Ref.
Inches(1)
Millimeters
Min.
Typ.
Max.
Min.
Typ.
Max.
A
4.30
4.60
0.1693
0.1811
A1
2.49
2.69
0.0980
0.1059
A2
0.03
0.23
0.0012
0.0091
A3
0.0098
0.25
b
0.70
0.93
0.0276
0.0366
b2
1.25
1.7
0.0492
0.0669
c
0.45
0.60
0.0177
0.0236
c2
1.21
1.36
0.0476
0.0535
D
8.95
9.35
0.3524
0.3681
D1
7.50
8.00
0.2953
0.3150
D2
1.30
1.70
0.0512
0.0669
e
2.54
E
10.00
10.28
0.3937
0.4047
E1
8.30
8.70
0.3268
0.3425
E2
6.85
7.25
0.2697
0.2854
G
4.88
5.28
0.1921
0.2079
H
15
15.85
0.5906
0.6240
L
1.78
2.28
0.0701
0.0898
L2
1.27
1.40
0.0500
0.0551
L3
1.40
1.75
0.0551
R
V2
0.1
0.40
0°
0.0689
0.0157
8°
0°
8°
Notes:
(1)Dimensions
in inches are given for reference only
Figure 14: D²PAK recommended footprint (dimensions are in mm)
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Ordering information
3
TN5015H-6G
Ordering information
Figure 15: Ordering information scheme
TN 50 15
H - 6
G - TR
Series
TN = SCR
Current
50 = 50 A
Gate sensitivity
15 = 15 m A
High temperature
H = 150 °C
Voltage
6 = 600 V
Package
G = D ² PA K
Packing mode
Blank = tube
TR = Tape and reel
Table 7: Ordering information
4
Order code
Marking
Package
Weight
Base qty.
Delivery mode
TN5015H-6G
TN5015H6
D²PAK
1.5 g
50
Tube
TN5015H-6G-TR
TN5015H6
D²PAK
1.5 g
1000
Tape and reel
Revision history
Table 8: Document revision history
8/9
Date
Revision
08-Jun-2017
1
DocID030697 Rev 1
Changes
Initial release.
TN5015H-6G
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© 2017 STMicroelectronics – All rights reserved
DocID030697 Rev 1
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