TN5015H-6T

TN5015H-6T High temperature 50 A SCRs Datasheet - production data Description A Packaged in a non-isolated TO-220AB, this device offers high thermal performance during operation of up to 50 A, thanks to a junction temperature of up to 150 °C. G K Its noise immunity (dV/dt = 500 V/μs) trade-off versus gate triggering current (IGT = 15 mA) and its turn-on current rise (dI/dt = 100 A/μs) allow the design of robust and compact control circuits for voltage regulators in motorbikes and industrial drives, overvoltage crowbar protection, motor control circuits in power tools and kitchen appliances, and inrush current-limiting circuits. A K A G TO-220AB Features       High junction temperature: Tj = 150 °C High noise immunity up to 150 °C Gate triggering current IGT = 15 mA Peak off-state voltage VDRM/VRRM = 600 V High turn-on current rise dI/dt = 100 A/µs ECOPACK®2 compliant component Table 1: Device summary Order code Package VDRM/VRRM IGT TN5015H-6T TO-220AB 600 V 15 mA Applications     Motorbike voltage regulator circuits Inrush current limiting circuits Motor control circuits and starters Solid state relays June 2017 DocID030698 Rev 1 This is information on a product in full production. 1/9 www.st.com Characteristics 1 TN5015H-6T Characteristics Table 2: Absolute maximum ratings (limiting values), Tj = 25 °C unless otherwise specified Symbol Parameter Value Unit Tc = 120 °C 50 A Tc = 122 °C 30 Tc = 128 °C 25 Tc = 134 °C 20 Non repetitive surge peak on-state current ( Tj initial = 25 °C) tp = 8.3 ms 493 tp = 10 ms 450 I2t value for fusing tp = 10 ms 1012 A2s Critical rate of rise of on-state current IG = 2 x IGT, tr ≤ 100 ns f = 60 Hz 100 A/µs Repetitive peak off-state voltage Tj = 150 °C 600 V Non repetitive surge peak off-state voltage tp = 10 ms VDRM/VRRM + 100 V Peak gate current Tj = 150 °C 4 A Tj = 150 °C 1 W IT(RMS) RMS on-state current (180 ° conduction angle) IT(AV) Average on-state current (180 ° conduction angle) ITSM I2 t dl/dt VDRM/VRRM VDSM/VRSM IGM tp = 20 µs A A PG(AV) Average gate power dissipation VRGM Maximum peak reverse gate voltage 5 V Tstg Storage junction temperature range -40 to +150 °C Tj Maximum operating junction temperature -40 to +150 °C Tl Maximum lead temperature soldering during 10 s 260 °C Table 3: Electrical characteristics (Tj = 25 °C unless otherwise specified) Symbol IGT VGT VD = 12 V, RL = 33 Ω Value Unit Max. 15 mA Max. 1.3 V Min. 0.15 V VGD VD = VDRM, RL = 3.3 kΩ IH IT = 500 mA, gate open Max. 60 mA IL IG = 1.2 x IGT Max. 80 mA Min. 500 V/µs dV/dt 2/9 Test conditions VD = 402 V, gate open Tj = 150 °C Tj = 150 °C tgt ITM = 100 A, VD = 402 V, IG = 30 mA, (dIG/dt) max = 0.2 A/µs Typ. 1.9 µs tq ITM = 100 A, VD = 402 V, (dI/dt)off = 30 A/µs, VR = 25 V, dVD/dt = 50 V/µs Typ. 85 µs DocID030698 Rev 1 Tj = 150 °C TN5015H-6T Characteristics Table 4: Static characteristics Symbol Value Test conditions VTM ITM = 100 A, tp = 380 µs Tj = 25 °C Max. 1.65 VTO Threshold voltage Tj = 150 °C Max. 0.85 RD Dynamic resistance Tj = 150 °C Max. 9 IDRM, IRRM Tj = 25 °C VD = VDRM = VRRM Tj = 150 °C Max. Unit V mΩ 10 µA 6 mA Value Unit Table 5: Thermal parameters Symbol Parameter Rth(j-c) Junction to case (DC) Max. 0.6 Rth(j-a) Junction to ambient (DC) Typ. 60 DocID030698 Rev 1 °C/W 3/9 Characteristics 1.1 TN5015H-6T Characteristics (curves) Figure 1: Maximum average power dissipation versus average on-state current Figure 2: Average and DC on-state current versus case temperature IT(AV)(A) P(W) 50 α = 180° α = 120° D.C 60 α = 30° α = 60° α = 90 ° 40 α = 60 ° α = 90° α = 120° α = 180° D.C 50 α = 30 ° 40 30 30 20 20 10 10 IT(AV)(A) TC(°C) 0 0 0 5 10 15 20 25 30 35 40 45 50 Figure 3: Average and D.C. on state current versus ambient temperature 3.0 0 25 75 100 125 150 Figure 4: Relative variation of thermal impedance versus pulse duration IT(AV)(A) 1.0E+00 2.5 50 K=[Z th /Rth ] Zth(j-c) D.C Zth(j-a) 2.0 1.0E-01 α = 180 ° 1.5 1.0E-02 1.0 0.5 tp(s) TA(°C) 1.0E-03 1.0E-03 0.0 0 25 50 75 100 125 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1.0E+03 150 Figure 5: Relative variation of gate trigger current and gate voltage versus junction temperature (typical values) IGT,VGT [T j ] / I GT,VGT [T j =25 °C] Figure 6: Relative variation of holding and latching current versus junction temperature (typical values) 2.5 2.5 IH , IL[T j ]/ IH , IL[T j =25 °C] 2.3 IGT 2.0 2.0 IH 1.8 1.5 1.5 1.3 1.0 VGT 1.0 IL 0.8 0.5 0.5 0.3 Tj (°C) 0.0 -50 4/9 -25 0 25 50 75 100 125 150 0.0 -50 DocID030698 Rev 1 Tj (°C) -25 0 25 50 75 100 125 150 TN5015H-6T Characteristics Figure 7: Relative variation of static dV/dt immunity versus junction temperature (typical values) 12 Figure 8: Surge peak on-state current versus number of cycles dV/dt [ Tj ] / dV/dt [ Tj = 150 °C ] VD = 402 V 11 500 ITSM(A) 10 9 400 Above test equipment capability 8 7 Non repetitive Tj initial = 25 °C 300 6 5 200 4 Repetitive Tc = 120 °C 3 2 100 1 Number of cycles 0 90 95 100 105 110 115 120 125 130 135 140 145 150 0 1 Tj (°C) 10 Figure 9: Non repetitive surge peak on-state current for a sinusoidal pulse with width tp < 10 ms 100 1000 Figure 10: On-state characteristics (maximum values) Figure 11: Relative variation of leakage current versus junction temperature IDRM , IRRM [Tj; VDRM , VRRM ] / IDRM , IRRM [150 °C; 600 V] 1.0E+00 VDRM = VRRM = 600 V 1.0E-01 1.0E-02 1.0E-03 1.0E-04 1.0E-05 25 50 75 Tj (°C) DocID030698 Rev 1 100 125 150 5/9 Package information 2 TN5015H-6T Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.   2.1 Epoxy meets UL94, V0 Lead-free, halogen-free package TO-220AB package information Figure 12: TO-220AB (NIns. & Ins.) package outline 6/9 DocID030698 Rev 1 TN5015H-6T Package information Table 6: TO-220AB (NIns. & Ins.) package mechanical data Dimensions Ref. Min. A Inches(1) Millimeters Typ. 15.20 Max. Min. 15.90 0.5984 3.75 a1 Typ. Max. 0.6260 0.1476 a2 13.00 14.00 0.5118 0.5512 B 10.00 10.40 0.3937 0.4094 b1 0.61 0.88 0.0240 0.0346 b2 1.23 1.32 0.0484 0.0520 C 4.40 4.60 0.1732 0.1811 c1 0.49 0.70 0.0193 0.0276 c2 2.40 2.72 0.0945 0.1071 e 2.40 2.70 0.0945 0.1063 F 6.20 6.60 0.2441 0.2598 I 3.73 3.88 0.1469 0.1528 L 2.65 2.95 0.1043 0.1161 I2 1.14 1.70 0.0449 0.0669 I3 1.14 1.70 0.0449 0.0669 I4 15.80 16.80 0.6220 16.40 2.6 M 0.6457 0.6614 0.1024 Notes: (1)Inch dimensions are for reference only. DocID030698 Rev 1 7/9 Ordering information 3 TN5015H-6T Ordering information Figure 13: Ordering information scheme TN 50 15 H - 6 T Series TN = SCR Current 50 = 50 A Gate sensitivity 15 = 15 m A High temperature H = 150 °C Voltage 6 = 600 V Package T = TO-220AB Packing mode Blank = tube Table 7: Ordering information 4 Order code Marking Package Weight Base qty. Delivery mode TN5015H-6T TN5015H6 TO-220AB 2.3 g 50 Tube Revision history Table 8: Document revision history 8/9 Date Revision 01-Jun-2017 1 Changes Initial release. DocID030698 Rev 1 TN5015H-6T IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved DocID030698 Rev 1 9/9