TN815-B

® TN805/TN815-B SCR’s FEATURES ITRMS = 8 A VDRM = 400 V to 800 V IGT ≤ 5 mA and 15 mA DESCRIPTION The TN805/TN815-B serie of Silicon Controlled Rectifiers uses a high performance TOPGLASS PNPN technology. These parts are intended for general purpose applications using mount technology. K A A G DPAK ABSOLUTE MAXIMUM RATINGS Symbol IT(RMS) IT(AV) ITSM Parameter RMS on-state current (180° conduction angle) Mean on-state current (180° conduction angle) Non repetitive surge peak on-state current (Tj initial = 25°C) Tc= 105°C Tc= 105°C tp = 8.3 ms tp = 10 ms I2t dI/dt Tstg Tj Tl I2t Value for fusing Critical rate of rise of on-state current dIG /dt = 1 A/µs. IG = 100 mA Storage junction temperature range Operating junction temperature range Maximum lead temperature for soldering during 10s tp = 10ms Value 8 5 73 70 24.5 100 - 40 to + 150 - 40 to + 125 260 A2s A/µs °C °C Unit A A A Symbol VDRM VRRM Parameter 400B Repetitive peak-off voltage Tj = 125°C 400 TN805 or TN815 600B 600 700B 700 800B 800 Unit V August 1998 - Ed: 1A 1/5 TN805/TN815-B THERMAL RESISTANCES Symbol Rth(j-a) Rth(j-c) Parameter Junction to ambient (S=0.5cm2) Junction to case for D.C Value 70 2.5 Unit °C/W °C/W GATE CHARACTERISTICS PG (AV)= 1W PGM = 10 W (tp = 20 µs) IGM = 4 A (tp = 20 µs) VRGM = 5 V ELECTRICAL CHARACTERISTICS Symbol IGT VGT VGD tgt IH IL VTM IDRM IRRM dV/dt Test Conditions VD = 12V (DC) RL= 33Ω VD = 12V (DC) RL= 33Ω VD = VDRM RL = 3.3kΩ VD = VDRM IG = 40mA IT= 150mA IG = 1.2 IGT ITM= 16A tp= 380µs VDRM Rated VRRM Rated Linear slope up to VD=67%VDRM Gate open ITM = 3 x IT(AV) dIG/dt = 0.5A/us Gate open Tj= 25°C Tj= 25°C Tj= 125°C Tj= 25°C Tj= 25°C Tj= 25°C Tj= 25°C Tj= 25°C Tj = 125°C Tj= 125°C Type MAX MAX MIN TYP MAX MAX MAX MAX MAX MIN 50 25 25 1.6 10 2 150 5 1.5 0.2 2 30 30 Value TN805 TN815 15 µA V V µs mA mA V µA mA V/µs Unit ORDERING INFORMATION TN SCR CURRENT 2/5 8 05 - 600 SENSITIVITY B PACKAGES : B: DPAK VDRM / VRRM TN805/815-B Fig. 1: Maximum average power dissipation versus average on-state current . Fig. 2 : C orrelation between maximum average power dissipation and maximum allowable temperatures (T amb a nd T case) for different thermal resistances heatsink+contact. P(W) 8 7 6 5 4 3 2 1 0 0 1 2 IT(av)(A) 3 4 5 α 360° α = 180° α = 120° α = 90° α = 60° α = 30° D.C. P(W) 8 7 6 5 4 Rth=37°C/W Tcase (°C) 105 Rth=0°C/W α = 180° 110 115 120 3 2 1 0 Tamb(°C) 0 10 20 30 40 50 60 70 80 90 100 110 120 130 125 6 7 Fig. 3-1: Average and D.C. on-state current versus case temperature. Fig. 3-2: Average and D.C. on-state current versus case temperature. IT(av)(A) 10 D.C. IT(av)(A) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 8 6 4 2 Tcase(°C) 0 0 10 20 30 40 50 60 70 80 90 100 110 120 130 α = 180° D.C. α = 180° Tamb(°C) 0 10 20 30 40 50 60 70 80 90 100 110 120 130 Fig. 4-1: Relative variation of thermal impedance versus pulse duration. Fig. 4-2: Relative variation of thermal impedance versus pulse duration. K=[Zth(j-c)/Rth(j-c)] 1.0 K=[Zth(j-a)/Rth(j-a)] 1.00 0.5 0.10 0.2 tp(s) 0.1 1E-3 1E-2 1E-1 1E+0 tp(s) 0.01 1E-2 1E-1 1E+0 1E+1 1E+2 5E+2 3/5 TN805/TN815-B Fig. 5: Relative variation of gate trigger current and holding current versus junction temperature. Fig. 6: Non repetitive surge peak on-state current versus number of cycles. Igt,IH[Tj]/Ig,IH[Tj=25°C] 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -40 80 Igt ITSM(A) 70 60 50 Tj initial=25°C F=50Hz IH 40 30 20 10 Tj(°C) -20 0 20 40 60 80 100 120 Number of cycles 1 10 100 1000 0 Fig. 7: Non repetitive surge peak on-state current for a sinusoidal pulse with width tp