TPDV840RG

TPDVxx40 40 A high voltage Triacs Datasheet - production data Description $ The TPDVxx40 series use a high performance alternistor technology. Featuring very high commutation levels and high surge current capability, this family is well adapted to power control on inductive load (motor, transformer...). * $ Table 1. Device summary $ $ * Parameter 723LQVXODWHG Features Blocking voltage VDRM/VRRM TPDV640RG 600 V TPDV840RG 800 V TPDV1240RG 1200 V On-state current IT(RMS) Gate current IGT 40 A 200 mA • On-state current (IT(RMS)): 40 A • Max. blocking voltage (VDRM/VRRM): 1200 V • Gate current (IGT): 200 mA • Commutation at 10 V/µs: up to 142 A/ms • Noise immunity: 500 V/µs • Insulated package: – 2,500 V rms (UL recognized: E81734) June 2015 This is information on a product in full production. DocID18270 Rev 2 1/8 www.st.com Characteristics 1 TPDVxx40 Characteristics Table 2. Absolute ratings (limiting values) Symbol Parameter IT(RMS) On-state rms current (180° conduction angle) Non repetitive surge peak on-state current ITSM Value Unit 40 A Tc = 75 °C tp = 2.5 ms tp = 8.3 ms 590 Tj = 25 °C 370 tp = 10 ms I2 2 t dI/dt VDRM VRRM 350 I t value for fusing tp = 10 ms Critical rate of rise of on-state current IG = 500 mA; dlG/dt = 1 A/µs Repetitive F = 50 Hz 20 Non repetitive 100 TPDV640 600 Repetitive peak off-state voltage TPDV840 Tj = 25 °C 610 Tj = 125 °C 800 TPDV1240 Tstg Tj Storage junction temperature range Operating junction temperature range TL VINS(RMS)(1) A A2S A/µs V 1200 -40 to +150 -40 to +125 °C Maximum lead temperature for soldering during 10 s at 2 mm from case 260 °C Insulation rms voltage 2500 V 1. A1, A2, gate terminals to case for 1 minute Table 3. Electrical Characteristics (Tj = 25 °C, unless otherwise specified) Symbol IGT VGT VGD tgt IH (1) IL dV/dt VTM (1) IDRM IRRM (dI/dt)c (1) Test condition Quadrant VD = 12 V DC, RL = 33 Ω VD = VDRM RL = 3.3 kΩ Value Unit Max. 200 mA Max. 1.5 V I - II - III Min. 0.2 V I - II - III Typ. 2.5 µs Typ. 50 mA I - II - III Tj = 125 °C VD = VDRM IG = 500 mA dlG/dt = 3A/µs IT = 500 mA Gate open I - III IG = 1.2 x IGT Linear slope up to : VD = 67% VDRM Gate open ITM = 56 A II Tj = 125 °C tp = 380 µs VDRM = VRRM (dV/dt)c = 200 V/µs (dV/dt)c = 10 V/µs Tj = 25 °C Tj = 125 °C Tj = 125 °C 1. For either polarity of electrode A2 voltage with reference to electrode A1. 2/8 DocID18270 Rev 2 Typ. 100 200 mA Min. 500 V/µs Max. 1.8 V 20 µA 8 mA Max. Min. 35 142 A/ms TPDVxx40 Characteristics Table 4. Gate characteristics (maximum values) Symbol Parameter Average gate power dissipation PG(AV) Value Unit 1 W PGM Peak gate power dissipation tp = 20 µs 40 W IGM Peak gate current tp = 20 µs 8 A VGM Peak positive gate voltage tp = 20 µs 16 V Value Unit Junction to ambient 50 °C/W Rth(j-c) DC Junction to case for DC 1.2 °C/W Rth(j-c) AC Junction to case for 360 °conduction angle (F = 50 Hz) 0.9 °C/W Table 5. Thermal resistance Symbol Parameter Rth(j-a) Figure 1. Max. rms power dissipation versus on-state rms current (F = 50 Hz) (curves limited by (dI/dt)c) Figure 2. Max. rms power dissipation and max. allowable temperatures (Tamb and Tcase) for various Rth 3: 3: 7FDVHƒ&   5WK  ƒ& : ƒ    5WK ƒ &: ƒ   5WK  ƒ&:  5WK  ƒ&: ƒ      ƒ  ƒ ƒ  ,7506$ 7DPE ƒ&                Figure 3. On-state rms current versus case temperature        Figure 4. Relative variation of thermal impedance versus pulse duration . >=WKMF5WKMF@ ,7506$   ƒ =WKMF    =WKMD    7FDVHƒ&         ( DocID18270 Rev 2 W S V  ( ( ( ( ( ( 3/8 8 Characteristics TPDVxx40 Figure 5. Relative variation of gate trigger current and holding current versus junction temperature Figure 6. Non repetitive surge peak on-state current versus number of cycles ,*7,+,/>7M@,*7,+,/>7M ƒ&@ ,760$     WS PV  2QH F\FOH ,*7    7MLQLWLDO ƒ&  ,+ ,/    1XPEHURIF\FOHV 7Mƒ&                      Figure 7. Non-repetitive surge peak on-state current for a sinusoidal pulse and corresponding values of I2t ,760$,ðW$ðV    Figure 8. On-state characteristics (maximum values) ,70 $   7M LQLWLDO ƒ& 7M PD[   ,760  ,W 7M ƒ&  W SPV            Figure 9. Safe operating area below curve G9GW F9—V  7M L QLWLDO ƒ&   G,GW F$PV   4/8 7M PD[ 9W 9 5G P 970 9  DocID18270 Rev 2    TPDVxx40 2 Package information Package information • Epoxy meets UL94, V0 • Cooling method:C (by conduction) • Recommended torque value:0.9 to 1.2 N .m In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 2.1 TOP3 insulated package information Figure 10. TOP3 insulated package outline + 5 $ % ‘/ . ) 3 * & - - DocID18270 Rev 2 ' ( 5/8 8 Package information TPDVxx40 Table 6. TOP3 insulated package mechanical data Dimensions Ref. Inches(1) Millimeters Typ. Min. Max. A 4.4 B Min. Max. 4.6 0.173 0.181 1.45 1.55 0.057 0.061 C 14.35 15.60 0.565 0.614 D 0.5 0.7 0.020 0.028 E 2.7 2.9 0.106 0.114 F 15.8 16.5 0.622 0.650 G 20.4 21.1 0.815 0.831 H 15.1 15.5 0.594 0.610 J 5.4 5.65 0.213 0.222 K 3.4 3.65 0.134 0.144 ØL 4.08 4.17 0.161 0.164 P 1.20 1.40 0.047 0.055 R 4.60 Typ. 0.181 1. Values in inches are converted from mm and rounded to 4 decimal digits. 6/8 DocID18270 Rev 2 TPDVxx40 3 Ordering information Ordering information Table 7. Ordering information 4 Order code Marking TPDV640RG TPDV640 TPDV840RG TPDV840 TPDV1240RG TPDV1240 Package Weight Base qty. delivery mode TOP3 insulated 4.5 g 30 Tube Revision history Table 8. Document revision history Date Revision 30-Mar-2011 1 Initial release. 2 Updated Table 3. Updated Figure 9. Format updated to current standard. 10-Jun-2015 Changes DocID18270 Rev 2 7/8 8 TPDVxx40 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved 8/8 DocID18270 Rev 2