TS110-7
High surge voltage 1.25 A SCR for circuit breaker
Datasheet - production data
Features
• On-state rms current, 1.25 A
• Repetitive peak off-state voltage, 700 V
A
• Non-repetitive direct surge peak off-state
voltage, 1250 V
• Non-repetitive reverse surge peak off-state
voltage, 850 V
• Triggering gate current, 100 µA
G
A
K
K
G
SMBflat-3L
TS110-7UF
K
G
A
TO-92 with “GAK” pinout
TS110-7A1
Description
Thanks to highly sensitive triggering levels, the
TS110-7 series is suitable for circuit breaker
applications where the available gate current is
limited. Such applications include GFCI (ground
fault circuit interrupter), AFCI (arc fault circuit
interrupter), RCD (residual current device), and
RCBO (residual current circuit breaker with
overload protection).
The 1250 V surge voltage capability of the
TS110-7 enables high robustness of the whole
circuit breaker. The low leakage current of the
TS110-7 reduces power consumption over the
entire lifetime of the circuit breaker.
The TS110-7 is available in through-hole TO-92
package with GAK pinout and in SMBflat-3L.
June 2014
This is information on a product in full production.
DocID022271 Rev 4
1/10
www.st.com
Characteristics
1
TS110-7
Characteristics
Table 1. Absolute ratings (limiting values)
Symbol
Parameter
TO-92
IT(RMS)
IT(AV)
On-state rms current (180° conduction angle)
TO-92
Average on-state current
(180° conduction angle)
1.25
A
0.8
A
Tl = 58 °C
SMBflat-3L Ttab = 110 °C
ITSM
tp = 8.3 ms
27
tp = 10 ms
25
1st step: one surge every 5 seconds, 25 surges
t = 10 ms
2nd step: one surge every 5 seconds, 25 surges p
dI/dt
Unit
SMBflat-3L Ttab = 110 °C
Non repetitive surge peak on-state current
I ²t
Tl = 58 °C
Value
I²t Value for fusing
tp = 10 ms
Critical rate of rise of on-state current
IG = 2 x IGT, tr ≤ 100 ns
F = 60 Hz
Tj initial = 25 °C
3.1
Tj = 125 °C
A
25 times 12 A,
25 times 16 A
A2S
100
A/µs
Critical rate of rise of on-state current
Gate open, VD = VBO, tr ≤ 100 ns
Tj = 25 °C
100
VDRM,
VRRM
Repetitive peak off-state voltage, gate open
Tj = 125 °C
700
V
VDSM
Non-repetitive direct surge peak off-state
voltage, RGK = 220 Ω
tp = 50 µs
Tj = 25 °C
1250
V
VRSM
Non-repetitive reverse surge peak off-state
voltage, RGK = 220 Ω
tp = 50 µs
Tj = 25 °C
850
V
Peak gate current
tp = 20 µs
Tj = 125 °C
1.2
A
Tj = 125 °C
0.2
W
IGM
PG(AV)
Tstg
Tj
Average gate power dissipation
Storage junction temperature range
- 40 to + 150
Operating junction temperature range
- 40 to + 125
°C
Table 2. Electrical characteristics
Symbol
IGT
Test conditions
Value
Unit
Min.
1
Max.
100
Max.
0.8
V
µA
VD = 12 V, R L = 140Ω
Tj = 25 °C
VGT
VGD
VD = VDRM, RL = 33 kΩ, RGK = 220 Ω
Tj = 125 °C
Min.
0.1
V
VRG
IRG = 2 mA
Tj = 25 °C
Min.
7.5
V
IH
IT = 50 mA, RGK = 220 Ω
Tj = 25 °C
Max.
2
mA
IL
IG = 5 mA, RGK = 220 Ω
Tj = 25 °C
Max.
2
mA
VD = 67% VDRM, RGK = 220 Ω
Tj = 125 °C
Min.
15
V/µs
dV/dt
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DocID022271 Rev 4
TS110-7
Characteristics
Table 3. Static electrical characteristics
Symbol
Test conditions
Value
Unit
VTM
ITM = 2.5 A, tp = 380 µs
Tj = 25 °C
Max.
1.4
V
VT0
Threshold voltage
Tj = 125 °C
Max.
0.9
V
RD
Dynamic resistance
Tj = 125 °C
Max.
200
mΩ
1
µA
100
µA
IDRM
IRRM
Tj = 25 °C
VD = VDRM / VRRM, R GK = 220 Ω
Max.
Tj = 125 °C
Table 4. Thermal resistance
Symbol
Parameter
Rth(j-l)
Junction to leads (DC)
Rth(j-a)
Junction to ambient (DC)
Rth(j-c)
Junction to case (DC)
TO-92
65
TO-92
160
SMBflat-3L
75
SMBflat-3L
14
Unit
°C/W
S = 5 cm2
Figure 1. Maximum average power dissipation
versus average on-state current
1.2
Value
Figure 2. Average and DC on-state current
versus lead temperature (TO-92)
P(W)
IT(AV)(A)
1.4
α = 30°, 60°, 90°, 120°, 180°, DC
α = 30°, 60°, 90°, 120°, 180°, DC
1.0
1.2
1.0
0.8
0.8
0.6
0.6
0.4
0.4
360°
0.2
0.2
Tlead (°C)
α
IT(AV)(A)
0.0
0.0
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
Figure 3. Average and DC on-state current
versus lead temperature (SMBflat-3L)
1.4
0
1.0
25
50
75
100
125
Figure 4. Average and DC on-state current
versus ambient temperature
IT(AV)(A)
IT(AV)(A)
α = 30°, 60°, 90°, 120°, 180°, DC
SMBF-3L
1.2
DC
1.2
1.0
SMBF-3L
1.0
180-
0.8
0.8
TO-92
DC
0.6
0.6
TO-92
0.4
0.4
180-
0.2
0.2
Tamb(°C)
Tlead (°C)
0.0
0.0
0
25
50
75
100
125
0
DocID022271 Rev 4
25
50
75
100
125
3/10
10
Characteristics
TS110-7
Figure 5. Relative variation of thermal
impedance junction to ambient versus pulse
duration
1.00
K=[Zth(j-a)/Rth(j-a)]
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
TO-92
SMBflat-3L
Copper surface
area = 5cm²
0.10
tp(s)
0.01
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
1.0E+02
Figure 6. Relative variation of gate triggering
current and voltage, holding and latching
current versus Tj
1.0E+03
IGT, IH, IL, VGT [Tj] / IGT, IH, IL, VGT [Tj=25°C]
I GT
IH & I L
V GT
Tj(°C)
-40
-20
0
20
40
60
80
100
120
Figure 7. Relative variation of holding current
Figure 8. Relative variation of dV/dt immunity
versus gate-cathode resistance (typical values) versus gate-cathode resistance (typical values)
IH[RGK] / IH[RGK = 220 Ω]
1.5
10.00
dV/dt[RGK] / dV/dt[RGK = 220 W]
Tj = 125°C
VD = 0.67 x VDRM
1.0
1.00
0.5
0.10
RGK(W)
RGK(kΩ)
0.0
0.1
0.01
1.0
10.0
Figure 9. Relative variation of dV/dt immunity
versus gate-cathode capacitance (typical
values)
dV/dt[CGK] / dV/dt[CGK = 100 nF]
5.0
600
800
dV/dt[Tj] / dV/dt[Tj = 125 °C]
RGK = 220 Ω
VD = 0.67 x VDRM
8
3.5
7
3.0
6
2.5
5
2.0
4
1.5
3
1.0
2
0.5
CGK(nF)
Tj(°C)
1
0.0
0
0
4/10
400
9
Tj = 125°C
VD = 0.67 x VDRM
4.0
200
Figure 10. Relative variation of dV/dt immunity
versus junction temperature with RGK = 220 Ω
(typical values)
10
Typical value of dV/dt[CGK = 100 nF] = 25 V/µs
4.5
0
20
40
60
80
100
120
140
160
180
200
220
20
DocID022271 Rev 4
40
60
80
100
120
TS110-7
Characteristics
Figure 11. Surge peak on-state current versus
number of cycles
26
Figure 12. Non-repetitive surge peak on-state
current, and corresponding values of I2t
2
ITSM(A)
1000
2
ITSM(A), I t (A s)
Tj initial=25 °C
24
Non repetitive
Tj initial=25 °C
22
20
tp=10ms
One cycle
18
SMBF-3L
Repetitive
TA=25 °C
16
14
ITSM
100
12
10
8
10
TO-92
Repetitive
TA=25 °C
6
4
I²t
2
Sinusoidal pulse with
width tp < 10 ms
Number of cycles
0
tp(ms)
1
1
10
100
1000
Figure 13. On-state characteristics (maximum
values)
100.0
ITM(A)
TJ=125°C
1.0
TJ=25°C
T j max :
Vto =0.9 V
Rd =200 mΩ
0.1
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0.10
1.00
10.00
Figure 14. Thermal resistance junction to
ambient versus copper surface under anode
(SMBflat-3L)
170
160
150
140
130
120
110
100
90
80
70
60
50
10.0
VTM(V)
0.01
Rth(j-a)(°C/W)
Epoxy printed circuit board FR4
copper thickness = 35 µm
S(cm²)
0
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5
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AC line transient voltage ruggedness
2
TS110-7
AC line transient voltage ruggedness
In comparison with standard SCRs, the TS110-7 is self-protected against over-voltage. The
TS110-7 switch can safely withstand AC line surge voltages by switching to the on state (for
less than 10 ms on 50 Hz mains) to dissipate energy shocks through the load. The load
limits the current through the TS110-7. The self-protection against over-voltage is based on
an overvoltage crowbar technology. This safety feature works even with high turn-on current
ramp up.
Figure 15 represents the TS110-7 in a test environment. It is used to stress the TS110-7
switch according to the IEC 61000-4-5 standard conditions. The TS110-7 folds back safely
to the on state as shown in Figure 16.
The TS110-7 recovers its blocking voltage capability after the surge and the next zero
current crossing. Such a non repetitive test can be done at least 10 times.
Figure 15. Overvoltage ruggedness test circuit for IEC 61000-4-5 standards
Surge generator
Model of the load
Filtering unit
R1
R2
60 Ω
60 Ω
CIN 150 nF
AC Mains
TS110
VT
IT
12 Ω 47 nF
Figure 16. Typical current and voltage waveforms across the TS110-7 during
IEC 61000-4-5 standard test
Vpeak = VBO
1.2/50 µs voltage surge
V
0
Ipeak = 25 A
I
0
dI/dt = 100 A/µs
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TS110-7
3
Package information
Package information
•
Epoxy meets UL94, V0
•
Lead-free package
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 17. TO_92 dimensions (definitions)
A
a
B
C
F
D
E
Table 5. TO-92 dimensions (values)
Dimensions
Ref.
Millimeters
Min.
A
Typ.
Inches
Max.
Min.
1.35
B
Typ.
0.053
4.70
C
Max.
0.185
2.54
0.100
D
4.40
0.173
E
12.70
0.500
F
3.70
0.146
a
0.5
0.019
For packing information see STMicroelectronics document PD0022 Packing information,
“Axial, through hole, surface mount and chip scale packages for IPAD™, protection,
rectifiers, thyristors and ACSs™”.
DocID022271 Rev 4
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Package information
TS110-7
Figure 18. SMBflat-3L dimensions (definitions)
A
c
e
D
b 2x
L2 2x
L 2x
L1
E E1
L1
L
L2
b4
Table 6. SMBflat-3L dimensions (values)
Dimensions
Ref.
Millimeters
Min.
Typ.
Inches
Max.
Min.
Typ.
A
0.90
1.10
0.035
0.043
b
0.35
0.65
0.014
0.026
b4
1.95
2.20
0.07
0.087
c
0.15
0.40
0.006
0.016
D
3.30
3.95
0.130
0.156
E
5.10
5.60
0.201
0.220
E1
4.05
4.60
0.156
0.181
L
0.75
1.50
0.030
0.059
L1
0.40
0.016
L2
0.60
0.024
e
1.60
0.063
Figure 19. SMBflat-3L footprint dimensions
5.84
(0.230)
0.51
(0.020)
2.07
(0.082)
2.07
(0.082)
0.51
(0.020)
1.20
(0.047)
3.44
(0.136)
millimeters
(inches)
8/10
Max.
DocID022271 Rev 4
1.20
(0.047)
TS110-7
4
Ordering information
Ordering information
Figure 20. Ordering information scheme
TS 1 10 - 7
A1 (-AP)
Sensitive SCR series
Current (rms)
1 = 1.25 A
Gate sensitivity
10 = 100 µA
Voltage
7 = 700 V
Package
A1 = TO-92 with “GAK” pinout
UF = SMBflat-3L
Packing mode
-AP = Ammopack (TO_92)
Blank = Bulk (TO-92), 13” tape and reel (SMBflat-3L)
Table 7. Ordering information
Order code
Marking
TS110-7A1
5
Package
Weight
T0-92
200 mg
TS110-7
TS110-7A1-AP
TS110-7
TS110-7UF
TS110-7
SMBflat-3L
47 mg
Base qty.
Delivery mode
2500
Bulk
2000
Ammopack
5000
Tape and reel 13”
Revision history
Table 8. Document revision history
Date
Revision
Changes
01-Sep-2012
1
Initial release.
11-Sep-2012
2
Added SMBflat-3L package.
17-Oct-2013
3
Corrected typographical error in Figure 8.
18-Jun-2014
4
Updated device name.
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TS110-7
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