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TS472_06

TS472_06

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

  • 描述:

    TS472_06 - Very low noise microphone preamplifier with 2.0V bias output and active low standby mode ...

  • 数据手册
  • 价格&库存
TS472_06 数据手册
TS472 Very low noise microphone preamplifier with 2.0V bias output and active low standby mode Features ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Flip-chip - 12 bumps Low noise: 10nV/√ typ. equivalent input Hz noise @ F = 1kHz Fully differential input/output 2.2V to 5.5V single supply operation Low power consumption @20dB: 1.8mA Fast start up time @ 0dB: 5ms typ. Low distortion: 0.1% typ. 40kHz bandwidth regardless of the gain Active low standby mode function (1μA max) Low noise 2.0V microphone bias output Available in flip-chip lead-free package and in QFN24 4x4mm package ESD protection (2kV) QFN24 C1 C2 STDBY VCC Pin Connections (top view) OUTPUT BIAS GS OUT+ OUT- IN+ IN- GND BYPASS Description The TS472 is a differential-input microphone preamplifier optimized for high-performance, PDA and notebook audio systems. This device features an adjustable gain from 0dB to 40dB with excellent power-supply and common-mode rejection ratios. In addition, the TS472 has a very low-noise microphone bias generator of 2V. It also includes a complete shutdown function, with active low standby mode. Pin Connection (top view) Applications ■ ■ ■ ■ Video and photo cameras with sound input Sound acquisition & voice recognition Video conference systems Notebook computers and PDAs September 2006 Rev 4 1/24 www.st.com 24 Contents TS472 Contents 1 2 3 4 5 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 5.10 Differential configuration principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Higher cut-off frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Lower cut-off frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Low-noise microphone bias source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Wake-up time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Single-ended input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Demo board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6.1 6.2 Flip-chip package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 QFN24 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 2/24 TS472 Ordering information 1 Ordering information Table 1. Order codes Temperature range -40°C, +85°C -40°C, +85°C Package Flip-chip QFN24 4x4mm Packing Tape & reel Tape & reel Marking 472 K472 Part number TS472EIJT TS472IQT 3/24 Typical application schematic TS472 2 Typical application schematic Figure 1 shows a typical application schematic for the TS472. Figure 1. Application schematic (flip-chip) Table 2. External component descriptions Functional description Input coupling capacitors that block the DC voltage at the amplifier input terminal. Output coupling capacitors that block the DC voltage coming from the amplifier output terminal (pins C2 and D2) and determine Lower cut-off frequency. Output load resistors used to charge the output coupling capacitors Cout. These output resistors can be represented by an input impedance of a following stage. Polarizing resistors for biasing of a microphone. Supply bypass capacitor that provides power supply filtering. Bypass pin capacitor that provides half-supply filtering. Low pass filter capacitors allowing to cut the high frequency. Components Cin+, Cin- Cout+, Cout- Rout+, RoutRpos, Rneg Cs Cb C1, C2 4/24 TS472 Absolute maximum ratings 3 Absolute maximum ratings Table 3. Symbol VCC Vi Toper Tstg Tj Rthja ESD ESD Supply voltage (1) Input voltage Operating free air temperature range Storage temperature Maximum junction temperature Thermal resistance junction to ambient: Flip-chip QFN24 Human body model Machine model Lead temperature (soldering, 10sec) 1. All voltages values are measured with respect to the ground pin. Absolute maximum ratings Parameter Value 6 -0.3 to VCC+0.3 -40 to + 85 -65 to +150 150 180 110 2 200 250 Unit V V °C °C °C °C/W kV V °C Table 4. Symbol VCC A VSTBY Top Rthja Operating conditions Parameter Supply voltage Typical differential gain (GS connected to 4.7kΩ or bias) Standby voltage input: Device ON Device OFF Operational free air temperature range Thermal resistance junction to ambient: Flip-chip QFN24 Value 2.2 to 5.5 20 1.5 ≤VSTBY ≤VCC GND ≤VSTBY ≤0.4 -40 to +85 150 60 Unit V dB V °C °C/W 5/24 Electrical characteristics TS472 4 Electrical characteristics Table 5. Symbol en THD+N Vin BW Electrical characteristics at VCC = 3V with GND = 0V, Tamb = 25°C (unless otherwise specified) Parameter Equivalent input noise voltage density REQ=100Ω at 1KHz Total harmonic distortion + noise 20Hz ≤F ≤ 20kHz, Gain=20dB, Vin=50mVRMS Input voltage, Gain=20dB Bandwidth @ -3dB Bandwidth @ -1dB pin A3, B3 floating Overall output voltage gain (Rgs variable): Minimum gain, Rgs infinite Maximum gain, Rgs=0 Input impedance referred to GND Resistive load Capacitive load Supply current, Gain=20dB Standby current Power supply rejection ratio, Gain=20dB, F=217Hz, Vripple=200mVpp, inputs grounded Differential output Single-ended outputs, 1.8 -3 39.5 80 10 100 2.4 1 Min. Typ. 10 0.1 10 40 20 70 Max. Unit nV ----------Hz % mVRMS kHz G Zin RLOAD CLOAD ICC ISTBY -1.5 41 100 0 42.5 120 dB kΩ kΩ pF mA μA PSRR -70 -46 dB Table 6. Symbol Vout Rout Iout PSRR Bias output: VCC = 3V, GND = 0V, Tamb = 25°C (unless otherwise specified) Parameter No load condition Output resistance Output bias current Power supply rejection ratio, F=217Hz, Vripple=200mVpp 70 Min. 1.9 80 Typ. 2 100 2 80 Max. 2.1 120 Unit V W mA dB 6/24 TS472 Table 7. Gain (dB) 0 20 40 Electrical characteristics Differential RMS noise voltage Input referred noise voltage (μVRMS) Unweighted filter 15 3.4 1.4 A-weighted filter 10 2.3 0.9 Output noise voltage (μVRMS) Unweighted filter 15 34 141 A-weighted filter 10 23 91 Table 8. Bias output RMS noise voltage Cout (μF) 1 10 Unweighted filter (μVRMS) 5 2.2 A-weighted filter (μVRMS) 4.4 1.2 Table 9. Gain (dB) SNR (signal to noise ratio), THD+N < 0.5% Unweighted filter (dB) VCC=2.2V VCC=3V 76 83 72 VCC=5.5V 76 83 74 VCC=2.2V 79 89 80 A-weighted filter (dB) VCC=3V 80 90 82 VCC=5.5V 80 90 84 0 20 40 75 82 70 Note: Unweighted filter = 20Hz ≤F ≤20kHz 7/24 Electrical characteristics Table 10. Index of graphics Description Current consumption vs. power supply voltage Current consumption vs. standby voltage Standby threshold voltage vs. power supply voltage Frequency response Bias output voltage vs. bias output current Bias output voltage vs. power supply voltage Bias PSRR vs. frequency Differential output PSRR vs. frequency Single-ended output PSRR vs. frequency Equivalent input noise voltage density Figure TS472 Figure 2 and Figure 3 Figure 4 and Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 and Figure 11 Figure 12 to Figure 15 Figure 16 Figure 17 Figure 18 Figure 19 Figure 20 Figure 21 Figure 22 to Figure 27 Figure 28 to Figure 29 Figure 30 to Figure 31 Δgain vs. power supply voltage Dgain vs. ambient temperature Maximum input voltage vs. gain, THD+N
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