TS4902

TS4902 300mW at 3.3V SUPPLY AUDIO POWER AMPLIFIER WITH STANDBY MODE ACTIVE LOW s OPERATING FROM VCC = 2.2V to 5.5V s 0.7W OUTPUT POWER @ Vcc=5V, THD=1%, f=1kHz, with an 8Ω load PIN CONNECTIONS (top view) s 0.3W OUTPUT POWER @ Vcc=3.3V, THD=1%, f=1kHz, with an 8Ω load s ULTRA LOW CONSUMPTION IN STANDBY MODE (10nA) s 77dB PSRR @ 217Hz from 5V to 2.2V s ULTRA LOW POP & CLICK s ULTRA LOW DISTORTION (0.1%) s UNITY GAIN STABLE s AVAILABLE IN MiniSO8 & SO8 DESCRIPTION The TS4902 is an audio power amplifier designed to provide the best price to power ratio while preserving high audio quality. Available in MiniSO8 & SO8 package, it is capable of delivering up to 0.7W of continuous RMS ouput power into an 8Ω load @ 5V. TS4902 is also exhibiting an outstanding 0.1% distortion level (THD) from a 5V supply for a Pout of 200mW RMS. An externally controlled standby mode reduces the supply current to less than 10nA. It also includes an internal thermal shutdown protection. The unity-gain stable amplifier can be configured by external gain setting resistors. APPLICATIONS s Mobile Phones (Cellular / Cordless) s PDAs s Portable Audio Devices ORDER CODE Part Number TS4902IST TS4902ID Temperature Range -40, +85°C Package TS4902IS-TS4902IST - MiniSO8 Standby Bypass VIN+ VIN- 1 2 3 4 8 7 6 5 VOUT2 GND VCC VOUT1 TS4902ID-TS4902IDT - SO8 Standby Bypass VIN+ VIN- 1 2 3 4 8 7 6 5 VOUT2 GND VCC VOUT1 TYPICAL APPLICATION SCHEMATIC Cfeed Rfeed VCC 6 Audio Input Cin 3 Vin+ + RL 8 O hm s VCC AV = -1 2 1 Bypass Standby Bias GND Cb 7 TS4902 + Vout 2 8 Cs Rin 4 Vin- - V C Vout 1 5 ST • D • Rstb S = MiniSO Package (MiniSO) is only available in Tape & Reel (ST) D = Small Outline Package (SO) - also available in Tape & Reel (DT) January 2002 1/19 TS4902 ABSOLUTE MAXIMUM RATINGS Symbol VCC Vi Toper Tstg Tj Rthja Supply voltage Input Voltage 2) 1) Parameter Value 6 GND to VCC -40 to + 85 -65 to +150 150 175 215 See the power derating curves Fig 20. 2 200 Class A 250 Unit V V °C °C °C °C/W Operating Free Air Temperature Range Storage Temperature Maximum Junction Temperature Thermal Resistance Junction to Ambient 3) SO8 MiniSO8 Power Dissipation 4) Pd ESD Human Body Model ESD Machine Model Latch-up Latch-up Immunity Lead Temperature (soldering, 10sec) 1. 2. 3. 4. All voltages values are measured with respect to the ground pin. The magnitude of input signal must never exceed VCC + 0.3V / G ND - 0.3V Device is protected in case of over temperature by a thermal shutdown active @ 150°C. Exceeding the power derating curves during a long period, will cause abnormal operation. kV V °C OPERATING CONDITIONS Symbol VCC VICM VSTB RL Rthja Supply Voltage Common Mode Input Voltage Range Standby Voltage Input : Device ON Device OFF Load Resistor Thermal Resistance Junction to Ambient 1) SO8 MiniSO8 Parameter Value 2.2 to 5.5 GND to VCC - 1.5V 1.5 ≤ VSTB ≤ VCC GND ≤ VSTB ≤ 0.5 4 - 32 150 190 Unit V V V Ω °C/W 1. This thermal resistance can be reduced with a suitable PCB layout (see Power Derating Curves) 2/19 TS4902 ELECTRICAL CHARACTERISTICS VCC = +5V, GND = 0V, Tamb = 25°C (unless otherwise specified) Symbol ICC ISTANDBY Voo Po THD + N PSRR ΦM GM GBP Parameter Supply Current No input signal, no load Standby Current 1) No input signal, Vstdby = GND, RL = 8Ω Output Offset Voltage No input signal, RL = 8Ω Output Power THD = 1% Max, f = 1kHz, RL = 8Ω Total Harmonic Distortion + Noise Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω Power Supply Rejection Ratio 2) f = 217Hz, RL = 8Ω, RFeed = 22KΩ, Vripple = 200mV rms Phase Margin at Unity Gain RL = 8Ω, CL = 500pF Gain Margin RL = 8Ω, CL = 500pF Gain Bandwidth Product RL = 8Ω Min. Typ. 6 10 5 0.7 0.15 77 70 20 2 Max. 8 1000 20 Unit mA nA mV W % dB Degrees dB MHz 1. Standby mode is actived when Vstdby is tied to GND 2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz VCC = +3.3V, GND = 0V, Tamb = 25°C (unless otherwise specified)3) Symbol ICC ISTANDBY Voo Po THD + N PSRR ΦM GM GBP Parameter Supply Current No input signal, no load Standby Current 1) No input signal, Vstdby = GND, RL = 8Ω Output Offset Voltage No input signal, RL = 8Ω Output Power THD = 1% Max, f = 1kHz, RL = 8Ω Total Harmonic Distortion + Noise Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω Power Supply Rejection Ratio 2) f = 217Hz, RL = 8Ω, RFeed = 22KΩ, Vripple = 200mV rms Phase Margin at Unity Gain RL = 8Ω, CL = 500pF Gain Margin RL = 8Ω, CL = 500pF Gain Bandwidth Product RL = 8Ω Min. Typ. 5.5 10 5 300 0.15 77 70 20 2 Max. 8 1000 20 Unit mA nA mV mW % dB Degrees dB MHz 1. Standby mode is actived when Vstdby is tied to GND 2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz 3. All electrical values are made by correlation between 2.6V and 5V measurements 3/19 TS4902 ELECTRICAL CHARACTERISTICS VCC = 2.6V, GND = 0V, Tamb = 25°C (unless otherwise specified) Symbol ICC ISTANDBY Voo Po THD + N PSRR ΦM GM GBP Parameter Supply Current No input signal, no load Standby Current 1) No input signal, Vstdby = GND, RL = 8Ω Output Offset Voltage No input signal, RL = 8Ω Output Power THD = 1% Max, f = 1kHz, RL = 8Ω Total Harmonic Distortion + Noise Po = 200mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω Power Supply Rejection Ratio 2) f = 217Hz, RL = 8Ω, RFeed = 22KΩ, Vripple = 200mV rms Phase Margin at Unity Gain RL = 8Ω, CL = 500pF Gain Margin RL = 8Ω, CL = 500pF Gain Bandwidth Product RL = 8Ω Min. Typ. 5.5 10 5 180 0.15 77 70 20 2 Max. 8 1000 20 Unit mA nA mV mW % dB Degrees dB MHz 1. Standby mode is actived when Vstdby is tied to GND 2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz Components Rin Cin Rfeed Cs Cb Cfeed Rstb Gv Functional Description Inverting input resistor which sets the closed loop gain in conjunction with Rfeed. This resistor also forms a high pass filter with Cin (fc = 1 / (2 x Pi x Rin x Cin)) Input coupling capacitor which blocks the DC voltage at the amplifier input terminal Feed back resistor which sets the closed loop gain in conjunction with Rin Supply Bypass capacitor which provides power supply filtering Bypass pin capacitor which provides half supply filtering Low pass filter capacitor allowing to cut the high frequency (low pass filter cut-off frequency 1 / (2 x Pi x Rfeed x Cfeed)) Pull-up resistor which fixes the right supply level on the standby pin Closed loop gain in BTL configuration = 2 x (Rfeed / Rin) REMARKS 1. All measurements, except PSRR measurements, are made with a supply bypass capacitor Cs = 100µF. 2. The standby response time is about 1µs. 4/19 TS4902 Fig. 1 : Open Loop Frequency Response 0 60 Gain Vcc = 5V RL = 8Ω Tamb = 25°C -20 -40 -60 Phase (Deg) Fig. 2 : Open Loop Frequency Response 0 60 Gain Vcc = 5V ZL = 8Ω + 560pF Tamb = 25°C -20 -40 -60 Phase (Deg) 40 Gain (dB) 40 Phase Gain (dB) Phase 20 -80 -100 -120 -80 -100 -120 20 0 -140 -160 0 -140 -160 -20 -180 -200 -20 -180 -200 -40 0.3 1 10 100 Frequency (kHz) 1000 10000 -220 -40 0.3 1 10 100 1000 Frequency (kHz) 10000 -220 Fig. 3 : Open Loop Frequency Response 80 60 40 Gain (dB) Fig. 4 : Open Loop Frequency Response 80 60 40 Phase 20 0 -20 -40 0.3 Gain Vcc = 3.3V ZL = 8Ω + 560pF Tamb = 25°C 0 -20 -40 -60 -80 -100 -120 -140 -160 -180 -200 -220 1 10 100 1000 Frequency (kHz) 10000 -240 Phase (Deg) Phase (Deg) 0 Gain Vcc = 33V RL = 8Ω Tamb = 25°C -20 -40 -60 -100 -120 -140 -160 -180 -200 -220 -240 Phase (Deg) Phase 20 0 -20 -40 0.3 1 10 100 1000 Frequency (kHz) 10000 Fig. 5 : Open Loop Frequency Response 80 60 40 Gain (dB) Fig. 6 : Open Loop Frequency Response 0 80 Gain 60 40 Phase (Deg) Gain (dB) Gain (dB) -80 0 Vcc = 2.6V ZL = 8Ω + 560pF Tamb = 25°C -20 -40 -60 -80 Phase -100 -120 -140 -160 -180 -200 -220 -240 Gain Vcc = 2.6V RL = 8Ω Tamb = 25°C -20 -40 -60 -80 -100 -120 -140 -160 -180 -200 -220 -240 Phase 20 0 -20 -40 0.3 20 0 -20 -40 0.3 1 10 100 1000 Frequency (kHz) 10000 1 10 100 1000 Frequency (kHz) 10000 5/19 TS4902 Fig. 7 : Open Loop Frequency Response 100 80 60 Gain Gain (dB) Fig. 8 : Open Loop Frequency Response -80 100 80 60 Phase (Deg) -80 Phase -100 -120 -140 -160 Phase (Deg) Phase -100 -120 -140 -160 -180 Gain (dB) Gain 40 20 40 20 0 -20 -40 0.3 -180 0 Vcc = 3.3V CL = 560pF Tamb = 25°C 1 10 100 1000 Frequency (kHz) 10000 -200 -220 -240 Vcc = 5V CL = 560pF Tamb = 25°C 1 10 100 1000 Frequency (kHz) 10000 -200 -20 -220 -40 0.3 Fig. 9 : Open Loop Frequency Response 100 80 60 Gain Gain (dB) -80 Phase -100 -120 -140 -160 Phase (Deg) 40 20 -180 0 -20 -40 0.3 Vcc = 2.6V CL = 560pF Tamb = 25°C 1 10 100 1000 Frequency (kHz) 10000 -200 -220 -240 6/19 TS4902 Fig. 10 : Power Supply Rejection Ratio (PSRR) vs Power supply -30 Vripple = 200mVrms Rfeed = 22kΩ Input = floating RL = 8Ω Tamb = 25°C Vcc = 5V to 2.2V Cb = 1µF & 0.1µF Fig. 11 : Power Supply Rejection Ratio (PSRR) vs Feedback Capacitor -10 -20 -30 PSRR (dB) -40 PSRR (dB) -50 -40 -50 -60 Vcc = 5 to 2.2V Cb = 1µF & 0.1µF Rfeed = 22kΩ Vripple = 200mVrms Input = floating RL = 8Ω Tamb = 25°C Cfeed=0 Cfeed=150pF Cfeed=330pF -60 -70 -70 Cfeed=680pF -80 10 100 1000 10000 Frequency (Hz) 100000 -80 10 100 1000 10000 Frequency (Hz) 100000 Fig. 12 : Power Supply Rejection Ratio (PSRR) vs Bypass Capacitor -10 -20 -30 PSRR (dB) Fig. 13 : Power Supply Rejection Ratio (PSRR) vs Input Capacitor -10 Cb=1µF Cb=10µF Vcc = 5 to 2.2V Rfeed = 22k Rin = 22k, Cin = 1µF Rg = 100Ω, RL = 8Ω Tamb = 25°C Cb=47µF PSRR (dB) Cin=1µF Cin=330nF Cin=220nF -20 -40 -50 -60 -30 Vcc = 5 to 2.2V Rfeed = 22k, Rin = 22k Cb = 1µF Rg = 100Ω, RL = 8Ω Tamb = 25°C -40 Cin=100nF -50 Cin=22nF -70 Cb=100µF -80 10 100 1000 Frequency (Hz) -60 10 100 1000 Frequency (Hz) 10000 100000 10000 100000 Fig. 14 : Power Supply Rejection Ratio (PSRR) vs Feedback Resistor -10 -20 -30 PSRR (dB) -40 -50 -60 -70 -80 10 Vcc = 5 to 2.2V Cb = 1µF & 0.1µF Vripple = 200mVrms Input = floating RL = 8Ω Tamb = 25°C Rfeed=110kΩ Rfeed=47kΩ Rfeed=22kΩ Rfeed=10kΩ 100 1000 10000 Frequency (Hz) 100000 7/19 TS4902 Fig. 15 : Pout @ THD + N = 1% vs Supply Voltage vs RL 1.0 8Ω 4Ω Output power @ 10% THD + N (W) Output power @ 1% THD + N (W) Fig. 16 : Pout @ THD + N = 10% vs Supply Voltage vs RL 1.2 0.8 Gv = 2 & 10 Cb = 1µF F = 1kHz BW < 125kHz Tamb = 25°C 1.0 0.8 0.6 0.4 0.2 Gv = 2 & 10 Cb = 1µF F = 1kHz BW < 125kHz Tamb = 25°C 4Ω 8Ω 16 Ω 0.6 16 Ω 0.4 0.2 32 Ω 0.0 2.5 3.0 3.5 Vcc (V) 32 Ω 5.0 0.0 2.5 3.0 3.5 Vcc (V) 4.0 4.5 4.0 4.5 5.0 Fig. 17 : Power Dissipation vs Pout 1.4 1.2 1.0 0.8 0.6 RL=8Ω 0.4 0.2 0.0 0.0 RL=16Ω 0.2 0.4 0.6 0.8 1.0 Vcc=5V f=1kHz THD+N 4.4ms). Increasing Cin value increases the pop and click phenomena to an unpleasant sound at power supply ON and standby function ON/OFF. Why Cs is not important in pop and click consideration ? Hypothesis : • Cs = 100µF • Supply voltage = 5V • Supply voltage internal resistor = 0.1Ω • Supply current of the amplifier Icc = 6mA At power ON of the supply, the supply capacitor is charged through the internal power supply resistor. So, to reach 5V you need about five to ten times the charging time constant of Cs (τs = 0.1xCs (s)). Then, this time equal 50µs to 100µs > tdischCs. s Remark on PSRR measurement conditions What is the PSRR ? The PSRR is the Power Supply Rejection Ratio. It's a kind of SVR in a determined frequency range. The PSRR of a device is the ratio between the power supply disturbance and the result on the output. We can say that the PSRR is the ability of a device to minimize the impact of power supply disturbances to the output. s How to use the PSRR curves (page 7) We have finished a design and we have chosen the components values : • Rin=Rfeed=22kΩ, Cin=100nF, Cb=1µF Now, on fig. 13, we can see the PSRR (input grounded) vs frequency curves. At 217Hz we have a PSRR value of -36dB. In fact, we want a value of about -70dB. So, we need a gain of +34dB ! Now, on fig. 12 we can see the effect of Cb on the PSRR (input grounded) vs. frequency. With Cb=100µF, we can reach the -70dB value. The process to obtain the final curve (Cb=100µF, Cin=100nF, Rin=Rfeed=22kΩ) is a simple transfer point by point on each frequency of the curve on fig. 13 to the curve on fig. 12. The measurement result is shown on figure A. Fig. A : PSRR changes with Cb How do we measure the PSRR ? Fig. B : PSRR measurement schematic Rfeed Vripple Vcc 4 Rin Cin Av=-1 + 8 Vs+ 3 VinVin+ + RL Vout2 6 Vcc Vout1 5 Vs- 2 Rg 100 Ohms 1 Bypass Standby Bias GND TS4902 Cb 7 s Measurement process: • Fix the DC voltage supply (Vcc) -30 Cin=100nF Cb=1µF -40 PSRR (dB) Vcc = 5, 3.3 & 2.6V Rfeed = 22k, Rin = 22k Rg = 100Ω, RL = 8Ω Tamb = 25°C • Fix the AC sinusoidal ripple voltage (Vripple) • No bypass capacitor Cs is used The PSRR value for each frequency is : -50 Cin=100nF Cb=100µF PSRR ( d B ) = 20 x Log 10 -60 R ms ( V r i p pl e ) -------------------------------------------Rms ( Vs + - Vs - ) -70 10 100 1000 Frequency (Hz) Remark : The measurement of the RMS voltage is 10000 100000 not a selective RMS measurement but a full range (2 Hz to 125 kHz) RMS measurement. This means we have: the effective RMS signal + the noise. 17/19 TS4902 PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (SO) L c1 a2 A C a3 Inches Typ. s e3 E D M 8 5 1 4 Millimeters Dim. Min. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 0.1 0.65 0.35 0.19 0.25 4.8 5.8 1.27 3.81 3.8 0.4 4.0 1.27 0.6 8° (max.) 0.150 0.016 Typ. Max. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45° (typ.) 5.0 6.2 0.189 0.228 Min. 0.004 0.026 0.014 0.007 0.010 F a1 b b1 Max. 0.069 0.010 0.065 0.033 0.019 0.010 0.020 0.197 0.244 0.050 0.150 0.157 0.050 0.024 18/19 TS4902 PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (miniSO) k c 0,25mm .010inch GAGEPLANE L E1 SEATING PLANE A A2 A1 5 C E 4 D L1 b C 8 1 Dim. Min. A A1 A2 b c D E E1 e L L1 k ccc 0.050 0.780 0.250 0.130 2.900 4.750 2.900 0.400 0d Millimeters Typ. 0.100 0.860 0.330 0.180 3.000 4.900 3.000 0.650 0.550 0.950 3d Max. 1.100 0.150 0.940 0.400 0.230 3.100 5.050 3.100 0.700 6d 0.100 Min. 0.002 0.031 0.010 0.005 0.114 0.187 0.114 0.016 0d ccc PIN1IDENTIFICA TION e Inches Typ. 0.004 0.034 0.013 0.007 0.118 0.193 0.118 0.026 0.022 0.037 3d Max. 0.043 0.006 0.037 0.016 0.009 0.122 0.199 0.122 0.028 6d 0.004 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States © http://www.st.com 19/19